mirror/rpcs3
1
0
Fork 0
mirror of https://github.com/RPCS3/rpcs3.git synced 2025-01-30 12:32:43 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #44 from danilaml/patch-1

Browse Source 
Completely fix MTOCRF
This commit is contained in:
vlj 2015-08-06 23:42:33 +02:00
commit cc83a9df3b
2 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
rpcs3/Emu/Cell/PPULLVMRecompilerCore.cpp
View File

@ -2660,16 +2660,16 @@ void Compiler::MTOCRF(u32 l, u32 crm, u32 rs) {
for (u32 i = 0; i < 8; i++) {
if (crm & (1 << i)) {
mask |= 0xF << ((7 - i) * 4);
mask |= 0xF << (i * 4); // move 0xF to the left i positions (in hex form)
if (l) {
break;
}
}
}
cr_i32 = m_ir_builder->CreateAnd(cr_i32, mask);
rs_i32 = m_ir_builder->CreateAnd(rs_i32, ~mask);
cr_i32 = m_ir_builder->CreateOr(cr_i32, rs_i32);
cr_i32 = m_ir_builder->CreateAnd(cr_i32, ~mask); // null ith nibble
rs_i32 = m_ir_builder->CreateAnd(rs_i32, mask); // null everything except ith nibble
cr_i32 = m_ir_builder->CreateOr(cr_i32, rs_i32); // now ith cr nibble == ith rs nibble
SetCr(cr_i32);
}
@ -5314,4 +5314,4 @@ void Compiler::InitRotateMask() {
}
}
}
#endif
#endif

3
rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp
View File

@ -692,7 +692,8 @@ void Compiler::RunAllTests() {
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFE, 5, 5, 21u, 22u, 23u, 0u, 1u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDE, 0, 5, 7u, 8u, 9u, 0u, 0u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDE, 5, 5, 21u, 22u, 23u, 0u, 1u);
// TODO: MTOCRF
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTOCRF, 0, 5, 7u, 8u, 0u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTOCRF, 5, 5, 0u, 22u, 1u)
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDZE, 0, 5, 7u, 8u, 0u, 0u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDZE, 5, 5, 21u, 22u, 0u, 1u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFZE, 0, 5, 7u, 8u, 0u, 0u);