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https://github.com/RPCS3/rpcs3.git
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[WIP] SPU: Channel Loop Pattern Detection
This commit is contained in:
Elad Ashkenazi
parent
a1d2a72a78
commit
aa5284c8f1
@ -2493,6 +2493,12 @@ bool reg_state_t::is_const() const
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return !!(flag & vf::is_const);
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}
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bool reg_state_t::compare_tags(const reg_state_t& rhs) const
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{
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// Compare by tag, address of instruction origin
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return tag == rhs.tag && origin == rhs.origin && is_instruction == rhs.is_instruction;
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}
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bool reg_state_t::operator&(vf to_test) const
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{
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return this->flag.all_of(to_test);
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@ -2521,7 +2527,7 @@ bool reg_state_t::operator==(const reg_state_t& r) const
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return false;
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}
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return (flag & vf::is_const ? value == r.value : (tag == r.tag && known_ones == r.known_ones && known_zeroes == r.known_zeroes));
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return (flag & vf::is_const ? value == r.value : (compare_tags(r) && known_ones == r.known_ones && known_zeroes == r.known_zeroes));
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}
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bool reg_state_t::operator==(u32 imm) const
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@ -2558,7 +2564,7 @@ bool reg_state_t::compare_with_mask_indifference(const reg_state_t& r, u32 mask_
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const auto _this = this->downgrade();
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const auto _r = r.downgrade();
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const bool is_mask_equal = (_this.tag == _r.tag && _this.flag == _r.flag && !((_this.known_ones ^ _r.known_ones) & mask_bits) && !((_this.known_zeroes ^ _r.known_zeroes) & mask_bits));
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const bool is_mask_equal = (_this.compare_tags(_r) && _this.flag == _r.flag && !((_this.known_ones ^ _r.known_ones) & mask_bits) && !((_this.known_zeroes ^ _r.known_zeroes) & mask_bits));
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return is_mask_equal;
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}
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@ -2611,7 +2617,7 @@ bool reg_state_t::unequal_with_mask_indifference(const reg_state_t& r, u32 mask_
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const auto _this = this->downgrade();
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const auto _r = r.downgrade();
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const bool is_base_value_equal = (_this.tag == _r.tag && _this.flag == _r.flag);
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const bool is_base_value_equal = (_this.compare_tags(_r) && _this.flag == _r.flag);
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if (!is_base_value_equal)
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{
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@ -2662,6 +2668,7 @@ reg_state_t reg_state_t::merge(const reg_state_t& rhs, u32 current_pc) const
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// Success (create new value tag)
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res.tag = reg_state_t::alloc_tag();
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res.origin = current_pc;
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res.is_instruction = false;
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return res;
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}
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}
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@ -4747,29 +4754,38 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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}
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auto sort_breakig_reasons = [](const std::array<atomic_t<u64>, 128>& breaking_reason)
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{
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std::vector<std::pair<u32, u64>> map;
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for (usz i = 0; i < breaking_reason.size(); i++)
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{
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if (u64 v = breaking_reason[i])
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{
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map.emplace_back(i, v);
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}
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}
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std::stable_sort(map.begin(), map.end(), FN(x.second > y.second));
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return map;
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};
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struct putllc16_statistics_t
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{
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atomic_t<u64> all = 0;
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atomic_t<u64> single = 0;
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atomic_t<u64> nowrite = 0;
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std::array<atomic_t<u64>, 128> breaking_reason{};
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std::vector<std::pair<u32, u64>> get_reasons()
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{
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std::vector<std::pair<u32, u64>> map;
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for (usz i = 0; i < breaking_reason.size(); i++)
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{
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if (u64 v = breaking_reason[i])
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{
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map.emplace_back(i, v);
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}
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}
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std::stable_sort(map.begin(), map.end(), FN(x.second > y.second));
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return map;
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}
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};
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struct rchcnt_statistics_t
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{
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atomic_t<u64> all = 0;
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atomic_t<u64> single = 0;
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std::array<atomic_t<u64>, 128> breaking_reason{};
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};
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// Pattern structures
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struct atomic16_t
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{
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bool active = false; // GETLLAR happened
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@ -4824,6 +4840,29 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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};
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struct rchcnt_loop_t
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{
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bool active = false; // RDCH/RCHCNT happened
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bool failed = false; // needc this flag to distinguish start of the pattern vs failed pattern (they begin and end of the same address)
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bool conditioned = false; // needc this flag to distinguish start of the pattern vs failed pattern (they begin and end of the same address)
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u32 channel = 128;
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u32 read_pc = SPU_LS_SIZE; // PC of RDCH or RCHCNT (that encloses the loop)
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reg_state_t ch_state{+vf::is_null}; // Channel stat, example: RCNCNT ch_state, MFC_Cmd
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reg_state_t ch_product{+vf::is_null}; // Optional comparison state for channl state, example: CEQI ch_product, ch_state, 1
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bool product_test_negate = false; // Compare the opposite way, such as: CEQI ch_product, ch_state, 0 which turns 0 t -1 and 1 to 0
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std::basic_string<u32> origins;
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u32 branch_pc = SPU_LS_SIZE; // Where the loop branch is located
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u32 branch_target = SPU_LS_SIZE; // The target of the loop branch
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// Return old state for error reporting
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rchcnt_loop_t discard()
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{
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const rchcnt_loop_t old = *this;
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*this = rchcnt_loop_t{};
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return old;
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}
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};
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// Reset tags
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reg_state_t::alloc_tag(true);
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@ -4843,6 +4882,9 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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// PUTLLC16 optimization analysis tracker
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atomic16_t atomic16{};
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// RDCH/RCHCNT Loop analysis tracker
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rchcnt_loop_t rchcnt_loop{};
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block_reg_state_iterator(u32 _pc, usz _parent_iterator_index = umax, usz _parent_target_index = 0) noexcept
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: pc(_pc)
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, parent_iterator_index(_parent_iterator_index)
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@ -4854,6 +4896,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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std::vector<block_reg_state_iterator> reg_state_it;
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std::map<u32, atomic16_t> atomic16_all; // RdAtomicStat location -> atomic loop optimization state
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std::map<u32, rchcnt_loop_t> rchcnt_loop_all; // RDCH/RCHCNT location -> channel read loop optimization state
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std::map<u32, bool> getllar_starts; // True for failed loops
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std::map<u32, bool> run_on_block;
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std::map<u32, bool> logged_block;
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@ -4861,6 +4904,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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std::array<reg_state_t, s_reg_max>* true_state_walkby = nullptr;
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atomic16_t dummy16{};
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rchcnt_loop_t dummy_loop{};
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bool likely_putllc_loop = false;
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bool had_putllc_evaluation = false;
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@ -4913,6 +4957,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const bool is_pattern_match = wf == 1;
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dummy16.active = false;
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dummy_loop.active = false;
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if (!is_form_block && wa == bpc)
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{
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@ -4966,7 +5011,6 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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if (f.flag & vf::is_null)
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{
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// Evaluate locally
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//f.tag = reg_state_t::alloc_tag();
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f.flag -= vf::is_null;
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}
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}
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@ -4974,6 +5018,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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auto& vregs = is_form_block ? infos[bpc]->local_state : *true_state_walkby;
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auto& atomic16 = is_pattern_match ? ::at32(reg_state_it, wi).atomic16 : dummy16;
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auto& rchcnt_loop = is_pattern_match ? ::at32(reg_state_it, wi).rchcnt_loop : dummy_loop;
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const u32 pos = wa;
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@ -5001,7 +5046,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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std::string break_error = fmt::format("PUTLLC pattern breakage [%x mem=%d lsa_const=%d cause=%u] (lsa_pc=0x%x)", pos, previous.mem_count, u32{!previous.ls_offs.is_const()} * 2 + previous.lsa.is_const(), cause, previous.lsa_pc);
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const auto values = g_fxo->get<putllc16_statistics_t>().get_reasons();
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const auto values = sort_breakig_reasons(g_fxo->get<putllc16_statistics_t>().breaking_reason);
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std::string tracing = "Top Breaking Reasons:";
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@ -5035,14 +5080,72 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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fmt::append(tracing, " of %d failures", fail_count);
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spu_log.notice("%s\n%s", break_error, tracing);
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if (cause == 17 || cause == 20)
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{
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}
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}
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};
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const auto break_channel_pattern = [&](u32 cause, rchcnt_loop_t previous)
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{
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if (previous.active && rchcnt_loop_all.contains(previous.read_pc))
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{
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const bool is_first = !std::exchange(rchcnt_loop_all[previous.read_pc].failed, true);
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if (!is_first)
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{
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return;
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}
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g_fxo->get<rchcnt_statistics_t>().breaking_reason[cause]++;
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if (!spu_log.notice)
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{
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return;
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}
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std::string break_error = fmt::format("Channel pattern breakage [%x cause=%u] (read_pc=0x%x)", pos, cause, previous.read_pc);
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const auto values = sort_breakig_reasons(g_fxo->get<rchcnt_statistics_t>().breaking_reason);
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std::string tracing = "Top Breaking Reasons:";
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usz i = 0;
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usz fail_count = 0;
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bool switched_to_minimal = false;
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for (auto it = values.begin(); it != values.end(); i++, it++)
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{
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fail_count += it->second;
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if (i >= 12)
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{
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continue;
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}
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if (i < 8 && it->second > 1)
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{
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fmt::append(tracing, " [cause=%u, n=%d]", it->first, it->second);
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}
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else
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{
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if (!std::exchange(switched_to_minimal, true))
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{
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fmt::append(tracing, "; More:");
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}
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fmt::append(tracing, " %u", it->first);
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}
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}
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fmt::append(tracing, " of %d failures", fail_count);
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spu_log.notice("%s\n%s", break_error, tracing);
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}
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};
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const auto break_all_patterns = [&](u32 cause)
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{
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break_putllc16(cause, atomic16.discard());
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break_channel_pattern(cause, rchcnt_loop.discard());
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};
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const auto calculate_absolute_ls_difference = [](u32 addr1, u32 addr2)
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{
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addr1 &= SPU_LS_MASK_1;
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@ -5056,6 +5159,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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bool called_next = false;
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u32 data{};
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const auto next_block = [&]()
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{
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if (called_next)
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@ -5279,6 +5384,11 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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break_putllc16(40, reg_state_it[stackframe_it].atomic16.discard());
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}
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if (reg_state_it[stackframe_it].rchcnt_loop.active)
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{
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break_channel_pattern(40, reg_state_it[stackframe_it].rchcnt_loop.discard());
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}
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// Allow the block to run only once, to avoid unnecessary iterations
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run_on_block[target_pc / 4] = true;
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}
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@ -5294,8 +5404,23 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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}
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const u32 previous_pc = m_bbs.at(reg_state_it[stackframe_it].pc).size * 4 + reg_state_it[stackframe_it].pc - 4;
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bool may_return = previous_pc + 4 != entry_point + result.data.size() * 4 && (m_ret_info[(previous_pc / 4) + 1] || m_entry_info[previous_pc / 4]);
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if (!may_return)
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{
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const u32 branch_target = op_branch_targets(previous_pc, spu_opcode_t{data})[0];
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if (branch_target == umax || branch_target >= entry_point + result.data.size() * 4 || branch_target < entry_point)
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{
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may_return = true;
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}
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}
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// Backup analyser information
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const auto atomic16_info = reg_state_it[stackframe_it].atomic16;
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const auto rchcnt_loop_info = reg_state_it[stackframe_it].rchcnt_loop;
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// Clean from the back possible because it does not affect old indices
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// Technically should always do a full cleanup at the moment
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@ -5314,6 +5439,18 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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}
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if (wi != stackframe_it || may_return || !insert_entry)
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{
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// Possible function end
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if (rchcnt_loop.active)
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{
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// Does not post-dominates channel reads
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auto& pair = rchcnt_loop_all[rchcnt_loop.read_pc];
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pair.failed = true;
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pair.active = false;
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}
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}
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if (insert_entry)
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{
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const usz target_size = get_block_targets(stackframe_pc).size();
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@ -5325,10 +5462,24 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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{
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// Restore analyser information (if not an entry)
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next.atomic16 = atomic16_info;
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if (previous_pc != rchcnt_loop_info.branch_pc || target_pc == rchcnt_loop_info.branch_target)
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next.rchcnt_loop = rchcnt_loop_info;
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}
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else if (atomic16_info.active)
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else
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{
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break_putllc16(39, atomic16_info);
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if (atomic16_info.active)
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{
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break_putllc16(39, atomic16_info);
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}
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if (rchcnt_loop.active)
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{
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// Does not post-dominates channel read
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auto& pair = rchcnt_loop_all[rchcnt_loop.read_pc];
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pair.failed = true;
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pair.active = false;
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}
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}
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next.iterator_id = iterator_id_alloc++;
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@ -5431,7 +5582,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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const auto unconst = [&](u32 reg, u32 pc)
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{
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vregs[reg] = reg_state_t::make_unknown(pc);
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vregs[reg] = reg_state_t::make_unknown(pc, pos);
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};
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const auto add_block = [&](u32 target)
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@ -5482,7 +5633,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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if (!is_form_block)
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{
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// Call for external code
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break_putllc16(25, atomic16.discard());
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break_all_patterns(25);
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}
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}
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@ -5494,7 +5645,16 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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}
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}
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const u32 data = std::bit_cast<be_t<u32>>(::at32(result.data, (pos - lsa) / 4));
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if (rchcnt_loop.active)
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{
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if (rchcnt_loop.origins.find_first_of(pos) != umax)
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{
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rchcnt_loop.failed = true;
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rchcnt_loop.active = false;
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}
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}
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data = std::bit_cast<be_t<u32>>(::at32(result.data, (pos - lsa) / 4));
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const auto op = spu_opcode_t{data};
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const auto type = g_spu_itype.decode(data);
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@ -5604,7 +5764,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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{
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if (op.e || op.d)
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{
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break_putllc16(27, atomic16.discard());
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break_all_patterns(27);
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}
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break;
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@ -5621,9 +5781,35 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
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break;
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}
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case spu_itype::BR:
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case spu_itype::BRZ:
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case spu_itype::BRNZ:
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{
|
||||
const u32 next_pc = spu_branch_target(pos, 1);
|
||||
const u32 target = spu_branch_target(pos, op.i16);
|
||||
|
||||
if (rchcnt_loop.active)
|
||||
{
|
||||
const reg_state_t& rt = vregs[op.rt];
|
||||
|
||||
if (rt.is_instruction && (rchcnt_loop.ch_state.origin == rt.origin || rchcnt_loop.ch_product.origin == rt.origin))
|
||||
{
|
||||
if (rchcnt_loop.conditioned)
|
||||
{
|
||||
// Let's not make it complicated, have a single branch determining the condition
|
||||
break_channel_pattern(54, rchcnt_loop.discard());
|
||||
break;
|
||||
}
|
||||
|
||||
rchcnt_loop.conditioned = true;
|
||||
rchcnt_loop.branch_pc = pos;
|
||||
rchcnt_loop.branch_target = rchcnt_loop.product_test_negate != (type == spu_itype::BRZ) ? target : next_pc;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
case spu_itype::BR:
|
||||
case spu_itype::BRHZ:
|
||||
case spu_itype::BRHNZ:
|
||||
{
|
||||
@ -5648,6 +5834,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
|
||||
case spu_itype::WRCH:
|
||||
{
|
||||
break_channel_pattern(56, rchcnt_loop.discard());
|
||||
|
||||
switch (op.ra)
|
||||
{
|
||||
case MFC_EAL:
|
||||
@ -5677,7 +5865,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
}
|
||||
case MFC_Cmd:
|
||||
{
|
||||
const auto [af, av, atagg, _3, _5, apc] = get_reg(op.rt);
|
||||
const auto [af, av, atagg, _3, _5, apc, ainst] = get_reg(op.rt);
|
||||
|
||||
if (!is_pattern_match)
|
||||
{
|
||||
@ -5896,7 +6084,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
break;
|
||||
default:
|
||||
{
|
||||
break_putllc16(6, atomic16.discard());
|
||||
break_all_patterns(6);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -5908,7 +6096,34 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
case spu_itype::RDCH:
|
||||
{
|
||||
const bool is_read = type == spu_itype::RDCH;
|
||||
bool invalidate = is_read;
|
||||
bool invalidate = true;
|
||||
|
||||
const auto it = rchcnt_loop_all.find(pos);
|
||||
|
||||
if (it != rchcnt_loop_all.end())
|
||||
{
|
||||
if (rchcnt_loop.failed || !rchcnt_loop.conditioned || rchcnt_loop.read_pc != pos)
|
||||
{
|
||||
// Propagate faiure
|
||||
it->second.failed = true;
|
||||
it->second.active = false;
|
||||
it->second.conditioned = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
it->second.active = false;
|
||||
}
|
||||
|
||||
rchcnt_loop.active = false;
|
||||
}
|
||||
|
||||
if (rchcnt_loop.active)
|
||||
{
|
||||
if (rchcnt_loop.read_pc != pos)
|
||||
{
|
||||
break_channel_pattern(53, rchcnt_loop.discard());
|
||||
}
|
||||
}
|
||||
|
||||
switch (op.ra)
|
||||
{
|
||||
@ -6025,6 +6240,25 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
break_putllc16(29, atomic16.discard());
|
||||
}
|
||||
|
||||
if (!is_pattern_match || is_read)
|
||||
{
|
||||
//
|
||||
}
|
||||
else if (!rchcnt_loop.active && it == rchcnt_loop_all.end())
|
||||
{
|
||||
rchcnt_loop.read_pc = pos;
|
||||
rchcnt_loop.channel = op.ra;
|
||||
rchcnt_loop.active = true;
|
||||
unconst(op.rt, pos);
|
||||
rchcnt_loop.ch_state = vregs[op.rt];
|
||||
invalidate = false;
|
||||
}
|
||||
else if (rchcnt_loop.active && it != rchcnt_loop_all.end())
|
||||
{
|
||||
// Success
|
||||
it->second.active = false;
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
default:
|
||||
@ -6424,7 +6658,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
case spu_itype::HBR:
|
||||
{
|
||||
hbr_loc = spu_branch_target(pos, op.roh << 7 | op.rt);
|
||||
const auto [af, av, at, ao, az, apc] = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
|
||||
hbr_tg = af & vf::is_const && !op.c ? av & 0x3fffc : -1;
|
||||
break;
|
||||
}
|
||||
@ -6492,8 +6726,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, av | bv, pos);
|
||||
break;
|
||||
@ -6508,7 +6742,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
|
||||
const auto ra = get_reg(op.ra);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, av ^ op.si10, pos);
|
||||
break;
|
||||
@ -6524,8 +6758,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, bv ^ av, pos);
|
||||
break;
|
||||
@ -6535,8 +6769,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, ~(bv | av), pos);
|
||||
break;
|
||||
@ -6558,8 +6792,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, bv & av, pos);
|
||||
break;
|
||||
@ -6573,7 +6807,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
}
|
||||
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, av + op.si10, pos);
|
||||
|
||||
@ -6590,8 +6824,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, bv + av, pos);
|
||||
|
||||
@ -6606,7 +6840,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
case spu_itype::SFI:
|
||||
{
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc] = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, op.si10 - av, pos);
|
||||
break;
|
||||
@ -6616,8 +6850,8 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto rb = get_reg(op.rb);
|
||||
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc] = rb;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
const auto [bf, bv, bt, bo, bz, bpc, binst] = rb;
|
||||
|
||||
inherit_const_value(op.rt, ra, rb, bv - av, pos);
|
||||
|
||||
@ -6656,7 +6890,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
}
|
||||
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc] = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc, ainst] = get_reg(op.ra);
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, av >> ((0 - op.i7) & 0x1f), pos);
|
||||
break;
|
||||
@ -6676,7 +6910,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
}
|
||||
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc] = ra;
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, av << (op.i7 & 0x1f), pos);
|
||||
break;
|
||||
@ -6690,6 +6924,30 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
vregs[op.rt4] = ra.merge(rb, pos);
|
||||
break;
|
||||
}
|
||||
case spu_itype::CEQI:
|
||||
{
|
||||
const auto ra = get_reg(op.ra);
|
||||
const auto [af, av, at, ao, az, apc, ainst] = ra;
|
||||
|
||||
inherit_const_value(op.rt, ra, ra, av == op.si10, pos);
|
||||
|
||||
if (rchcnt_loop.active)
|
||||
{
|
||||
if (ra.is_instruction && ra.origin == rchcnt_loop.ch_state.origin)
|
||||
{
|
||||
if (op.si10 != 0 && op.si10 != 1)
|
||||
{
|
||||
break_channel_pattern(55, rchcnt_loop.discard());
|
||||
break;
|
||||
}
|
||||
|
||||
rchcnt_loop.ch_product = vregs[op.rt];
|
||||
rchcnt_loop.product_test_negate = op.si10 == 1;
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
}
|
||||
case spu_itype::SHLQBYI:
|
||||
{
|
||||
if (op.i7 & 0x10)
|
||||
@ -6755,6 +7013,14 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
}
|
||||
|
||||
unconst(op_rt, reg_pos == SPU_LS_SIZE ? pos : reg_pos);
|
||||
|
||||
if (rchcnt_loop.active)
|
||||
{
|
||||
if (rchcnt_loop.origins.find_first_of(vregs[op_rt].origin) == umax)
|
||||
{
|
||||
rchcnt_loop.origins.push_back(vregs[op_rt].origin);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
break;
|
||||
@ -6881,6 +7147,27 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
|
||||
, pattern.mem_count, pattern.put_pc, value.type == v_relative, value.off18, value.type == v_const, value.type == v_reg2, value.reg, value.runtime16_select, entry_point, func_hash, +stats.nowrite, ++stats.single, +stats.all);
|
||||
}
|
||||
|
||||
for (const auto& [read_pc, pattern] : rchcnt_loop_all)
|
||||
{
|
||||
if (pattern.failed || pattern.read_pc == SPU_LS_SIZE)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
if (pattern.active)
|
||||
{
|
||||
spu_log.error("Channel loop error! (get_pc=0x%x, 0x%x-%s)", read_pc, entry_point, func_hash);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (inst_attr attr = m_inst_attrs[(read_pc - entry_point) / 4]; attr == inst_attr::none)
|
||||
{
|
||||
//add_pattern(false, inst_attr::ch_lop, get_pc - result.entry_point);
|
||||
|
||||
spu_log.success("Channel Loop Pattern Detected! (read_pc=0x%x, branch_pc=0x%x, branch_target=0x%x, 0x%x-%s)", read_pc, pattern.branch_pc, pattern.branch_target, entry_point, func_hash);
|
||||
}
|
||||
}
|
||||
|
||||
if (likely_putllc_loop && !had_putllc_evaluation)
|
||||
{
|
||||
spu_log.notice("Likely missed PUTLLC16 patterns. (entry=0x%x)", entry_point);
|
||||
|
||||
@ -209,6 +209,7 @@ public:
|
||||
u32 known_ones{};
|
||||
u32 known_zeroes{};
|
||||
u32 origin = SPU_LS_SIZE;
|
||||
bool is_instruction = false;
|
||||
|
||||
bool is_const() const;
|
||||
|
||||
@ -242,7 +243,7 @@ public:
|
||||
void invalidate_if_created(u32 current_pc);
|
||||
|
||||
template <usz Count = 1>
|
||||
static std::conditional_t<Count == 1, reg_state_t, std::array<reg_state_t, Count>> make_unknown(u32 pc) noexcept
|
||||
static std::conditional_t<Count == 1, reg_state_t, std::array<reg_state_t, Count>> make_unknown(u32 pc, u32 current_pc = SPU_LS_SIZE) noexcept
|
||||
{
|
||||
if constexpr (Count == 1)
|
||||
{
|
||||
@ -250,6 +251,7 @@ public:
|
||||
v.tag = alloc_tag();
|
||||
v.flag = {};
|
||||
v.origin = pc;
|
||||
v.is_instruction = pc == current_pc;
|
||||
return v;
|
||||
}
|
||||
else
|
||||
@ -258,13 +260,15 @@ public:
|
||||
|
||||
for (reg_state_t& state : result)
|
||||
{
|
||||
state = make_unknown<1>(pc);
|
||||
state = make_unknown<1>(pc, current_pc);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
}
|
||||
|
||||
bool compare_tags(const reg_state_t& rhs) const;
|
||||
|
||||
static reg_state_t from_value(u32 value) noexcept;
|
||||
static u32 alloc_tag(bool reset = false) noexcept;
|
||||
};
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user