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rsx: Minor FIFO cleanup
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parent
f43824762a
commit
940e726754
@ -21,6 +21,7 @@ namespace rsx
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{
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FIFO_control::FIFO_control(::rsx::thread* pctrl)
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{
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m_thread = pctrl;
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m_ctrl = pctrl->ctrl;
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m_iotable = &pctrl->iomap_table;
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}
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@ -53,7 +54,7 @@ namespace rsx
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while (read_put() == m_internal_get && !Emu.IsStopped())
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{
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get_current_renderer()->cpu_wait({});
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m_thread->cpu_wait({});
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}
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}
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}
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@ -124,6 +125,8 @@ namespace rsx
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// Find the next set bit after every iteration
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u64 start_time = 0;
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u32 bytes_read = 0;
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for (int i = 0;; i = (std::countr_zero<u32>(utils::rol8(to_fetch, 0 - i - 1)) + i + 1) % 8)
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{
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// If a reservation is being updated, try to load another
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@ -144,32 +147,41 @@ namespace rsx
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break;
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}
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bytes_read += 128;
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continue;
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}
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}
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if (!start_time)
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{
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if ((bytes_read << 1) >= m_cache_size)
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{
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// Cut our losses, we have enough to work with.
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m_cache_size = bytes_read;
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break;
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}
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start_time = rsx::uclock();
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}
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if (rsx::uclock() - start_time >= 50u)
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auto now = rsx::uclock();
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if (now - start_time >= 50u)
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{
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const auto rsx = get_current_renderer();
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if (rsx->is_stopped())
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if (m_thread->is_stopped())
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{
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return {};
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}
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rsx->cpu_wait({});
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m_thread->cpu_wait({});
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// Add idle time in reverse: after exchnage start_time becomes uclock(), use substruction because of the reversed order of parameters
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const u64 _start = std::exchange(start_time, rsx::uclock());
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rsx->performance_counters.idle_time -= _start - start_time;
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const auto then = std::exchange(now, rsx::uclock());
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start_time = now;
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m_thread->performance_counters.idle_time += now - then;
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}
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else
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{
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busy_wait(200);
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}
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busy_wait(200);
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if (g_cfg.core.rsx_fifo_accuracy >= rsx_fifo_mode::atomic_ordered)
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{
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@ -178,8 +190,7 @@ namespace rsx
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}
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}
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be_t<u32> ret;
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std::memcpy(&ret, reinterpret_cast<const u8*>(&m_cache) + (addr - m_cache_addr), sizeof(u32));
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const auto ret = utils::bless<const be_t<u32>>(&m_cache)[(addr - m_cache_addr) >> 2];
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return {true, ret};
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}
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@ -221,7 +232,7 @@ namespace rsx
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bool ok{};
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u32 arg = 0;
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if (g_cfg.core.rsx_fifo_accuracy)
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if (g_cfg.core.rsx_fifo_accuracy) [[ unlikely ]]
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{
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std::tie(ok, arg) = fetch_u32(m_internal_get + 4);
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@ -229,7 +240,7 @@ namespace rsx
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{
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if (arg == FIFO_ERROR)
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{
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get_current_renderer()->recover_fifo();
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m_thread->recover_fifo();
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}
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return false;
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@ -311,7 +322,7 @@ namespace rsx
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m_memwatch_cmp = 0;
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}
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if (!g_cfg.core.rsx_fifo_accuracy)
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if (!g_cfg.core.rsx_fifo_accuracy) [[ likely ]]
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{
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const u32 put = read_put();
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@ -113,6 +113,7 @@ namespace rsx
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class FIFO_control
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{
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private:
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mutable rsx::thread* m_thread;
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RsxDmaControl* m_ctrl = nullptr;
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const rsx::rsx_iomap_table* m_iotable;
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u32 m_internal_get = 0;
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@ -129,6 +130,7 @@ namespace rsx
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u32 m_cache_addr = 0;
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u32 m_cache_size = 0;
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alignas(64) std::byte m_cache[8][128];
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public:
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FIFO_control(rsx::thread* pctrl);
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~FIFO_control() = default;
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