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SPU/PPU LLVM: Improve 0 addend FMA detection (#8709)

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Eladash 2020-08-13 04:13:08 +03:00 committed by GitHub
parent 0f8ca1f7c5
commit 8cdfe5952a
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2 changed files with 22 additions and 2 deletions
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18
rpcs3/Emu/Cell/PPUTranslator.cpp
View File

@ -951,7 +951,14 @@ void PPUTranslator::VMADDFP(ppu_opcode_t op)
if (data == v128::from32p(1u << 31))
{
set_vr(op.vd, vec_handle_result(a * c));
ppu_log.notice("LLVM: VMADDFP with 0 addend at [0x%08x]", m_addr + (m_reloc ? m_reloc->addr : 0));
ppu_log.notice("LLVM: VMADDFP with -0 addend at [0x%08x]", m_addr + (m_reloc ? m_reloc->addr : 0));
return;
}
if (!m_use_fma && data == v128{})
{
set_vr(op.vd, vec_handle_result(a * c + fsplat<f32[4]>(0.f)));
ppu_log.notice("LLVM: VMADDFP with -0 addend at [0x%08x]", m_addr + (m_reloc ? m_reloc->addr : 0));
return;
}
}
@ -1258,12 +1265,19 @@ void PPUTranslator::VNMSUBFP(ppu_opcode_t op)
ppu_log.notice("LLVM: VNMSUBFP with 0 addend at [0x%08x]", m_addr + (m_reloc ? m_reloc->addr : 0));
return;
}
if (!m_use_fma && data == v128::from32p(1u << 31))
{
set_vr(op.vd, vec_handle_result(-a * c + fsplat<f32[4]>(0.f)));
ppu_log.notice("LLVM: VNMSUBFP with -0 addend at [0x%08x]", m_addr + (m_reloc ? m_reloc->addr : 0));
return;
}
}
// Differs from the emulated path with regards to negative zero
if (m_use_fma)
{
SetVr(op.vd, VecHandleResult(m_ir->CreateFNeg(m_ir->CreateCall(get_intrinsic<f32[4]>(llvm::Intrinsic::fma), { a.value, c.value, m_ir->CreateFNeg(b.value) }))));
SetVr(op.vd, VecHandleResult(m_ir->CreateCall(get_intrinsic<f32[4]>(llvm::Intrinsic::fma), { m_ir->CreateFNeg(a.value), c.value, b.value })));
return;
}

6
rpcs3/Emu/Cell/SPURecompiler.cpp
View File

@ -7733,6 +7733,12 @@ public:
r = eval(a * b);
return r;
}
if (!m_use_fma && is_spu_float_zero(data, +1))
{
r = eval(a * b + fsplat<f32[4]>(0.f));
return r;
}
}
if ([&]()