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Implement mov_rdata_avx
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c5d390c979
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@ -41,8 +41,42 @@ static FORCE_INLINE bool cmp_rdata(const decltype(spu_thread::rdata)& lhs, const
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return !(r._u64[0] | r._u64[1]);
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}
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static FORCE_INLINE void mov_rdata_avx(__m256i* dst, const __m256i* src)
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{
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#if defined(_MSC_VER) || defined(__AVX__)
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_mm256_storeu_si256(dst + 0, _mm256_loadu_si256(src + 0));
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_mm256_storeu_si256(dst + 1, _mm256_loadu_si256(src + 1));
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_mm256_storeu_si256(dst + 2, _mm256_loadu_si256(src + 2));
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_mm256_storeu_si256(dst + 3, _mm256_loadu_si256(src + 3));
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#else
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__asm__(
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"vmovdqu 0*32(%[src]), %%ymm0;" // load
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"vmovdqu %%ymm0, 0*32(%[dst]);" // store
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"vmovdqu 1*32(%[src]), %%ymm0;"
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"vmovdqu %%ymm0, 1*32(%[dst]);"
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"vmovdqu 2*32(%[src]), %%ymm0;"
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"vmovdqu %%ymm0, 2*32(%[dst]);"
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"vmovdqu 3*32(%[src]), %%ymm0;"
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"vmovdqu %%ymm0, 3*32(%[dst]);"
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"vzeroupper"
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:
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: [src] "r" (src)
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, [dst] "r" (dst)
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: "xmm0"
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);
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#endif
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}
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static FORCE_INLINE void mov_rdata(decltype(spu_thread::rdata)& dst, const decltype(spu_thread::rdata)& src)
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{
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#ifndef __AVX__
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if (s_tsx_avx) [[likely]]
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#endif
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{
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mov_rdata_avx(reinterpret_cast<__m256i*>(&dst), reinterpret_cast<const __m256i*>(&src));
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return;
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}
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{
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const v128 data0 = src[0];
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const v128 data1 = src[1];
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