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Add conditional reservation update to STW
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@ -4405,7 +4405,15 @@ bool ppu_interpreter::LBZU(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STW(ppu_thread& ppu, ppu_opcode_t op)
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bool ppu_interpreter::STW(ppu_thread& ppu, ppu_opcode_t op)
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{
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{
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const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
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const u64 addr = op.ra ? ppu.gpr[op.ra] + op.simm16 : op.simm16;
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vm::write32(vm::cast(addr, HERE), (u32)ppu.gpr[op.rs]);
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const u32 value = (u32)ppu.gpr[op.rs];
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vm::write32(vm::cast(addr, HERE), value);
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//Insomniac engine v3 & v4 (newer R&C, Fuse, Resitance 3)
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if (UNLIKELY(value == 0xAAAAAAAA))
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{
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vm::reservation_update(addr, 128);
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}
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return true;
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return true;
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}
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}
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@ -1309,6 +1309,7 @@ extern void ppu_initialize(const ppu_module& info)
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{ "__lvrx", s_use_ssse3 ? (u64)&sse_cellbe_lvrx : (u64)&sse_cellbe_lvrx_v0 },
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{ "__lvrx", s_use_ssse3 ? (u64)&sse_cellbe_lvrx : (u64)&sse_cellbe_lvrx_v0 },
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{ "__stvlx", s_use_ssse3 ? (u64)&sse_cellbe_stvlx : (u64)&sse_cellbe_stvlx_v0 },
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{ "__stvlx", s_use_ssse3 ? (u64)&sse_cellbe_stvlx : (u64)&sse_cellbe_stvlx_v0 },
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{ "__stvrx", s_use_ssse3 ? (u64)&sse_cellbe_stvrx : (u64)&sse_cellbe_stvrx_v0 },
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{ "__stvrx", s_use_ssse3 ? (u64)&sse_cellbe_stvrx : (u64)&sse_cellbe_stvrx_v0 },
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{ "__resupdate", (u64)&vm::reservation_update },
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};
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};
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for (u64 index = 0; index < 1024; index++)
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for (u64 index = 0; index < 1024; index++)
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@ -3407,7 +3407,18 @@ void PPUTranslator::STW(ppu_opcode_t op)
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m_rel = nullptr;
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m_rel = nullptr;
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}
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}
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WriteMemory(op.ra ? m_ir->CreateAdd(GetGpr(op.ra), imm) : imm, GetGpr(op.rs, 32));
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const auto value = GetGpr(op.rs, 32);
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const auto addr = op.ra ? m_ir->CreateAdd(GetGpr(op.ra), imm) : imm;
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WriteMemory(addr, value);
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//Insomniac engine v3 & v4 (newer R&C, Fuse, Resitance 3)
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if (auto ci = llvm::dyn_cast<ConstantInt>(value))
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{
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if (ci->getZExtValue() == 0xAAAAAAAA)
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{
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Call(GetType<void>(), "__resupdate", m_thread, addr, m_ir->getInt32(128));
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}
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}
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}
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}
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void PPUTranslator::STWU(ppu_opcode_t op)
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void PPUTranslator::STWU(ppu_opcode_t op)
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