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sys_rsx: Warn if RSX is not idle during crucial points
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1f9f455801
commit
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@ -309,6 +309,11 @@ error_code sys_rsx_context_iomap(u32 context_id, u32 io, u32 ea, u32 size, u64 f
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return CELL_EINVAL;
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return CELL_EINVAL;
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}
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}
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if (!render->is_fifo_idle())
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{
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sys_rsx.warning("sys_rsx_context_iomap(): RSX is not idle while mapping io");
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}
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vm::reader_lock rlock;
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vm::reader_lock rlock;
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for (u32 addr = ea, end = ea + size; addr < end; addr += 0x100000)
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for (u32 addr = ea, end = ea + size; addr < end; addr += 0x100000)
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@ -355,6 +360,11 @@ error_code sys_rsx_context_iounmap(u32 context_id, u32 io, u32 size)
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return CELL_EINVAL;
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return CELL_EINVAL;
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}
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}
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if (!render->is_fifo_idle())
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{
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sys_rsx.warning("sys_rsx_context_iounmap(): RSX is not idle while unmapping io");
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}
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vm::reader_lock rlock;
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vm::reader_lock rlock;
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std::scoped_lock lock(s_rsxmem_mtx);
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std::scoped_lock lock(s_rsxmem_mtx);
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@ -549,6 +559,11 @@ error_code sys_rsx_context_attribute(u32 context_id, u32 package_id, u64 a3, u64
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verify(HERE), a3 < std::size(render->tiles);
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verify(HERE), a3 < std::size(render->tiles);
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if (!render->is_fifo_idle())
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{
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sys_rsx.warning("sys_rsx_context_attribute(): RSX is not idle while setting tile");
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}
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auto& tile = render->tiles[a3];
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auto& tile = render->tiles[a3];
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const u32 location = ((a4 >> 32) & 0x3) - 1;
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const u32 location = ((a4 >> 32) & 0x3) - 1;
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@ -629,6 +644,11 @@ error_code sys_rsx_context_attribute(u32 context_id, u32 package_id, u64 a3, u64
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verify(HERE), a3 < std::size(render->zculls);
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verify(HERE), a3 < std::size(render->zculls);
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if (!render->is_fifo_idle())
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{
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sys_rsx.warning("sys_rsx_context_attribute(): RSX is not idle while setting zcull");
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}
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const u32 offset = (a5 & 0xFFFFFFFF);
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const u32 offset = (a5 & 0xFFFFFFFF);
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const bool binded = (a6 & 0xFFFFFFFF) != 0;
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const bool binded = (a6 & 0xFFFFFFFF) != 0;
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@ -200,7 +200,7 @@ namespace rsx
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continue;
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continue;
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// wait until rsx idle and at our first 'stop' to apply state
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// wait until rsx idle and at our first 'stop' to apply state
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while (!Emu.IsStopped() && (render->ctrl->get != render->ctrl->put) && (render->ctrl->get != fifo_stops[stopIdx]))
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while (!Emu.IsStopped() && !render->is_fifo_idle() && (render->ctrl->get != fifo_stops[stopIdx]))
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{
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{
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while (Emu.IsPaused())
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while (Emu.IsPaused())
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std::this_thread::sleep_for(10ms);
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std::this_thread::sleep_for(10ms);
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@ -222,7 +222,7 @@ namespace rsx
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u32 end = fifo_stops.back();
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u32 end = fifo_stops.back();
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render->ctrl->put = end;
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render->ctrl->put = end;
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while (render->ctrl->get != end && !Emu.IsStopped())
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while (!render->is_fifo_idle() && !Emu.IsStopped())
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{
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{
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while (Emu.IsPaused())
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while (Emu.IsPaused())
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std::this_thread::sleep_for(10ms);
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std::this_thread::sleep_for(10ms);
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@ -2262,6 +2262,11 @@ namespace rsx
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zcull_ctrl->on_sync_hint(args);
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zcull_ctrl->on_sync_hint(args);
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}
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}
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bool thread::is_fifo_idle() const
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{
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return ctrl->get == (ctrl->put & ~3);
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}
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void thread::flush_fifo()
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void thread::flush_fifo()
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{
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{
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// Make sure GET value is exposed before sync points
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// Make sure GET value is exposed before sync points
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@ -622,6 +622,7 @@ namespace rsx
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u32 restore_point = 0;
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u32 restore_point = 0;
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atomic_t<u32> external_interrupt_lock{ 0 };
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atomic_t<u32> external_interrupt_lock{ 0 };
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atomic_t<bool> external_interrupt_ack{ false };
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atomic_t<bool> external_interrupt_ack{ false };
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bool is_fifo_idle() const;
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void flush_fifo();
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void flush_fifo();
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void recover_fifo();
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void recover_fifo();
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static void fifo_wake_delay(u64 div = 1);
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static void fifo_wake_delay(u64 div = 1);
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