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rsx/vk: Initial hw-accelerated tile decoder
This commit is contained in:
kd-11
kd-11
parent
6a7386ddb8
commit
647f7ddeec
349
rpcs3/Emu/RSX/Program/GLSLSnippets/RSXMemoryTiling.glsl
Normal file
349
rpcs3/Emu/RSX/Program/GLSLSnippets/RSXMemoryTiling.glsl
Normal file
@ -0,0 +1,349 @@
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R"(
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#version 450
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layout(local_size_x = %ws, local_size_y = 1, local_size_z = 1) in;
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#define SSBO_LOCATION(x) (x + %loc)
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#define MEMORY_OP %op
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#define MEMORY_OP_DETILE 0
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#define MEMORY_OP_TILE 1
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#if (MEMORY_OP == MEMORY_OP_TILE)
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#define TILED_DATA_MODIFIER
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#define LINEAR_DATA_MODIFIER readonly
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#else
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#define TILED_DATA_MODIFIER readonly
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#define LINEAR_DATA_MODIFIER
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#endif
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layout(%set, binding=SSBO_LOCATION(0), std430) TILED_DATA_MODIFIER restrict buffer TiledDataBlock
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{
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uint tiled_data[];
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};
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layout(%set, binding=SSBO_LOCATION(1), std430) LINEAR_DATA_MODIFIER restrict buffer LinearDataBlock
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{
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uint linear_data[];
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};
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#ifdef VULKAN
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layout(%push_block) uniform Configuration
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{
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uint prime;
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uint factor;
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uint num_tiles_per_row;
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uint tile_base_address;
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uint tile_size;
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uint tile_offset;
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uint tile_pitch;
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uint tile_bank;
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uint image_width;
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uint image_height;
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uint image_bpp;
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};
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#else
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uniform uint prime;
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uniform uint factor;
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uniform uint num_tiles_per_row;
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uniform uint tile_base_address;
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uniform uint tile_size;
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uniform uint tile_offset;
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uniform uint tile_pitch;
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uniform uint tile_bank;
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uniform uint image_width;
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uniform uint image_height;
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uniform uint image_bpp;
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#endif
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// Constants
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#define RSX_TILE_WIDTH 256
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#define RSX_TILE_HEIGHT 64
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#if (MEMORY_OP == MEMORY_OP_TILE)
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uvec4 read_linear(const in uint offset)
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{
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switch (image_bpp)
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{
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case 16:
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{
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return uvec4(
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linear_data[offset * 4],
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linear_data[offset * 4 + 1],
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linear_data[offset * 4 + 2],
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linear_data[offset * 4 + 3]);
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}
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case 8:
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{
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return uvec4(
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linear_data[offset * 2],
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linear_data[offset * 2 + 1],
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0,
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0);
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}
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case 4:
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{
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return uvec4(linear_data[offset], 0, 0, 0);
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}
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case 2:
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{
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const uint word = linear_data[offset >> 1];
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const int shift = int(offset & 1) << 4;
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return uvec4(bitfieldExtract(word, shift, 16), 0, 0, 0);
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}
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case 1:
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{
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const uint word = linear_data[offset >> 2];
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const int shift = int(offset & 3) << 3;
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return uvec4(bitfieldExtract(word, shift, 8), 0, 0, 0);
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}
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default:
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return uvec4(0);
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}
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}
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void write_tiled(const in uint offset, const in uvec4 value)
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{
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switch (image_bpp)
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{
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case 16:
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{
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tiled_data[offset * 4] = value.x;
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tiled_data[offset * 4 + 1] = value.y;
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tiled_data[offset * 4 + 2] = value.z;
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tiled_data[offset * 4 + 3] = value.w;
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break;
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}
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case 8:
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{
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tiled_data[offset * 2] = value.x;
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tiled_data[offset * 2 + 1] = value.y;
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break;
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}
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case 4:
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{
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tiled_data[offset] = value.x;
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break;
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}
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case 2:
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{
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const uint word_offset = offset >> 1;
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const uint word = tiled_data[word_offset];
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const int shift = int(offset & 1) << 4;
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tiled_data[word_offset] = bitfieldInsert(word, value.x, shift, 16);
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break;
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}
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case 1:
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{
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const uint word_offset = offset >> 2;
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const uint word = tiled_data[word_offset];
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const int shift = int(offset & 3) << 3;
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tiled_data[word_offset] = bitfieldInsert(word, value.x, shift, 8);
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break;
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}
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default:
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break;
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}
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}
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#else
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uvec4 read_tiled(const in uint offset)
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{
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switch (image_bpp)
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{
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case 16:
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{
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return uvec4(
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tiled_data[offset * 4],
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tiled_data[offset * 4 + 1],
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tiled_data[offset * 4 + 2],
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tiled_data[offset * 4 + 3]);
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}
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case 8:
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{
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return uvec4(
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tiled_data[offset * 2],
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tiled_data[offset * 2 + 1],
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0,
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0);
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}
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case 4:
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{
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return uvec4(tiled_data[offset], 0, 0, 0);
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}
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case 2:
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{
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const uint word = tiled_data[offset >> 1];
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const int shift = int(offset & 1) << 4;
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return uvec4(bitfieldExtract(word, shift, 16), 0, 0, 0);
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}
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case 1:
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{
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const uint word = tiled_data[offset >> 2];
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const int shift = int(offset & 3) << 3;
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return uvec4(bitfieldExtract(word, shift, 8), 0, 0, 0);
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}
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default:
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return uvec4(0);
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}
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}
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void write_linear(const in uint offset, const in uvec4 value)
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{
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switch (image_bpp)
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{
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case 16:
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{
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linear_data[offset * 4] = value.x;
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linear_data[offset * 4 + 1] = value.y;
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linear_data[offset * 4 + 2] = value.z;
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linear_data[offset * 4 + 3] = value.w;
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break;
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}
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case 8:
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{
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linear_data[offset * 2] = value.x;
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linear_data[offset * 2 + 1] = value.y;
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break;
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}
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case 4:
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{
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linear_data[offset] = value.x;
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break;
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}
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case 2:
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{
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const uint word_offset = offset >> 1;
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const uint word = linear_data[word_offset];
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const int shift = int(offset & 1) << 4;
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linear_data[word_offset] = bitfieldInsert(word, value.x, shift, 16);
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break;
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}
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case 1:
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{
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const uint word_offset = offset >> 2;
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const uint word = linear_data[word_offset];
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const int shift = int(offset & 3) << 3;
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linear_data[word_offset] = bitfieldInsert(word, value.x, shift, 8);
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break;
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}
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default:
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break;
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}
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}
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#endif
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void do_memory_op(const in uint row, const in uint col)
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{
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const uint row_offset = (row * tile_pitch) + tile_base_address + tile_offset;
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const uint this_address = row_offset + (col * image_bpp);
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// 1. Calculate row_addr
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const uint texel_offset = (this_address - tile_base_address) / RSX_TILE_WIDTH;
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// Calculate coordinate of the tile grid we're supposed to be in
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const uint tile_x = texel_offset % num_tiles_per_row;
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const uint tile_y = (texel_offset / num_tiles_per_row) / RSX_TILE_HEIGHT;
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// Calculate the grid offset for the tile selected and add the base offset. It's supposed to affect the bank stuff in the next step
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const uint tile_id = tile_y * num_tiles_per_row + tile_x;
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const uint tile_selector = (tile_id + (tile_base_address >> 14)) & 0x3ffff;
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// Calculate row address
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const uint row_address = (tile_selector >> 2) & 0xffff;
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// 2. Calculate bank selector
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// There's a lot of weird math here, but it's just a variant of (tile_selector % 4) to pick a value between [0..3]
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uint bank_selector = 0;
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const uint bank_distribution_lookup[16] = { 0, 1, 2, 3, 2, 3, 0, 1, 1, 2, 3, 0, 3, 0, 1, 2 };
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if (factor == 1)
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{
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bank_selector = (tile_selector & 3);
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}
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else if (factor == 2)
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{
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const uint idx = ((tile_selector + ((tile_y & 1) << 1)) & 3) * 4 + (tile_y & 3);
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bank_selector = bank_distribution_lookup[idx];
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}
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else if (factor >= 4)
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{
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const uint idx = (tile_selector & 3) * 4 + (tile_y & 3);
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bank_selector = bank_distribution_lookup[idx];
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}
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bank_selector = (bank_selector + tile_bank) % 4;
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// 3. Calculate column selector
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uint column_selector = 0;
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const uint line_offset_in_tile = (texel_offset / num_tiles_per_row) % RSX_TILE_HEIGHT;
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// Calculate column_selector by bit-twiddling line offset and the other calculated parameter bits:
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// column_selector[9:7] = line_offset_in_tile[5:3]
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// column_selector[6:4] = this_address[7:5]
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// column_selector[3:2] = line_offset_in_tile[1:0]
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// column_selector[1:0] = 0
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column_selector |= ((line_offset_in_tile >> 3) & 0x7) << 7;
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column_selector |= ((this_address >> 5) & 0x7) << 4;
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column_selector |= ((line_offset_in_tile >> 0) & 0x3) << 2;
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// 4. Calculate partition selector (0 or 1)
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const uint partition_selector = (((line_offset_in_tile >> 2) & 1) + ((this_address >> 6) & 1)) & 1;
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// 5. Build tiled address
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uint tile_address = 0;
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// tile_address[31:16] = row_adr[15:0]
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// tile_address[15:14] = bank_sel[1:0]
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// tile_address[13:8] = column_sel[9:4]
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// tile_address[7:7] = partition_sel[0:0]
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// tile_address[6:5] = column_sel[3:2]
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// tile_address[4:0] = this_address[4:0]
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tile_address |= ((row_address >> 0) & 0xFFFF) << 16;
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tile_address |= ((bank_selector >> 0) & 0x3) << 14;
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tile_address |= ((column_selector >> 4) & 0x3F) << 8;
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tile_address |= ((partition_selector >> 0) & 0x1) << 7;
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tile_address |= ((column_selector >> 2) & 0x3) << 5;
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tile_address |= ((this_address >> 0) & 0x1F) << 0;
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// Twiddle bits 9 and 10
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tile_address ^= (((tile_address >> 12) ^ ((bank_selector ^ tile_selector) & 1) ^ (tile_address >> 14)) & 1) << 9;
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tile_address ^= ((tile_address >> 11) & 1) << 10;
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// Calculate relative addresses and sample
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uint linear_image_offset = (row * tile_pitch) + (col * image_bpp);
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uint tile_data_offset = tile_address - (tile_base_address + tile_offset);
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if (tile_data_offset >= tile_size)
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{
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// Do not touch anything out of bounds
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return;
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}
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// Convert to texel addresses for data access
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linear_image_offset /= image_bpp;
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tile_data_offset /= image_bpp;
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#if (MEMORY_OP == MEMORY_OP_DETILE)
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// Write to linear from tiled
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write_linear(linear_image_offset, read_tiled(tile_data_offset));
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#else
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// Opposite. Write to tile from linear
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write_tiled(tile_data_offset, read_linear(linear_image_offset));
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#endif
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}
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void main()
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{
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// The 2D coordinates are retrieved from gl_GlobalInvocationID
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const uint num_iterations = (image_bpp < 4) ? (4 / image_bpp) : 1;
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const uint row = gl_GlobalInvocationID.y;
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const uint col0 = gl_GlobalInvocationID.x;
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// for (uint col = col0; col < (col0 + num_iterations); ++col)
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{
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if (row >= image_height || col0 >= image_width)
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{
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// Out of bounds
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return;
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}
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do_memory_op(row, col0);
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}
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}
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)"
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@ -502,6 +502,159 @@ namespace vk
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void run(const vk::command_buffer& cmd, const vk::buffer* dst, const vk::buffer* src, u32 num_words);
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};
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enum RSX_detiler_op
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{
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decode = 0,
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encode = 1
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};
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struct RSX_detiler_config
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{
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u32 tile_base_address;
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u32 tile_base_offset;
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u32 tile_size;
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u32 tile_pitch;
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u32 bank;
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const vk::buffer* dst;
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u32 dst_offset;
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const vk::buffer* src;
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u32 src_offset;
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u16 image_width;
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u16 image_height;
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u32 image_pitch;
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};
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template <RSX_detiler_op Op>
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struct cs_tile_memcpy : compute_task
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{
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#pragma pack (push, 1)
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struct
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{
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u32 prime;
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u32 factor;
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u32 num_tiles_per_row;
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u32 tile_base_address;
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u32 tile_size;
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u32 tile_offset;
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u32 tile_pitch;
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u32 tile_bank;
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u32 image_width;
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u32 image_height;
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u32 image_bpp;
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} params;
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#pragma pack (pop)
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const vk::buffer* src_buffer = nullptr;
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const vk::buffer* dst_buffer = nullptr;
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u32 in_offset = 0;
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u32 out_offset = 0;
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u32 in_block_length = 0;
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u32 out_block_length = 0;
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cs_tile_memcpy()
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{
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ssbo_count = 2;
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use_push_constants = true;
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push_constants_size = 44;
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create();
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m_src =
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#include "../Program/GLSLSnippets/RSXMemoryTiling.glsl"
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;
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optimal_group_size = 1;
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const std::pair<std::string_view, std::string> syntax_replace[] =
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{
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{ "%loc", "0" },
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{ "%set", "set = 0" },
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{ "%push_block", "push_constant" },
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{ "%ws", std::to_string(optimal_group_size) },
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{ "%op", std::to_string(Op) }
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};
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m_src = fmt::replace_all(m_src, syntax_replace);
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}
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void bind_resources() override
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{
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const auto op = static_cast<int>(Op);
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m_program->bind_buffer({ src_buffer->value, in_offset, in_block_length }, 0 ^ op, VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, m_descriptor_set);
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m_program->bind_buffer({ dst_buffer->value, out_offset, out_block_length }, 1 ^ op, VK_DESCRIPTOR_TYPE_STORAGE_BUFFER, m_descriptor_set);
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}
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void set_parameters(const vk::command_buffer& cmd)
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{
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vkCmdPushConstants(cmd, m_pipeline_layout, VK_SHADER_STAGE_COMPUTE_BIT, 0, push_constants_size, ¶ms);
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}
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void run(const vk::command_buffer& cmd, const RSX_detiler_config& config)
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{
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dst_buffer = config.dst;
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src_buffer = config.src;
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this->in_offset = config.src_offset;
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this->out_offset = config.dst_offset;
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const auto tiled_height = std::min(
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utils::align<u32>(config.image_height, 64),
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utils::aligned_div(config.tile_size - config.tile_base_offset, config.tile_pitch)
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);
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if constexpr (Op == RSX_detiler_op::decode)
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{
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this->in_block_length = tiled_height * config.tile_pitch;
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this->out_block_length = config.image_height * config.image_pitch;
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}
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else
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{
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this->in_block_length = config.image_height * config.image_pitch;
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this->out_block_length = tiled_height* config.tile_pitch;
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}
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auto get_prime_factor = [](u32 pitch) -> std::pair<u32, u32>
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{
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const u32 base = (pitch >> 8);
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if ((pitch & (pitch - 1)) == 0)
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{
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return { 1u, base };
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}
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for (const auto prime : { 3, 5, 7, 11, 13 })
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{
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if ((base % prime) == 0)
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{
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return { prime, base / prime };
|
||||
}
|
||||
}
|
||||
|
||||
rsx_log.error("Unexpected pitch value 0x%x", pitch);
|
||||
return {};
|
||||
};
|
||||
|
||||
const auto [prime, factor] = get_prime_factor(config.tile_pitch);
|
||||
const u32 tiles_per_row = prime * factor;
|
||||
|
||||
params.prime = prime;
|
||||
params.factor = factor;
|
||||
params.num_tiles_per_row = tiles_per_row;
|
||||
params.tile_base_address = config.tile_base_address;
|
||||
params.tile_size = config.tile_size;
|
||||
params.tile_offset = config.tile_base_offset;
|
||||
params.tile_pitch = config.tile_pitch;
|
||||
params.tile_bank = config.bank;
|
||||
params.image_width = config.image_width;
|
||||
params.image_height = config.image_height;
|
||||
params.image_bpp = config.image_pitch / config.image_width;
|
||||
set_parameters(cmd);
|
||||
|
||||
const u32 invocations_x = utils::aligned_div(config.image_width, optimal_group_size);
|
||||
compute_task::run(cmd, invocations_x, config.image_height, 1);
|
||||
}
|
||||
};
|
||||
|
||||
// TODO: Replace with a proper manager
|
||||
extern std::unordered_map<u32, std::unique_ptr<vk::compute_task>> g_compute_tasks;
|
||||
|
||||
|
||||
@ -92,16 +92,24 @@ namespace vk
|
||||
rsx_pitch = pitch;
|
||||
|
||||
const bool require_format_conversion = !!(src->aspect() & VK_IMAGE_ASPECT_STENCIL_BIT) || src->format() == VK_FORMAT_D32_SFLOAT;
|
||||
const auto tiled_region = rsx::get_current_renderer()->get_tiled_memory_region(valid_range);
|
||||
const bool require_tiling = !!tiled_region;
|
||||
const bool require_gpu_transform = require_format_conversion || pack_unpack_swap_bytes || require_tiling;
|
||||
auto dma_mapping = vk::map_dma(valid_range.start, valid_range.length());
|
||||
|
||||
if (require_format_conversion || pack_unpack_swap_bytes)
|
||||
if (require_gpu_transform)
|
||||
{
|
||||
const auto section_length = valid_range.length();
|
||||
const auto transfer_pitch = real_pitch;
|
||||
const auto task_length = transfer_pitch * src_area.height();
|
||||
const auto working_buffer_length = calculate_working_buffer_size(task_length, src->aspect());
|
||||
auto working_buffer_length = calculate_working_buffer_size(task_length, src->aspect());
|
||||
|
||||
if (require_tiling) {
|
||||
working_buffer_length += tiled_region.tile->size;
|
||||
}
|
||||
|
||||
auto working_buffer = vk::get_scratch_buffer(cmd, working_buffer_length);
|
||||
u32 result_offset = 0;
|
||||
|
||||
VkBufferImageCopy region = {};
|
||||
region.imageSubresource = { src->aspect(), 0, 0, 1 };
|
||||
@ -142,17 +150,56 @@ namespace vk
|
||||
|
||||
shuffle_kernel->run(cmd, working_buffer, task_length);
|
||||
|
||||
vk::insert_buffer_memory_barrier(cmd, working_buffer->value, 0, task_length,
|
||||
VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT,
|
||||
VK_ACCESS_SHADER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT);
|
||||
if (!require_tiling)
|
||||
{
|
||||
vk::insert_buffer_memory_barrier(cmd, working_buffer->value, 0, task_length,
|
||||
VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT,
|
||||
VK_ACCESS_SHADER_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT);
|
||||
|
||||
require_rw_barrier = false;
|
||||
require_rw_barrier = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (require_tiling)
|
||||
{
|
||||
#if !DEBUG_DMA_TILING
|
||||
// Compute -> Compute barrier
|
||||
vk::insert_buffer_memory_barrier(cmd, working_buffer->value, 0, task_length,
|
||||
VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT,
|
||||
VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_ACCESS_SHADER_READ_BIT);
|
||||
|
||||
// Prepare payload
|
||||
const RSX_detiler_config config =
|
||||
{
|
||||
.tile_base_address = tiled_region.base_address,
|
||||
.tile_base_offset = valid_range.start - tiled_region.base_address,
|
||||
.tile_size = tiled_region.tile->size,
|
||||
.tile_pitch = tiled_region.tile->pitch,
|
||||
.bank = tiled_region.tile->bank,
|
||||
|
||||
.dst = working_buffer,
|
||||
.dst_offset = task_length,
|
||||
.src = working_buffer,
|
||||
.src_offset = 0,
|
||||
|
||||
.image_width = width,
|
||||
.image_height = height,
|
||||
.image_pitch = real_pitch
|
||||
};
|
||||
|
||||
// Execute
|
||||
const auto job = vk::get_compute_task<vk::cs_tile_memcpy<RSX_detiler_op::encode>>();
|
||||
job->run(cmd, config);
|
||||
|
||||
result_offset = task_length;
|
||||
require_rw_barrier = true;
|
||||
#endif
|
||||
}
|
||||
|
||||
if (require_rw_barrier)
|
||||
{
|
||||
vk::insert_buffer_memory_barrier(cmd, working_buffer->value, 0, working_buffer_length,
|
||||
vk::insert_buffer_memory_barrier(cmd, working_buffer->value, result_offset, working_buffer_length,
|
||||
VK_PIPELINE_STAGE_TRANSFER_BIT | VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
|
||||
VK_ACCESS_TRANSFER_WRITE_BIT | VK_ACCESS_SHADER_WRITE_BIT, VK_ACCESS_SHADER_READ_BIT);
|
||||
}
|
||||
@ -160,6 +207,7 @@ namespace vk
|
||||
if (rsx_pitch == real_pitch) [[likely]]
|
||||
{
|
||||
VkBufferCopy copy = {};
|
||||
copy.srcOffset = result_offset;
|
||||
copy.dstOffset = dma_mapping.first;
|
||||
copy.size = section_length;
|
||||
vkCmdCopyBuffer(cmd, working_buffer->value, dma_mapping.second->value, 1, ©);
|
||||
@ -178,7 +226,7 @@ namespace vk
|
||||
copy.reserve(transfer_height);
|
||||
|
||||
u32 dst_offset = dma_mapping.first;
|
||||
u32 src_offset = 0;
|
||||
u32 src_offset = result_offset;
|
||||
|
||||
for (unsigned row = 0; row < transfer_height; ++row)
|
||||
{
|
||||
|
||||
@ -14,7 +14,7 @@
|
||||
#include <memory>
|
||||
#include <vector>
|
||||
|
||||
#define DEBUG_DMA_TILING 1
|
||||
#define DEBUG_DMA_TILING 0
|
||||
|
||||
#if DEBUG_DMA_TILING
|
||||
#include "../Common/tiled_dma_copy.hpp"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user