mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-03-14 10:21:21 +00:00
Merge pull request #847 from gopalsr83/ppu_llvm_recompiler
PPU Recompiler (LLVM)
This commit is contained in:
Alexandro Sánchez Bach
commit
5d1cafdebc
1
.gitignore
vendored
1
.gitignore
vendored
@ -36,6 +36,7 @@
|
||||
/ipch
|
||||
/rpcs3/Debug
|
||||
/rpcs3/Release
|
||||
/llvm_build
|
||||
|
||||
/wxWidgets/lib
|
||||
/bin/rpcs3.ini
|
||||
|
||||
4
.gitmodules
vendored
4
.gitmodules
vendored
@ -8,3 +8,7 @@
|
||||
[submodule "asmjit"]
|
||||
path = asmjit
|
||||
url = https://github.com/kobalicekp/asmjit
|
||||
[submodule "llvm"]
|
||||
path = llvm
|
||||
url = https://github.com/llvm-mirror/llvm.git
|
||||
branch = release_35
|
||||
|
||||
@ -27,7 +27,12 @@ before_install:
|
||||
sudo ./cmake-3.0.0-Linux-i386.sh --skip-license --prefix=/usr;
|
||||
|
||||
before_script:
|
||||
- git submodule update --init asmjit ffmpeg
|
||||
- git submodule update --init asmjit ffmpeg llvm
|
||||
- cd llvm_build
|
||||
- cmake -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
- make -j 4
|
||||
- sudo make install
|
||||
- cd ..
|
||||
- mkdir build
|
||||
- cd build
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||||
- cmake ..
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
#pragma once
|
||||
|
||||
union u128
|
||||
union _CRT_ALIGN(16) u128
|
||||
{
|
||||
u64 _u64[2];
|
||||
s64 _s64[2];
|
||||
|
||||
1
llvm
Submodule
1
llvm
Submodule
@ -0,0 +1 @@
|
||||
Subproject commit f55c17bc3395fa7fdbd997d751a55de5228ebd77
|
||||
68
llvm_build/llvm_build.vcxproj
Normal file
68
llvm_build/llvm_build.vcxproj
Normal file
@ -0,0 +1,68 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project DefaultTargets="Build" ToolsVersion="12.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<ItemGroup Label="ProjectConfigurations">
|
||||
<ProjectConfiguration Include="Debug|x64">
|
||||
<Configuration>Debug</Configuration>
|
||||
<Platform>x64</Platform>
|
||||
</ProjectConfiguration>
|
||||
<ProjectConfiguration Include="Release|x64">
|
||||
<Configuration>Release</Configuration>
|
||||
<Platform>x64</Platform>
|
||||
</ProjectConfiguration>
|
||||
</ItemGroup>
|
||||
<PropertyGroup Label="Globals">
|
||||
<ProjectGuid>{8BC303AB-25BE-4276-8E57-73F171B2D672}</ProjectGuid>
|
||||
<Keyword>MakeFileProj</Keyword>
|
||||
</PropertyGroup>
|
||||
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|x64'" Label="Configuration">
|
||||
<ConfigurationType>Makefile</ConfigurationType>
|
||||
<UseDebugLibraries>true</UseDebugLibraries>
|
||||
<PlatformToolset>v120</PlatformToolset>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|x64'" Label="Configuration">
|
||||
<ConfigurationType>Makefile</ConfigurationType>
|
||||
<UseDebugLibraries>false</UseDebugLibraries>
|
||||
<PlatformToolset>v120</PlatformToolset>
|
||||
</PropertyGroup>
|
||||
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
|
||||
<ImportGroup Label="ExtensionSettings">
|
||||
</ImportGroup>
|
||||
<ImportGroup Condition="'$(Configuration)|$(Platform)'=='Debug|x64'" Label="PropertySheets">
|
||||
<Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
|
||||
</ImportGroup>
|
||||
<ImportGroup Condition="'$(Configuration)|$(Platform)'=='Release|x64'" Label="PropertySheets">
|
||||
<Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
|
||||
</ImportGroup>
|
||||
<PropertyGroup Label="UserMacros" />
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">
|
||||
<NMakePreprocessorDefinitions>
|
||||
</NMakePreprocessorDefinitions>
|
||||
<NMakeBuildCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:build /p:Configuration=Debug
|
||||
</NMakeBuildCommandLine>
|
||||
<NMakeReBuildCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:rebuild /p:Configuration=Debug
|
||||
</NMakeReBuildCommandLine>
|
||||
<NMakeCleanCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:clean /p:Configuration=Debug
|
||||
</NMakeCleanCommandLine>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|x64'">
|
||||
<NMakePreprocessorDefinitions />
|
||||
<NMakeBuildCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:build /p:Configuration=Release
|
||||
</NMakeBuildCommandLine>
|
||||
<NMakeReBuildCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:rebuild /p:Configuration=Release
|
||||
</NMakeReBuildCommandLine>
|
||||
<NMakeCleanCommandLine>cmake -G "Visual Studio 12 2013 Win64" -DCMAKE_CONFIGURATION_TYPES="Debug;Release" -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_BUILD_RUNTIME=OFF -DLLVM_BUILD_TOOLS=OFF -DLLVM_INCLUDE_DOCS=OFF -DLLVM_INCLUDE_EXAMPLES=OFF -DLLVM_INCLUDE_TESTS=OFF -DLLVM_INCLUDE_TOOLS=OFF -DLLVM_INCLUDE_UTILS=OFF -DWITH_POLLY=OFF ../llvm
|
||||
msbuild.exe ALL_BUILD.vcxproj /t:clean /p:Configuration=Release
|
||||
</NMakeCleanCommandLine>
|
||||
</PropertyGroup>
|
||||
<ItemDefinitionGroup>
|
||||
</ItemDefinitionGroup>
|
||||
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
|
||||
<ImportGroup Label="ExtensionTargets">
|
||||
</ImportGroup>
|
||||
</Project>
|
||||
17
llvm_build/llvm_build.vcxproj.filters
Normal file
17
llvm_build/llvm_build.vcxproj.filters
Normal file
@ -0,0 +1,17 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<ItemGroup>
|
||||
<Filter Include="Source Files">
|
||||
<UniqueIdentifier>{4FC737F1-C7A5-4376-A066-2A32D752A2FF}</UniqueIdentifier>
|
||||
<Extensions>cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx</Extensions>
|
||||
</Filter>
|
||||
<Filter Include="Header Files">
|
||||
<UniqueIdentifier>{93995380-89BD-4b04-88EB-625FBE52EBFB}</UniqueIdentifier>
|
||||
<Extensions>h;hh;hpp;hxx;hm;inl;inc;xsd</Extensions>
|
||||
</Filter>
|
||||
<Filter Include="Resource Files">
|
||||
<UniqueIdentifier>{67DA6AB6-F800-4c08-8B7A-83BB121AAD01}</UniqueIdentifier>
|
||||
<Extensions>rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms</Extensions>
|
||||
</Filter>
|
||||
</ItemGroup>
|
||||
</Project>
|
||||
18
rpcs3.sln
18
rpcs3.sln
@ -1,6 +1,6 @@
|
||||
Microsoft Visual Studio Solution File, Format Version 12.00
|
||||
# Visual Studio 2013
|
||||
VisualStudioVersion = 12.0.21005.1
|
||||
# Visual Studio Express 2013 for Windows Desktop
|
||||
VisualStudioVersion = 12.0.30723.0
|
||||
MinimumVisualStudioVersion = 10.0.40219.1
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "rpcs3", "rpcs3\rpcs3.vcxproj", "{70CD65B0-91D6-4FAE-9A7B-4AF55D0D1B12}"
|
||||
ProjectSection(ProjectDependencies) = postProject
|
||||
@ -138,6 +138,13 @@ EndProject
|
||||
Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "asmjit", "asmjit", "{E2A982F2-4B1A-48B1-8D77-A17A589C58D7}"
|
||||
EndProject
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "emucore", "rpcs3\emucore.vcxproj", "{C4A10229-4712-4BD2-B63E-50D93C67A038}"
|
||||
ProjectSection(ProjectDependencies) = postProject
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672} = {8BC303AB-25BE-4276-8E57-73F171B2D672}
|
||||
EndProjectSection
|
||||
EndProject
|
||||
Project("{2150E333-8FDC-42A3-9474-1A3956D46DE8}") = "llvm", "llvm", "{C8068CE9-D626-4FEA-BEE7-893F06A25BF3}"
|
||||
EndProject
|
||||
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "llvm_build", "llvm_build\llvm_build.vcxproj", "{8BC303AB-25BE-4276-8E57-73F171B2D672}"
|
||||
EndProject
|
||||
Global
|
||||
GlobalSection(SolutionConfigurationPlatforms) = preSolution
|
||||
@ -297,6 +304,12 @@ Global
|
||||
{C4A10229-4712-4BD2-B63E-50D93C67A038}.Debug|x64.Build.0 = Debug|x64
|
||||
{C4A10229-4712-4BD2-B63E-50D93C67A038}.Release|x64.ActiveCfg = Release|x64
|
||||
{C4A10229-4712-4BD2-B63E-50D93C67A038}.Release|x64.Build.0 = Release|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Debug - MemLeak|x64.ActiveCfg = Debug|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Debug - MemLeak|x64.Build.0 = Debug|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Debug|x64.ActiveCfg = Debug|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Debug|x64.Build.0 = Debug|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Release|x64.ActiveCfg = Release|x64
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672}.Release|x64.Build.0 = Release|x64
|
||||
EndGlobalSection
|
||||
GlobalSection(SolutionProperties) = preSolution
|
||||
HideSolutionNode = FALSE
|
||||
@ -325,5 +338,6 @@ Global
|
||||
{23E1C437-A951-5943-8639-A17F3CF2E606} = {5812E712-6213-4372-B095-9EB9BAA1F2DF}
|
||||
{74827EBD-93DC-5110-BA95-3F2AB029B6B0} = {5812E712-6213-4372-B095-9EB9BAA1F2DF}
|
||||
{AC40FF01-426E-4838-A317-66354CEFAE88} = {E2A982F2-4B1A-48B1-8D77-A17A589C58D7}
|
||||
{8BC303AB-25BE-4276-8E57-73F171B2D672} = {C8068CE9-D626-4FEA-BEE7-893F06A25BF3}
|
||||
EndGlobalSection
|
||||
EndGlobal
|
||||
|
||||
@ -55,6 +55,7 @@ find_package(GLEW REQUIRED)
|
||||
find_package(OpenGL REQUIRED)
|
||||
find_package(ZLIB REQUIRED)
|
||||
find_package(OpenAL REQUIRED)
|
||||
find_package(LLVM REQUIRED CONFIG)
|
||||
|
||||
include("${wxWidgets_USE_FILE}")
|
||||
|
||||
@ -69,6 +70,7 @@ endif()
|
||||
include_directories(
|
||||
${wxWidgets_INCLUDE_DIRS}
|
||||
${OPENAL_INCLUDE_DIR}
|
||||
${LLVM_INCLUDE_DIRS}
|
||||
"${RPCS3_SRC_DIR}/../ffmpeg/${PLATFORM_ARCH}/include"
|
||||
"${RPCS3_SRC_DIR}"
|
||||
"${RPCS3_SRC_DIR}/Loader"
|
||||
@ -77,6 +79,9 @@ ${OPENAL_INCLUDE_DIR}
|
||||
"${RPCS3_SRC_DIR}/../asmjit/src/asmjit"
|
||||
)
|
||||
|
||||
add_definitions(${LLVM_DEFINITIONS})
|
||||
llvm_map_components_to_libnames(LLVM_LIBS jit vectorize x86codegen x86disassembler)
|
||||
|
||||
link_directories("${RPCS3_SRC_DIR}/../ffmpeg/${PLATFORM_ARCH}/lib")
|
||||
|
||||
get_property(dirs DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR} PROPERTY INCLUDE_DIRECTORIES)
|
||||
@ -97,10 +102,13 @@ RPCS3_SRC
|
||||
"${RPCS3_SRC_DIR}/../Utilities/*"
|
||||
)
|
||||
|
||||
list(REMOVE_ITEM RPCS3_SRC ${RPCS3_SRC_DIR}/../Utilities/simpleini/ConvertUTF.c)
|
||||
set_source_files_properties(${RPCS3_SRC_DIR}/Emu/Cell/PPULLVMRecompiler.cpp PROPERTIES COMPILE_FLAGS -fno-rtti)
|
||||
|
||||
add_executable(rpcs3 ${RPCS3_SRC})
|
||||
|
||||
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -L${CMAKE_CURRENT_BINARY_DIR}/../asmjit/") #hack because the asmjit cmake file force fno exceptions
|
||||
target_link_libraries(rpcs3 asmjit.a ${wxWidgets_LIBRARIES} ${OPENAL_LIBRARY} ${GLEW_LIBRARY} ${OPENGL_LIBRARIES} libavformat.a libavcodec.a libavutil.a libswresample.a libswscale.a ${ZLIB_LIBRARIES})
|
||||
target_link_libraries(rpcs3 asmjit.a ${wxWidgets_LIBRARIES} ${OPENAL_LIBRARY} ${GLEW_LIBRARY} ${OPENGL_LIBRARIES} libavformat.a libavcodec.a libavutil.a libswresample.a libswscale.a ${ZLIB_LIBRARIES} ${LLVM_LIBS})
|
||||
|
||||
set_target_properties(rpcs3 PROPERTIES COTIRE_CXX_PREFIX_HEADER_INIT "${RPCS3_SRC_DIR}/stdafx.h")
|
||||
cotire(rpcs3)
|
||||
|
||||
@ -1,6 +1,12 @@
|
||||
#pragma once
|
||||
|
||||
#include "Emu/Cell/PPUOpcodes.h"
|
||||
#include "Emu/SysCalls/SysCalls.h"
|
||||
#include "rpcs3/Ini.h"
|
||||
#include "Emu/System.h"
|
||||
#include "Emu/SysCalls/Static.h"
|
||||
#include "Emu/SysCalls/Modules.h"
|
||||
#include "Emu/Memory/Memory.h"
|
||||
#include "Emu/SysCalls/lv2/sys_time.h"
|
||||
|
||||
#include <stdint.h>
|
||||
@ -51,6 +57,7 @@ u64 rotr64(const u64 x, const u8 n) { return (x >> n) | (x << (64 - n)); }
|
||||
|
||||
class PPUInterpreter : public PPUOpcodes
|
||||
{
|
||||
friend class PPULLVMRecompiler;
|
||||
private:
|
||||
PPUThread& CPU;
|
||||
|
||||
|
||||
4988
rpcs3/Emu/Cell/PPULLVMRecompiler.cpp
Normal file
4988
rpcs3/Emu/Cell/PPULLVMRecompiler.cpp
Normal file
File diff suppressed because it is too large
Load Diff
789
rpcs3/Emu/Cell/PPULLVMRecompiler.h
Normal file
789
rpcs3/Emu/Cell/PPULLVMRecompiler.h
Normal file
@ -0,0 +1,789 @@
|
||||
#ifndef PPU_LLVM_RECOMPILER_H
|
||||
#define PPU_LLVM_RECOMPILER_H
|
||||
|
||||
#include "Emu/Cell/PPUDecoder.h"
|
||||
#include "Emu/Cell/PPUThread.h"
|
||||
#include "Emu/Cell/PPUInterpreter.h"
|
||||
#include "llvm/IR/LLVMContext.h"
|
||||
#include "llvm/IR/IRBuilder.h"
|
||||
#include "llvm/IR/Module.h"
|
||||
#include "llvm/IR/GlobalVariable.h"
|
||||
#include "llvm/ExecutionEngine/JIT.h"
|
||||
#include "llvm/PassManager.h"
|
||||
|
||||
struct PPUState;
|
||||
|
||||
/// PPU recompiler that uses LLVM for code generation and optimization
|
||||
class PPULLVMRecompiler : public ThreadBase, protected PPUOpcodes, protected PPCDecoder {
|
||||
public:
|
||||
typedef void(*Executable)(PPUThread * ppu_state, PPUInterpreter * interpreter);
|
||||
|
||||
PPULLVMRecompiler();
|
||||
|
||||
PPULLVMRecompiler(const PPULLVMRecompiler & other) = delete;
|
||||
PPULLVMRecompiler(PPULLVMRecompiler && other) = delete;
|
||||
|
||||
virtual ~PPULLVMRecompiler();
|
||||
|
||||
PPULLVMRecompiler & operator = (const PPULLVMRecompiler & other) = delete;
|
||||
PPULLVMRecompiler & operator = (PPULLVMRecompiler && other) = delete;
|
||||
|
||||
/// Get the executable for the code starting at address
|
||||
std::pair<Executable, u32> GetExecutable(u32 address);
|
||||
|
||||
/// Release an executable earlier obtained through GetExecutable
|
||||
void ReleaseExecutable(u32 address, u32 revision);
|
||||
|
||||
/// Request the code at the sepcified address to be compiled
|
||||
void RequestCompilation(u32 address);
|
||||
|
||||
/// Get the current revision
|
||||
u32 GetCurrentRevision();
|
||||
|
||||
/// Execute all tests
|
||||
void RunAllTests(PPUThread * ppu_state, PPUInterpreter * interpreter);
|
||||
|
||||
void Task() override;
|
||||
|
||||
protected:
|
||||
void Decode(const u32 code) override;
|
||||
|
||||
void NULL_OP() override;
|
||||
void NOP() override;
|
||||
|
||||
void TDI(u32 to, u32 ra, s32 simm16) override;
|
||||
void TWI(u32 to, u32 ra, s32 simm16) override;
|
||||
|
||||
void MFVSCR(u32 vd) override;
|
||||
void MTVSCR(u32 vb) override;
|
||||
void VADDCUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDSBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDSHS(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDSWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUBM(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUHM(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUHS(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUWM(u32 vd, u32 va, u32 vb) override;
|
||||
void VADDUWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VAND(u32 vd, u32 va, u32 vb) override;
|
||||
void VANDC(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGSB(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGSH(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGSW(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VAVGUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VCFSX(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VCFUX(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VCMPBFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPBFP_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQFP_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUB_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUH_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPEQUW_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGEFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGEFP_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTFP_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSB(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSB_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSH(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSH_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSW(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTSW_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUB_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUH_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VCMPGTUW_(u32 vd, u32 va, u32 vb) override;
|
||||
void VCTSXS(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VCTUXS(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VEXPTEFP(u32 vd, u32 vb) override;
|
||||
void VLOGEFP(u32 vd, u32 vb) override;
|
||||
void VMADDFP(u32 vd, u32 va, u32 vc, u32 vb) override;
|
||||
void VMAXFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXSB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXSH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXSW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMAXUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMHADDSHS(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMHRADDSHS(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMINFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINSB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINSH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINSW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMINUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMLADDUHM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMRGHB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMRGHH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMRGHW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMRGLB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMRGLH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMRGLW(u32 vd, u32 va, u32 vb) override;
|
||||
void VMSUMMBM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMSUMSHM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMSUMSHS(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMSUMUBM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMSUMUHM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMSUMUHS(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VMULESB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULESH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULEUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULEUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULOSB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULOSH(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULOUB(u32 vd, u32 va, u32 vb) override;
|
||||
void VMULOUH(u32 vd, u32 va, u32 vb) override;
|
||||
void VNMSUBFP(u32 vd, u32 va, u32 vc, u32 vb) override;
|
||||
void VNOR(u32 vd, u32 va, u32 vb) override;
|
||||
void VOR(u32 vd, u32 va, u32 vb) override;
|
||||
void VPERM(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VPKPX(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKSHSS(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKSHUS(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKSWSS(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKSWUS(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKUHUM(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKUHUS(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKUWUM(u32 vd, u32 va, u32 vb) override;
|
||||
void VPKUWUS(u32 vd, u32 va, u32 vb) override;
|
||||
void VREFP(u32 vd, u32 vb) override;
|
||||
void VRFIM(u32 vd, u32 vb) override;
|
||||
void VRFIN(u32 vd, u32 vb) override;
|
||||
void VRFIP(u32 vd, u32 vb) override;
|
||||
void VRFIZ(u32 vd, u32 vb) override;
|
||||
void VRLB(u32 vd, u32 va, u32 vb) override;
|
||||
void VRLH(u32 vd, u32 va, u32 vb) override;
|
||||
void VRLW(u32 vd, u32 va, u32 vb) override;
|
||||
void VRSQRTEFP(u32 vd, u32 vb) override;
|
||||
void VSEL(u32 vd, u32 va, u32 vb, u32 vc) override;
|
||||
void VSL(u32 vd, u32 va, u32 vb) override;
|
||||
void VSLB(u32 vd, u32 va, u32 vb) override;
|
||||
void VSLDOI(u32 vd, u32 va, u32 vb, u32 sh) override;
|
||||
void VSLH(u32 vd, u32 va, u32 vb) override;
|
||||
void VSLO(u32 vd, u32 va, u32 vb) override;
|
||||
void VSLW(u32 vd, u32 va, u32 vb) override;
|
||||
void VSPLTB(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VSPLTH(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VSPLTISB(u32 vd, s32 simm5) override;
|
||||
void VSPLTISH(u32 vd, s32 simm5) override;
|
||||
void VSPLTISW(u32 vd, s32 simm5) override;
|
||||
void VSPLTW(u32 vd, u32 uimm5, u32 vb) override;
|
||||
void VSR(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRAB(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRAH(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRAW(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRB(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRH(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRO(u32 vd, u32 va, u32 vb) override;
|
||||
void VSRW(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBCUW(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBFP(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBSBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBSHS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBSWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUBM(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUHM(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUHS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUWM(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUBUWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUMSWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUM2SWS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUM4SBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUM4SHS(u32 vd, u32 va, u32 vb) override;
|
||||
void VSUM4UBS(u32 vd, u32 va, u32 vb) override;
|
||||
void VUPKHPX(u32 vd, u32 vb) override;
|
||||
void VUPKHSB(u32 vd, u32 vb) override;
|
||||
void VUPKHSH(u32 vd, u32 vb) override;
|
||||
void VUPKLPX(u32 vd, u32 vb) override;
|
||||
void VUPKLSB(u32 vd, u32 vb) override;
|
||||
void VUPKLSH(u32 vd, u32 vb) override;
|
||||
void VXOR(u32 vd, u32 va, u32 vb) override;
|
||||
void MULLI(u32 rd, u32 ra, s32 simm16) override;
|
||||
void SUBFIC(u32 rd, u32 ra, s32 simm16) override;
|
||||
void CMPLI(u32 bf, u32 l, u32 ra, u32 uimm16) override;
|
||||
void CMPI(u32 bf, u32 l, u32 ra, s32 simm16) override;
|
||||
void ADDIC(u32 rd, u32 ra, s32 simm16) override;
|
||||
void ADDIC_(u32 rd, u32 ra, s32 simm16) override;
|
||||
void ADDI(u32 rd, u32 ra, s32 simm16) override;
|
||||
void ADDIS(u32 rd, u32 ra, s32 simm16) override;
|
||||
void BC(u32 bo, u32 bi, s32 bd, u32 aa, u32 lk) override;
|
||||
void SC(u32 sc_code) override;
|
||||
void B(s32 ll, u32 aa, u32 lk) override;
|
||||
void MCRF(u32 crfd, u32 crfs) override;
|
||||
void BCLR(u32 bo, u32 bi, u32 bh, u32 lk) override;
|
||||
void CRNOR(u32 bt, u32 ba, u32 bb) override;
|
||||
void CRANDC(u32 bt, u32 ba, u32 bb) override;
|
||||
void ISYNC() override;
|
||||
void CRXOR(u32 bt, u32 ba, u32 bb) override;
|
||||
void CRNAND(u32 bt, u32 ba, u32 bb) override;
|
||||
void CRAND(u32 bt, u32 ba, u32 bb) override;
|
||||
void CREQV(u32 bt, u32 ba, u32 bb) override;
|
||||
void CRORC(u32 bt, u32 ba, u32 bb) override;
|
||||
void CROR(u32 bt, u32 ba, u32 bb) override;
|
||||
void BCCTR(u32 bo, u32 bi, u32 bh, u32 lk) override;
|
||||
void RLWIMI(u32 ra, u32 rs, u32 sh, u32 mb, u32 me, bool rc) override;
|
||||
void RLWINM(u32 ra, u32 rs, u32 sh, u32 mb, u32 me, bool rc) override;
|
||||
void RLWNM(u32 ra, u32 rs, u32 rb, u32 MB, u32 ME, bool rc) override;
|
||||
void ORI(u32 rs, u32 ra, u32 uimm16) override;
|
||||
void ORIS(u32 rs, u32 ra, u32 uimm16) override;
|
||||
void XORI(u32 ra, u32 rs, u32 uimm16) override;
|
||||
void XORIS(u32 ra, u32 rs, u32 uimm16) override;
|
||||
void ANDI_(u32 ra, u32 rs, u32 uimm16) override;
|
||||
void ANDIS_(u32 ra, u32 rs, u32 uimm16) override;
|
||||
void RLDICL(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) override;
|
||||
void RLDICR(u32 ra, u32 rs, u32 sh, u32 me, bool rc) override;
|
||||
void RLDIC(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) override;
|
||||
void RLDIMI(u32 ra, u32 rs, u32 sh, u32 mb, bool rc) override;
|
||||
void RLDC_LR(u32 ra, u32 rs, u32 rb, u32 m_eb, bool is_r, bool rc) override;
|
||||
void CMP(u32 crfd, u32 l, u32 ra, u32 rb) override;
|
||||
void TW(u32 to, u32 ra, u32 rb) override;
|
||||
void LVSL(u32 vd, u32 ra, u32 rb) override;
|
||||
void LVEBX(u32 vd, u32 ra, u32 rb) override;
|
||||
void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void MULHDU(u32 rd, u32 ra, u32 rb, bool rc) override;
|
||||
void ADDC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void MULHWU(u32 rd, u32 ra, u32 rb, bool rc) override;
|
||||
void MFOCRF(u32 a, u32 rd, u32 crm) override;
|
||||
void LWARX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LDX(u32 ra, u32 rs, u32 rb) override;
|
||||
void LWZX(u32 rd, u32 ra, u32 rb) override;
|
||||
void SLW(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void CNTLZW(u32 ra, u32 rs, bool rc) override;
|
||||
void SLD(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void AND(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void CMPL(u32 bf, u32 l, u32 ra, u32 rb) override;
|
||||
void LVSR(u32 vd, u32 ra, u32 rb) override;
|
||||
void LVEHX(u32 vd, u32 ra, u32 rb) override;
|
||||
void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void LDUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void DCBST(u32 ra, u32 rb) override;
|
||||
void LWZUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void CNTLZD(u32 ra, u32 rs, bool rc) override;
|
||||
void ANDC(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void TD(u32 to, u32 ra, u32 rb) override;
|
||||
void LVEWX(u32 vd, u32 ra, u32 rb) override;
|
||||
void MULHD(u32 rd, u32 ra, u32 rb, bool rc) override;
|
||||
void MULHW(u32 rd, u32 ra, u32 rb, bool rc) override;
|
||||
void LDARX(u32 rd, u32 ra, u32 rb) override;
|
||||
void DCBF(u32 ra, u32 rb) override;
|
||||
void LBZX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LVX(u32 vd, u32 ra, u32 rb) override;
|
||||
void NEG(u32 rd, u32 ra, u32 oe, bool rc) override;
|
||||
void LBZUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void NOR(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void STVEBX(u32 vs, u32 ra, u32 rb) override;
|
||||
void SUBFE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void ADDE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void MTOCRF(u32 l, u32 crm, u32 rs) override;
|
||||
void STDX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STWCX_(u32 rs, u32 ra, u32 rb) override;
|
||||
void STWX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STVEHX(u32 vs, u32 ra, u32 rb) override;
|
||||
void STDUX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STWUX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STVEWX(u32 vs, u32 ra, u32 rb) override;
|
||||
void SUBFZE(u32 rd, u32 ra, u32 oe, bool rc) override;
|
||||
void ADDZE(u32 rd, u32 ra, u32 oe, bool rc) override;
|
||||
void STDCX_(u32 rs, u32 ra, u32 rb) override;
|
||||
void STBX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STVX(u32 vs, u32 ra, u32 rb) override;
|
||||
void MULLD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void SUBFME(u32 rd, u32 ra, u32 oe, bool rc) override;
|
||||
void ADDME(u32 rd, u32 ra, u32 oe, bool rc) override;
|
||||
void MULLW(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void DCBTST(u32 ra, u32 rb, u32 th) override;
|
||||
void STBUX(u32 rs, u32 ra, u32 rb) override;
|
||||
void ADD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void DCBT(u32 ra, u32 rb, u32 th) override;
|
||||
void LHZX(u32 rd, u32 ra, u32 rb) override;
|
||||
void EQV(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void ECIWX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LHZUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void XOR(u32 rs, u32 ra, u32 rb, bool rc) override;
|
||||
void MFSPR(u32 rd, u32 spr) override;
|
||||
void LWAX(u32 rd, u32 ra, u32 rb) override;
|
||||
void DST(u32 ra, u32 rb, u32 strm, u32 t) override;
|
||||
void LHAX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LVXL(u32 vd, u32 ra, u32 rb) override;
|
||||
void MFTB(u32 rd, u32 spr) override;
|
||||
void LWAUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void DSTST(u32 ra, u32 rb, u32 strm, u32 t) override;
|
||||
void LHAUX(u32 rd, u32 ra, u32 rb) override;
|
||||
void STHX(u32 rs, u32 ra, u32 rb) override;
|
||||
void ORC(u32 rs, u32 ra, u32 rb, bool rc) override;
|
||||
void ECOWX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STHUX(u32 rs, u32 ra, u32 rb) override;
|
||||
void OR(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void DIVDU(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void DIVWU(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void MTSPR(u32 spr, u32 rs) override;
|
||||
//DCBI
|
||||
void NAND(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void STVXL(u32 vs, u32 ra, u32 rb) override;
|
||||
void DIVD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void DIVW(u32 rd, u32 ra, u32 rb, u32 oe, bool rc) override;
|
||||
void LVLX(u32 vd, u32 ra, u32 rb) override;
|
||||
void LDBRX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LSWX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LWBRX(u32 rd, u32 ra, u32 rb) override;
|
||||
void LFSX(u32 frd, u32 ra, u32 rb) override;
|
||||
void SRW(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void SRD(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void LVRX(u32 vd, u32 ra, u32 rb) override;
|
||||
void LSWI(u32 rd, u32 ra, u32 nb) override;
|
||||
void LFSUX(u32 frd, u32 ra, u32 rb) override;
|
||||
void SYNC(u32 l) override;
|
||||
void LFDX(u32 frd, u32 ra, u32 rb) override;
|
||||
void LFDUX(u32 frd, u32 ra, u32 rb) override;
|
||||
void STVLX(u32 vs, u32 ra, u32 rb) override;
|
||||
void STSWX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STWBRX(u32 rs, u32 ra, u32 rb) override;
|
||||
void STFSX(u32 frs, u32 ra, u32 rb) override;
|
||||
void STVRX(u32 vs, u32 ra, u32 rb) override;
|
||||
void STFSUX(u32 frs, u32 ra, u32 rb) override;
|
||||
void STSWI(u32 rd, u32 ra, u32 nb) override;
|
||||
void STFDX(u32 frs, u32 ra, u32 rb) override;
|
||||
void STFDUX(u32 frs, u32 ra, u32 rb) override;
|
||||
void LVLXL(u32 vd, u32 ra, u32 rb) override;
|
||||
void LHBRX(u32 rd, u32 ra, u32 rb) override;
|
||||
void SRAW(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void SRAD(u32 ra, u32 rs, u32 rb, bool rc) override;
|
||||
void LVRXL(u32 vd, u32 ra, u32 rb) override;
|
||||
void DSS(u32 strm, u32 a) override;
|
||||
void SRAWI(u32 ra, u32 rs, u32 sh, bool rc) override;
|
||||
void SRADI1(u32 ra, u32 rs, u32 sh, bool rc) override;
|
||||
void SRADI2(u32 ra, u32 rs, u32 sh, bool rc) override;
|
||||
void EIEIO() override;
|
||||
void STVLXL(u32 vs, u32 ra, u32 rb) override;
|
||||
void STHBRX(u32 rs, u32 ra, u32 rb) override;
|
||||
void EXTSH(u32 ra, u32 rs, bool rc) override;
|
||||
void STVRXL(u32 sd, u32 ra, u32 rb) override;
|
||||
void EXTSB(u32 ra, u32 rs, bool rc) override;
|
||||
void STFIWX(u32 frs, u32 ra, u32 rb) override;
|
||||
void EXTSW(u32 ra, u32 rs, bool rc) override;
|
||||
void ICBI(u32 ra, u32 rb) override;
|
||||
void DCBZ(u32 ra, u32 rb) override;
|
||||
void LWZ(u32 rd, u32 ra, s32 d) override;
|
||||
void LWZU(u32 rd, u32 ra, s32 d) override;
|
||||
void LBZ(u32 rd, u32 ra, s32 d) override;
|
||||
void LBZU(u32 rd, u32 ra, s32 d) override;
|
||||
void STW(u32 rs, u32 ra, s32 d) override;
|
||||
void STWU(u32 rs, u32 ra, s32 d) override;
|
||||
void STB(u32 rs, u32 ra, s32 d) override;
|
||||
void STBU(u32 rs, u32 ra, s32 d) override;
|
||||
void LHZ(u32 rd, u32 ra, s32 d) override;
|
||||
void LHZU(u32 rd, u32 ra, s32 d) override;
|
||||
void LHA(u32 rs, u32 ra, s32 d) override;
|
||||
void LHAU(u32 rs, u32 ra, s32 d) override;
|
||||
void STH(u32 rs, u32 ra, s32 d) override;
|
||||
void STHU(u32 rs, u32 ra, s32 d) override;
|
||||
void LMW(u32 rd, u32 ra, s32 d) override;
|
||||
void STMW(u32 rs, u32 ra, s32 d) override;
|
||||
void LFS(u32 frd, u32 ra, s32 d) override;
|
||||
void LFSU(u32 frd, u32 ra, s32 d) override;
|
||||
void LFD(u32 frd, u32 ra, s32 d) override;
|
||||
void LFDU(u32 frd, u32 ra, s32 d) override;
|
||||
void STFS(u32 frs, u32 ra, s32 d) override;
|
||||
void STFSU(u32 frs, u32 ra, s32 d) override;
|
||||
void STFD(u32 frs, u32 ra, s32 d) override;
|
||||
void STFDU(u32 frs, u32 ra, s32 d) override;
|
||||
void LD(u32 rd, u32 ra, s32 ds) override;
|
||||
void LDU(u32 rd, u32 ra, s32 ds) override;
|
||||
void LWA(u32 rd, u32 ra, s32 ds) override;
|
||||
void FDIVS(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FSUBS(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FADDS(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FSQRTS(u32 frd, u32 frb, bool rc) override;
|
||||
void FRES(u32 frd, u32 frb, bool rc) override;
|
||||
void FMULS(u32 frd, u32 fra, u32 frc, bool rc) override;
|
||||
void FMADDS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FMSUBS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FNMSUBS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FNMADDS(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void STD(u32 rs, u32 ra, s32 ds) override;
|
||||
void STDU(u32 rs, u32 ra, s32 ds) override;
|
||||
void MTFSB1(u32 bt, bool rc) override;
|
||||
void MCRFS(u32 bf, u32 bfa) override;
|
||||
void MTFSB0(u32 bt, bool rc) override;
|
||||
void MTFSFI(u32 crfd, u32 i, bool rc) override;
|
||||
void MFFS(u32 frd, bool rc) override;
|
||||
void MTFSF(u32 flm, u32 frb, bool rc) override;
|
||||
|
||||
void FCMPU(u32 bf, u32 fra, u32 frb) override;
|
||||
void FRSP(u32 frd, u32 frb, bool rc) override;
|
||||
void FCTIW(u32 frd, u32 frb, bool rc) override;
|
||||
void FCTIWZ(u32 frd, u32 frb, bool rc) override;
|
||||
void FDIV(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FSUB(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FADD(u32 frd, u32 fra, u32 frb, bool rc) override;
|
||||
void FSQRT(u32 frd, u32 frb, bool rc) override;
|
||||
void FSEL(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FMUL(u32 frd, u32 fra, u32 frc, bool rc) override;
|
||||
void FRSQRTE(u32 frd, u32 frb, bool rc) override;
|
||||
void FMSUB(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FMADD(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FNMSUB(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FNMADD(u32 frd, u32 fra, u32 frc, u32 frb, bool rc) override;
|
||||
void FCMPO(u32 crfd, u32 fra, u32 frb) override;
|
||||
void FNEG(u32 frd, u32 frb, bool rc) override;
|
||||
void FMR(u32 frd, u32 frb, bool rc) override;
|
||||
void FNABS(u32 frd, u32 frb, bool rc) override;
|
||||
void FABS(u32 frd, u32 frb, bool rc) override;
|
||||
void FCTID(u32 frd, u32 frb, bool rc) override;
|
||||
void FCTIDZ(u32 frd, u32 frb, bool rc) override;
|
||||
void FCFID(u32 frd, u32 frb, bool rc) override;
|
||||
|
||||
void UNK(const u32 code, const u32 opcode, const u32 gcode) override;
|
||||
|
||||
private:
|
||||
struct ExecutableInfo {
|
||||
/// Pointer to the executable
|
||||
Executable executable;
|
||||
|
||||
/// Size of the executable
|
||||
size_t size;
|
||||
|
||||
/// Number of PPU instructions compiled into this executable
|
||||
u32 num_instructions;
|
||||
|
||||
/// List of blocks that this executable refers to that have not been hit yet
|
||||
std::list<u32> unhit_blocks_list;
|
||||
|
||||
/// LLVM function corresponding to the executable
|
||||
llvm::Function * llvm_function;
|
||||
};
|
||||
|
||||
/// Lock for accessing m_compiled_shared
|
||||
// TODO: Use a RW lock
|
||||
std::mutex m_compiled_shared_lock;
|
||||
|
||||
/// Sections that have been compiled. This data store is shared with the execution threads.
|
||||
/// Keys are starting address of the section and ~revision. Data is pointer to the executable and its reference count.
|
||||
std::map<std::pair<u32, u32>, std::pair<Executable, u32>> m_compiled_shared;
|
||||
|
||||
/// Lock for accessing m_uncompiled_shared
|
||||
std::mutex m_uncompiled_shared_lock;
|
||||
|
||||
/// Current revision. This is incremented everytime a section is compiled.
|
||||
std::atomic<u32> m_revision;
|
||||
|
||||
/// Sections that have not been compiled yet. This data store is shared with the execution threads.
|
||||
std::list<u32> m_uncompiled_shared;
|
||||
|
||||
/// Set of all blocks that have been hit
|
||||
std::set<u32> m_hit_blocks;
|
||||
|
||||
/// Sections that have been compiled. Keys are starting address of the section and ~revision.
|
||||
std::map<std::pair<u32, u32>, ExecutableInfo> m_compiled;
|
||||
|
||||
/// LLVM context
|
||||
llvm::LLVMContext * m_llvm_context;
|
||||
|
||||
/// LLVM IR builder
|
||||
llvm::IRBuilder<> * m_ir_builder;
|
||||
|
||||
/// Module to which all generated code is output to
|
||||
llvm::Module * m_module;
|
||||
|
||||
/// JIT execution engine
|
||||
llvm::ExecutionEngine * m_execution_engine;
|
||||
|
||||
/// Function pass manager
|
||||
llvm::FunctionPassManager * m_fpm;
|
||||
|
||||
/// A flag used to detect branch instructions.
|
||||
/// This is set to false at the start of compilation of a block.
|
||||
/// When a branch instruction is encountered, this is set to true by the decode function.
|
||||
bool m_hit_branch_instruction;
|
||||
|
||||
/// The function being compiled
|
||||
llvm::Function * m_current_function;
|
||||
|
||||
/// List of blocks to be compiled in the current function being compiled
|
||||
std::list<u32> m_current_function_uncompiled_blocks_list;
|
||||
|
||||
/// List of blocks that the current function refers to but have not been hit yet
|
||||
std::list<u32> m_current_function_unhit_blocks_list;
|
||||
|
||||
/// Address of the current instruction
|
||||
u32 m_current_instruction_address;
|
||||
|
||||
/// Number of instructions in this section
|
||||
u32 m_num_instructions;
|
||||
|
||||
/// Time spent building the LLVM IR
|
||||
std::chrono::nanoseconds m_ir_build_time;
|
||||
|
||||
/// Time spent optimizing
|
||||
std::chrono::nanoseconds m_optimizing_time;
|
||||
|
||||
/// Time spent translating LLVM IR to machine code
|
||||
std::chrono::nanoseconds m_translation_time;
|
||||
|
||||
/// Time spent compiling
|
||||
std::chrono::nanoseconds m_compilation_time;
|
||||
|
||||
/// Time spent idling
|
||||
std::chrono::nanoseconds m_idling_time;
|
||||
|
||||
/// Total time
|
||||
std::chrono::nanoseconds m_total_time;
|
||||
|
||||
/// Contains the number of times the interpreter fallback was used
|
||||
std::map<std::string, u64> m_interpreter_fallback_stats;
|
||||
|
||||
/// Get the block in function for the instruction at the specified address.
|
||||
llvm::BasicBlock * GetBlockInFunction(u32 address, llvm::Function * function, bool create_if_not_exist = false);
|
||||
|
||||
/// Compile the section startin at address
|
||||
void Compile(u32 address);
|
||||
|
||||
/// Remove old versions of executables that are no longer used by any execution thread
|
||||
void RemoveUnusedOldVersions();
|
||||
|
||||
/// Test whether the blocks needs to be compiled
|
||||
bool NeedsCompiling(u32 address);
|
||||
|
||||
/// Get PPU state pointer
|
||||
llvm::Value * GetPPUState();
|
||||
|
||||
/// Get interpreter pointer
|
||||
llvm::Value * GetInterpreter();
|
||||
|
||||
/// Get a bit
|
||||
llvm::Value * GetBit(llvm::Value * val, u32 n);
|
||||
|
||||
/// Clear a bit
|
||||
llvm::Value * ClrBit(llvm::Value * val, u32 n);
|
||||
|
||||
/// Set a bit
|
||||
llvm::Value * SetBit(llvm::Value * val, u32 n, llvm::Value * bit, bool doClear = true);
|
||||
|
||||
/// Get a nibble
|
||||
llvm::Value * GetNibble(llvm::Value * val, u32 n);
|
||||
|
||||
/// Clear a nibble
|
||||
llvm::Value * ClrNibble(llvm::Value * val, u32 n);
|
||||
|
||||
/// Set a nibble
|
||||
llvm::Value * SetNibble(llvm::Value * val, u32 n, llvm::Value * nibble, bool doClear = true);
|
||||
|
||||
/// Set a nibble
|
||||
llvm::Value * SetNibble(llvm::Value * val, u32 n, llvm::Value * b0, llvm::Value * b1, llvm::Value * b2, llvm::Value * b3, bool doClear = true);
|
||||
|
||||
/// Load PC
|
||||
llvm::Value * GetPc();
|
||||
|
||||
/// Set PC
|
||||
void SetPc(llvm::Value * val_ix);
|
||||
|
||||
/// Load GPR
|
||||
llvm::Value * GetGpr(u32 r, u32 num_bits = 64);
|
||||
|
||||
/// Set GPR
|
||||
void SetGpr(u32 r, llvm::Value * val_x64);
|
||||
|
||||
/// Load CR
|
||||
llvm::Value * GetCr();
|
||||
|
||||
/// Load CR and get field CRn
|
||||
llvm::Value * GetCrField(u32 n);
|
||||
|
||||
/// Set CR
|
||||
void SetCr(llvm::Value * val_x32);
|
||||
|
||||
/// Set CR field
|
||||
void SetCrField(u32 n, llvm::Value * field);
|
||||
|
||||
/// Set CR field
|
||||
void SetCrField(u32 n, llvm::Value * b0, llvm::Value * b1, llvm::Value * b2, llvm::Value * b3);
|
||||
|
||||
/// Set CR field based on signed comparison
|
||||
void SetCrFieldSignedCmp(u32 n, llvm::Value * a, llvm::Value * b);
|
||||
|
||||
/// Set CR field based on unsigned comparison
|
||||
void SetCrFieldUnsignedCmp(u32 n, llvm::Value * a, llvm::Value * b);
|
||||
|
||||
/// Set CR6 based on the result of the vector compare instruction
|
||||
void SetCr6AfterVectorCompare(u32 vr);
|
||||
|
||||
/// Get LR
|
||||
llvm::Value * GetLr();
|
||||
|
||||
/// Set LR
|
||||
void SetLr(llvm::Value * val_x64);
|
||||
|
||||
/// Get CTR
|
||||
llvm::Value * GetCtr();
|
||||
|
||||
/// Set CTR
|
||||
void SetCtr(llvm::Value * val_x64);
|
||||
|
||||
/// Load XER and convert it to an i64
|
||||
llvm::Value * GetXer();
|
||||
|
||||
/// Load XER and return the CA bit
|
||||
llvm::Value * GetXerCa();
|
||||
|
||||
/// Load XER and return the SO bit
|
||||
llvm::Value * GetXerSo();
|
||||
|
||||
/// Set XER
|
||||
void SetXer(llvm::Value * val_x64);
|
||||
|
||||
/// Set the CA bit of XER
|
||||
void SetXerCa(llvm::Value * ca);
|
||||
|
||||
/// Set the SO bit of XER
|
||||
void SetXerSo(llvm::Value * so);
|
||||
|
||||
/// Get USPRG0
|
||||
llvm::Value * GetUsprg0();
|
||||
|
||||
/// Set USPRG0
|
||||
void SetUsprg0(llvm::Value * val_x64);
|
||||
|
||||
/// Get FPR
|
||||
llvm::Value * GetFpr(u32 r, u32 bits = 64, bool as_int = false);
|
||||
|
||||
/// Set FPR
|
||||
void SetFpr(u32 r, llvm::Value * val);
|
||||
|
||||
/// Load VSCR
|
||||
llvm::Value * GetVscr();
|
||||
|
||||
/// Set VSCR
|
||||
void SetVscr(llvm::Value * val_x32);
|
||||
|
||||
/// Load VR
|
||||
llvm::Value * GetVr(u32 vr);
|
||||
|
||||
/// Load VR and convert it to an integer vector
|
||||
llvm::Value * GetVrAsIntVec(u32 vr, u32 vec_elt_num_bits);
|
||||
|
||||
/// Load VR and convert it to a float vector with 4 elements
|
||||
llvm::Value * GetVrAsFloatVec(u32 vr);
|
||||
|
||||
/// Load VR and convert it to a double vector with 2 elements
|
||||
llvm::Value * GetVrAsDoubleVec(u32 vr);
|
||||
|
||||
/// Set VR to the specified value
|
||||
void SetVr(u32 vr, llvm::Value * val_x128);
|
||||
|
||||
/// Check condition for branch instructions
|
||||
llvm::Value * CheckBranchCondition(u32 bo, u32 bi);
|
||||
|
||||
/// Create IR for a branch instruction
|
||||
void CreateBranch(llvm::Value * cmp_i1, llvm::Value * target_i64, bool lk);
|
||||
|
||||
/// Read from memory
|
||||
llvm::Value * ReadMemory(llvm::Value * addr_i64, u32 bits, u32 alignment = 0, bool bswap = true, bool could_be_mmio = true);
|
||||
|
||||
/// Write to memory
|
||||
void WriteMemory(llvm::Value * addr_i64, llvm::Value * val_ix, u32 alignment = 0, bool bswap = true, bool could_be_mmio = true);
|
||||
|
||||
/// Call an interpreter function
|
||||
template<class Func, class... Args>
|
||||
llvm::Value * InterpreterCall(const char * name, Func function, Args... args);
|
||||
|
||||
/// Convert a C++ type to an LLVM type
|
||||
template<class T>
|
||||
llvm::Type * CppToLlvmType();
|
||||
|
||||
/// Call a function
|
||||
template<class ReturnType, class Func, class... Args>
|
||||
llvm::Value * Call(const char * name, Func function, Args... args);
|
||||
|
||||
/// Test an instruction against the interpreter
|
||||
template <class PPULLVMRecompilerFn, class PPUInterpreterFn, class... Args>
|
||||
void VerifyInstructionAgainstInterpreter(const char * name, PPULLVMRecompilerFn recomp_fn, PPUInterpreterFn interp_fn, PPUState & input_state, Args... args);
|
||||
|
||||
/// Excute a test
|
||||
void RunTest(const char * name, std::function<void()> test_case, std::function<void()> input, std::function<bool(std::string & msg)> check_result);
|
||||
|
||||
/// A mask used in rotate instructions
|
||||
static u64 s_rotate_mask[64][64];
|
||||
|
||||
/// A flag indicating whether s_rotate_mask has been initialised or not
|
||||
static bool s_rotate_mask_inited;
|
||||
|
||||
/// Initialse s_rotate_mask
|
||||
static void InitRotateMask();
|
||||
};
|
||||
|
||||
/// PPU emulator that uses LLVM to convert PPU instructions to host CPU instructions
|
||||
class PPULLVMEmulator : public CPUDecoder {
|
||||
public:
|
||||
PPULLVMEmulator(PPUThread & ppu);
|
||||
PPULLVMEmulator() = delete;
|
||||
|
||||
PPULLVMEmulator(const PPULLVMEmulator & other) = delete;
|
||||
PPULLVMEmulator(PPULLVMEmulator && other) = delete;
|
||||
|
||||
virtual ~PPULLVMEmulator();
|
||||
|
||||
PPULLVMEmulator & operator = (const PPULLVMEmulator & other) = delete;
|
||||
PPULLVMEmulator & operator = (PPULLVMEmulator && other) = delete;
|
||||
|
||||
u8 DecodeMemory(const u32 address) override;
|
||||
|
||||
private:
|
||||
struct ExecutableInfo {
|
||||
/// Pointer to the executable
|
||||
PPULLVMRecompiler::Executable executable;
|
||||
|
||||
/// The revision of the executable
|
||||
u32 revision;
|
||||
|
||||
/// Number of times the executable was hit
|
||||
u32 num_hits;
|
||||
};
|
||||
|
||||
/// PPU processor context
|
||||
PPUThread & m_ppu;
|
||||
|
||||
/// PPU Interpreter
|
||||
PPUInterpreter * m_interpreter;
|
||||
|
||||
/// PPU instruction Decoder
|
||||
PPUDecoder m_decoder;
|
||||
|
||||
/// Set to true if the last executed instruction was a branch
|
||||
bool m_last_instr_was_branch;
|
||||
|
||||
/// The time at which the m_address_to_executable cache was last cleared
|
||||
std::chrono::high_resolution_clock::time_point m_last_cache_clear_time;
|
||||
|
||||
/// The revision of the recompiler to which this thread is synced
|
||||
u32 m_recompiler_revision;
|
||||
|
||||
/// Address to executable map. Key is address.
|
||||
std::unordered_map<u32, ExecutableInfo> m_address_to_executable;
|
||||
|
||||
/// Sections that have not been compiled yet. Key is starting address of the section.
|
||||
std::unordered_map<u32, u64> m_uncompiled;
|
||||
|
||||
/// Number of instances of this class
|
||||
static u32 s_num_instances;
|
||||
|
||||
/// Mutex used prevent multiple instances of the recompiler from being created
|
||||
static std::mutex s_recompiler_mutex;
|
||||
|
||||
/// PPU to LLVM recompiler
|
||||
static PPULLVMRecompiler * s_recompiler;
|
||||
};
|
||||
|
||||
#endif // PPU_LLVM_RECOMPILER_H
|
||||
769
rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp
Normal file
769
rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp
Normal file
@ -0,0 +1,769 @@
|
||||
#include "stdafx.h"
|
||||
#include "Utilities/Log.h"
|
||||
#include "Emu/Cell/PPULLVMRecompiler.h"
|
||||
#include "llvm/Support/Host.h"
|
||||
#include "llvm/IR/Verifier.h"
|
||||
#include "llvm/CodeGen/MachineCodeInfo.h"
|
||||
#include "llvm/ExecutionEngine/GenericValue.h"
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
#include "llvm/MC/MCDisassembler.h"
|
||||
|
||||
//#define PPU_LLVM_RECOMPILER_UNIT_TESTS 1
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define VERIFY_INSTRUCTION_AGAINST_INTERPRETER(fn, tc, input, ...) \
|
||||
VerifyInstructionAgainstInterpreter(fmt::Format("%s.%d", #fn, tc).c_str(), &PPULLVMRecompiler::fn, &PPUInterpreter::fn, input, __VA_ARGS__)
|
||||
|
||||
#define VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(fn, s, n, ...) { \
|
||||
PPUState input; \
|
||||
for (int i = s; i < (n + s); i++) { \
|
||||
input.SetRandom(0x10000); \
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(fn, i, input, __VA_ARGS__); \
|
||||
} \
|
||||
}
|
||||
|
||||
/// Register state of a PPU
|
||||
struct PPUState {
|
||||
/// Floating point registers
|
||||
PPCdouble FPR[32];
|
||||
|
||||
///Floating point status and control register
|
||||
FPSCRhdr FPSCR;
|
||||
|
||||
/// General purpose reggisters
|
||||
u64 GPR[32];
|
||||
|
||||
/// Vector purpose registers
|
||||
u128 VPR[32];
|
||||
|
||||
/// Condition register
|
||||
CRhdr CR;
|
||||
|
||||
/// Fixed point exception register
|
||||
XERhdr XER;
|
||||
|
||||
/// Vector status and control register
|
||||
VSCRhdr VSCR;
|
||||
|
||||
/// Link register
|
||||
u64 LR;
|
||||
|
||||
/// Count register
|
||||
u64 CTR;
|
||||
|
||||
/// SPR general purpose registers
|
||||
u64 SPRG[8];
|
||||
|
||||
/// Time base register
|
||||
u64 TB;
|
||||
|
||||
/// Reservations
|
||||
u64 R_ADDR;
|
||||
u64 R_VALUE;
|
||||
|
||||
/// Mmeory block
|
||||
u32 address;
|
||||
u64 mem_block[64];
|
||||
|
||||
void Load(PPUThread & ppu, u32 addr) {
|
||||
for (int i = 0; i < 32; i++) {
|
||||
FPR[i] = ppu.FPR[i];
|
||||
GPR[i] = ppu.GPR[i];
|
||||
VPR[i] = ppu.VPR[i];
|
||||
|
||||
if (i < 8) {
|
||||
SPRG[i] = ppu.SPRG[i];
|
||||
}
|
||||
}
|
||||
|
||||
FPSCR = ppu.FPSCR;
|
||||
CR = ppu.CR;
|
||||
XER = ppu.XER;
|
||||
VSCR = ppu.VSCR;
|
||||
LR = ppu.LR;
|
||||
CTR = ppu.CTR;
|
||||
TB = ppu.TB;
|
||||
|
||||
R_ADDR = ppu.R_ADDR;
|
||||
R_VALUE = ppu.R_VALUE;
|
||||
|
||||
address = addr;
|
||||
for (int i = 0; i < (sizeof(mem_block) / 8); i++) {
|
||||
mem_block[i] = vm::read64(address + (i * 8));
|
||||
}
|
||||
}
|
||||
|
||||
void Store(PPUThread & ppu) {
|
||||
for (int i = 0; i < 32; i++) {
|
||||
ppu.FPR[i] = FPR[i];
|
||||
ppu.GPR[i] = GPR[i];
|
||||
ppu.VPR[i] = VPR[i];
|
||||
|
||||
if (i < 8) {
|
||||
ppu.SPRG[i] = SPRG[i];
|
||||
}
|
||||
}
|
||||
|
||||
ppu.FPSCR = FPSCR;
|
||||
ppu.CR = CR;
|
||||
ppu.XER = XER;
|
||||
ppu.VSCR = VSCR;
|
||||
ppu.LR = LR;
|
||||
ppu.CTR = CTR;
|
||||
ppu.TB = TB;
|
||||
|
||||
ppu.R_ADDR = R_ADDR;
|
||||
ppu.R_VALUE = R_VALUE;
|
||||
|
||||
for (int i = 0; i < (sizeof(mem_block) / 8); i++) {
|
||||
vm::write64(address + (i * 8), mem_block[i]);
|
||||
}
|
||||
}
|
||||
|
||||
void SetRandom(u32 addr) {
|
||||
std::mt19937_64 rng;
|
||||
|
||||
rng.seed((u32)std::chrono::high_resolution_clock::now().time_since_epoch().count());
|
||||
for (int i = 0; i < 32; i++) {
|
||||
FPR[i] = (double)rng();
|
||||
GPR[i] = rng();
|
||||
VPR[i]._f[0] = (float)rng();
|
||||
VPR[i]._f[1] = (float)rng();
|
||||
VPR[i]._f[2] = (float)rng();
|
||||
VPR[i]._f[3] = (float)rng();
|
||||
|
||||
if (i < 8) {
|
||||
SPRG[i] = rng();
|
||||
}
|
||||
}
|
||||
|
||||
FPSCR.FPSCR = (u32)rng();
|
||||
CR.CR = (u32)rng();
|
||||
XER.XER = 0;
|
||||
XER.CA = (u32)rng();
|
||||
XER.SO = (u32)rng();
|
||||
XER.OV = (u32)rng();
|
||||
VSCR.VSCR = (u32)rng();
|
||||
VSCR.X = 0;
|
||||
VSCR.Y = 0;
|
||||
LR = rng();
|
||||
CTR = rng();
|
||||
TB = rng();
|
||||
R_ADDR = rng();
|
||||
R_VALUE = rng();
|
||||
|
||||
address = addr;
|
||||
for (int i = 0; i < (sizeof(mem_block) / 8); i++) {
|
||||
mem_block[i] = rng();
|
||||
}
|
||||
}
|
||||
|
||||
std::string ToString() const {
|
||||
std::string ret;
|
||||
|
||||
for (int i = 0; i < 32; i++) {
|
||||
ret += fmt::Format("GPR[%02d] = 0x%016llx FPR[%02d] = %16g VPR[%02d] = 0x%s [%s]\n", i, GPR[i], i, FPR[i]._double, i, VPR[i].to_hex().c_str(), VPR[i].to_xyzw().c_str());
|
||||
}
|
||||
|
||||
for (int i = 0; i < 8; i++) {
|
||||
ret += fmt::Format("SPRG[%d] = 0x%016llx\n", i, SPRG[i]);
|
||||
}
|
||||
|
||||
ret += fmt::Format("CR = 0x%08x LR = 0x%016llx CTR = 0x%016llx TB=0x%016llx\n", CR.CR, LR, CTR, TB);
|
||||
ret += fmt::Format("XER = 0x%016llx [CA=%d | OV=%d | SO=%d]\n", XER.XER, fmt::by_value(XER.CA), fmt::by_value(XER.OV), fmt::by_value(XER.SO));
|
||||
//ret += fmt::Format("FPSCR = 0x%08x " // TODO: Uncomment after implementing FPSCR
|
||||
// "[RN=%d | NI=%d | XE=%d | ZE=%d | UE=%d | OE=%d | VE=%d | "
|
||||
// "VXCVI=%d | VXSQRT=%d | VXSOFT=%d | FPRF=%d | "
|
||||
// "FI=%d | FR=%d | VXVC=%d | VXIMZ=%d | "
|
||||
// "VXZDZ=%d | VXIDI=%d | VXISI=%d | VXSNAN=%d | "
|
||||
// "XX=%d | ZX=%d | UX=%d | OX=%d | VX=%d | FEX=%d | FX=%d]\n",
|
||||
// FPSCR.FPSCR,
|
||||
// fmt::by_value(FPSCR.RN),
|
||||
// fmt::by_value(FPSCR.NI), fmt::by_value(FPSCR.XE), fmt::by_value(FPSCR.ZE), fmt::by_value(FPSCR.UE), fmt::by_value(FPSCR.OE), fmt::by_value(FPSCR.VE),
|
||||
// fmt::by_value(FPSCR.VXCVI), fmt::by_value(FPSCR.VXSQRT), fmt::by_value(FPSCR.VXSOFT), fmt::by_value(FPSCR.FPRF),
|
||||
// fmt::by_value(FPSCR.FI), fmt::by_value(FPSCR.FR), fmt::by_value(FPSCR.VXVC), fmt::by_value(FPSCR.VXIMZ),
|
||||
// fmt::by_value(FPSCR.VXZDZ), fmt::by_value(FPSCR.VXIDI), fmt::by_value(FPSCR.VXISI), fmt::by_value(FPSCR.VXSNAN),
|
||||
// fmt::by_value(FPSCR.XX), fmt::by_value(FPSCR.ZX), fmt::by_value(FPSCR.UX), fmt::by_value(FPSCR.OX), fmt::by_value(FPSCR.VX), fmt::by_value(FPSCR.FEX), fmt::by_value(FPSCR.FX));
|
||||
//ret += fmt::Format("VSCR = 0x%08x [NJ=%d | SAT=%d]\n", VSCR.VSCR, fmt::by_value(VSCR.NJ), fmt::by_value(VSCR.SAT)); // TODO: Uncomment after implementing VSCR.SAT
|
||||
ret += fmt::Format("R_ADDR = 0x%016llx R_VALUE = 0x%016llx\n", R_ADDR, R_VALUE);
|
||||
|
||||
for (int i = 0; i < (sizeof(mem_block) / 8); i += 2) {
|
||||
ret += fmt::Format("mem_block[%d] = 0x%016llx mem_block[%d] = 0x%016llx\n", i, mem_block[i], i + 1, mem_block[i + 1]);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
static PPUThread * s_ppu_state = nullptr;
|
||||
static PPUInterpreter * s_interpreter = nullptr;
|
||||
#endif // PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
|
||||
template <class PPULLVMRecompilerFn, class PPUInterpreterFn, class... Args>
|
||||
void PPULLVMRecompiler::VerifyInstructionAgainstInterpreter(const char * name, PPULLVMRecompilerFn recomp_fn, PPUInterpreterFn interp_fn, PPUState & input_state, Args... args) {
|
||||
#ifdef PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
auto test_case = [&]() {
|
||||
(this->*recomp_fn)(args...);
|
||||
};
|
||||
auto input = [&]() {
|
||||
input_state.Store(*s_ppu_state);
|
||||
};
|
||||
auto check_result = [&](std::string & msg) {
|
||||
PPUState recomp_output_state;
|
||||
PPUState interp_output_state;
|
||||
|
||||
recomp_output_state.Load(*s_ppu_state, input_state.address);
|
||||
input_state.Store(*s_ppu_state);
|
||||
(s_interpreter->*interp_fn)(args...);
|
||||
interp_output_state.Load(*s_ppu_state, input_state.address);
|
||||
|
||||
if (interp_output_state.ToString() != recomp_output_state.ToString()) {
|
||||
msg = std::string("Input state:\n") + input_state.ToString() +
|
||||
std::string("\nOutput state:\n") + recomp_output_state.ToString() +
|
||||
std::string("\nInterpreter output state:\n") + interp_output_state.ToString();
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
};
|
||||
RunTest(name, test_case, input, check_result);
|
||||
#endif // PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
}
|
||||
|
||||
void PPULLVMRecompiler::RunTest(const char * name, std::function<void()> test_case, std::function<void()> input, std::function<bool(std::string & msg)> check_result) {
|
||||
#ifdef PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
// Create the unit test function
|
||||
m_current_function = (Function *)m_module->getOrInsertFunction(name, m_ir_builder->getVoidTy(),
|
||||
m_ir_builder->getInt8PtrTy() /*ppu_state*/,
|
||||
m_ir_builder->getInt64Ty() /*base_addres*/,
|
||||
m_ir_builder->getInt8PtrTy() /*interpreter*/, nullptr);
|
||||
m_current_function->setCallingConv(CallingConv::X86_64_Win64);
|
||||
auto arg_i = m_current_function->arg_begin();
|
||||
arg_i->setName("ppu_state");
|
||||
(++arg_i)->setName("base_address");
|
||||
(++arg_i)->setName("interpreter");
|
||||
|
||||
auto block = BasicBlock::Create(*m_llvm_context, "start", m_current_function);
|
||||
m_ir_builder->SetInsertPoint(block);
|
||||
|
||||
test_case();
|
||||
|
||||
m_ir_builder->CreateRetVoid();
|
||||
|
||||
// Print the IR
|
||||
std::string ir;
|
||||
raw_string_ostream ir_ostream(ir);
|
||||
m_current_function->print(ir_ostream);
|
||||
LOG_NOTICE(PPU, "[UT %s] LLVM IR:%s", name, ir.c_str());
|
||||
|
||||
std::string verify;
|
||||
raw_string_ostream verify_ostream(verify);
|
||||
if (verifyFunction(*m_current_function, &verify_ostream)) {
|
||||
LOG_ERROR(PPU, "[UT %s] Verification Failed:%s", name, verify.c_str());
|
||||
return;
|
||||
}
|
||||
|
||||
// Optimize
|
||||
m_fpm->run(*m_current_function);
|
||||
|
||||
// Print the optimized IR
|
||||
ir = "";
|
||||
m_current_function->print(ir_ostream);
|
||||
LOG_NOTICE(PPU, "[UT %s] Optimized LLVM IR:%s", name, ir.c_str());
|
||||
|
||||
// Generate the function
|
||||
MachineCodeInfo mci;
|
||||
m_execution_engine->runJITOnFunction(m_current_function, &mci);
|
||||
|
||||
// Disassemble the generated function
|
||||
auto disassembler = LLVMCreateDisasm(sys::getProcessTriple().c_str(), nullptr, 0, nullptr, nullptr);
|
||||
|
||||
LOG_NOTICE(PPU, "[UT %s] Disassembly:", name);
|
||||
for (uint64_t pc = 0; pc < mci.size();) {
|
||||
char str[1024];
|
||||
|
||||
auto size = LLVMDisasmInstruction(disassembler, (uint8_t *)mci.address() + pc, mci.size() - pc, (uint64_t)((uint8_t *)mci.address() + pc), str, sizeof(str));
|
||||
LOG_NOTICE(PPU, "[UT %s] %p: %s.", name, (uint8_t *)mci.address() + pc, str);
|
||||
pc += size;
|
||||
}
|
||||
|
||||
LLVMDisasmDispose(disassembler);
|
||||
|
||||
// Run the test
|
||||
input();
|
||||
std::vector<GenericValue> args;
|
||||
args.push_back(GenericValue(s_ppu_state));
|
||||
args.push_back(GenericValue(s_interpreter));
|
||||
m_execution_engine->runFunction(m_current_function, args);
|
||||
|
||||
// Verify results
|
||||
std::string msg;
|
||||
bool pass = check_result(msg);
|
||||
if (pass) {
|
||||
LOG_NOTICE(PPU, "[UT %s] Test passed. %s", name, msg.c_str());
|
||||
} else {
|
||||
LOG_ERROR(PPU, "[UT %s] Test failed. %s", name, msg.c_str());
|
||||
}
|
||||
|
||||
m_execution_engine->freeMachineCodeForFunction(m_current_function);
|
||||
#endif // PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
}
|
||||
|
||||
void PPULLVMRecompiler::RunAllTests(PPUThread * ppu_state, PPUInterpreter * interpreter) {
|
||||
#ifdef PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
s_ppu_state = ppu_state;
|
||||
s_interpreter = interpreter;
|
||||
|
||||
PPUState initial_state;
|
||||
initial_state.Load(*ppu_state, 0x10000);
|
||||
|
||||
LOG_NOTICE(PPU, "Running Unit Tests");
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MFVSCR, 0, 5, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTVSCR, 0, 5, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDCUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDSBS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDSHS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDSWS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUBM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUBS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUHM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUHS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUWM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VADDUWS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAND, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VANDC, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGSB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGSH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGSW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGUB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGUH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VAVGUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCFSX, 0, 5, 0, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCFSX, 5, 5, 0, 3, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCFUX, 0, 5, 0, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCFUX, 5, 5, 0, 2, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPBFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPBFP, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPBFP_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPBFP_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQFP, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQFP_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQFP_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUB, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUB_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUB_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUH, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUH_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUH_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUW, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUW_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPEQUW_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGEFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGEFP, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGEFP_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGEFP_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTFP, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTFP_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTFP_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSB, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSB_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSB_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSH, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSH_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSH_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSW, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSW_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTSW_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUB, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUB_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUB_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUH, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUH_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUH_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUW, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUW_, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VCMPGTUW_, 5, 5, 0, 1, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMADDFP, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXSB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXSH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXSW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXUB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXUH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMAXUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINSB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINSH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINSW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINUB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINUH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMINUW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGHB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGHH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGHW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGLB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGLH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMRGLW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMSUMMBM, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMSUMSHM, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMSUMUBM, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VMSUMUHM, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VNMSUBFP, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VNOR, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VOR, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VPERM, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VREFP, 0, 5, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSEL, 0, 5, 0, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSL, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSLB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSLDOI, 0, 5, 0, 1, 2, 6);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSLH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSLO, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSLW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTB, 0, 5, 0, 3, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTH, 0, 5, 0, 3, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTISB, 0, 5, 0, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTISH, 0, 5, 0, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTISW, 0, 5, 0, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSPLTW, 0, 5, 0, 3, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSR, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRAB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRAH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRAW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRB, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRH, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRO, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSRW, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBFP, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBSBS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBSHS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBSWS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUBM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUBS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUHM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUHS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUWM, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VSUBUWS, 0, 5, 0, 1, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(VXOR, 0, 5, 0, 1, 2);
|
||||
// TODO: Rest of the vector instructions
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLI, 0, 5, 1, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 0, 5, 1, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPLI, 0, 5, 1, 0, 7, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPLI, 5, 5, 1, 1, 7, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPI, 0, 5, 5, 0, 7, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPI, 5, 5, 5, 1, 7, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDIC, 0, 5, 1, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDIC_, 0, 5, 1, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDI, 0, 5, 1, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDI, 5, 5, 0, 2, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDIS, 0, 5, 1, 2, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDIS, 5, 5, 0, 2, -12345);
|
||||
// TODO: BC
|
||||
// TODO: SC
|
||||
// TODO: B
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MCRF, 0, 5, 0, 7);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MCRF, 5, 5, 6, 2);
|
||||
// TODO: BCLR
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRNOR, 0, 5, 0, 7, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRANDC, 0, 5, 5, 6, 7);
|
||||
// TODO: ISYNC
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRXOR, 0, 5, 7, 7, 7);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRNAND, 0, 5, 3, 4, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRAND, 0, 5, 1, 2, 3);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CREQV, 0, 5, 2, 1, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CRORC, 0, 5, 3, 4, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CROR, 0, 5, 6, 7, 0);
|
||||
// TODO: BCCTR
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWIMI, 0, 5, 7, 8, 9, 12, 25, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWIMI, 5, 5, 21, 22, 21, 18, 24, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWINM, 0, 5, 7, 8, 9, 12, 25, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWINM, 5, 5, 21, 22, 21, 18, 24, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWNM, 0, 5, 7, 8, 9, 12, 25, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLWNM, 5, 5, 21, 22, 21, 18, 24, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ORI, 0, 5, 25, 29, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ORIS, 0, 5, 7, 31, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(XORI, 0, 5, 0, 19, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(XORIS, 0, 5, 3, 14, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ANDI_, 0, 5, 16, 7, 12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ANDIS_, 0, 5, 23, 21, -12345);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDICL, 0, 5, 7, 8, 9, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDICL, 5, 5, 21, 22, 43, 43, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDICR, 0, 5, 7, 8, 0, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDICR, 5, 5, 21, 22, 63, 43, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDIC, 0, 5, 7, 8, 9, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDIC, 5, 5, 21, 22, 23, 43, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDIMI, 0, 5, 7, 8, 9, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDIMI, 5, 5, 21, 22, 23, 43, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDC_LR, 0, 5, 7, 8, 9, 12, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(RLDC_LR, 5, 5, 21, 22, 23, 43, 1, 1);
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADD, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADD, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBF, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBF, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(NEG, 0, 5, 7, 8, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(NEG, 5, 5, 21, 22, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHDU, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHDU, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHWU, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHWU, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHD, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHD, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHW, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULHW, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLD, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLD, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLW, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLW, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVD, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVD, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVDU, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVDU, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVW, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVW, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVWU, 0, 5, 7, 8, 9, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(DIVWU, 5, 5, 21, 22, 23, 0, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(AND, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(AND, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(OR, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(OR, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(XOR, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(XOR, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(NOR, 0, 5, 7, 8, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(NOR, 5, 5, 21, 22, 23, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMP, 0, 5, 3, 0, 9, 31);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMP, 5, 5, 6, 1, 23, 14);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPL, 0, 5, 3, 0, 9, 31);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPL, 5, 5, 6, 1, 23, 14);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDC, 0, 5, 0, 1, 2, 0, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ADDC, 5, 5, 0, 1, 2, 0, true);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFC, 0, 5, 0, 1, 2, 0, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFC, 5, 5, 0, 1, 2, 0, true);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSB, 0, 5, 3, 5, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSB, 5, 5, 3, 5, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSH, 0, 5, 6, 9, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSH, 5, 5, 6, 9, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSW, 0, 5, 25, 29, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EXTSW, 5, 5, 25, 29, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTSPR, 0, 5, 0x20, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTSPR, 5, 5, 0x100, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTSPR, 10, 5, 0x120, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MTSPR, 15, 5, 0x8, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MFSPR, 0, 5, 5, 0x20);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MFSPR, 5, 5, 5, 0x100);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MFSPR, 10, 5, 5, 0x120);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MFSPR, 15, 5, 5, 0x8);
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAWI, 0, 5, 5, 6, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAWI, 5, 5, 5, 6, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAWI, 10, 5, 5, 6, 22, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAWI, 15, 5, 5, 6, 31, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAW, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAW, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRADI1, 0, 5, 5, 6, 0, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRADI1, 5, 5, 5, 6, 12, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRADI1, 10, 5, 5, 6, 48, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRADI1, 15, 5, 5, 6, 63, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAD, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRAD, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SLW, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SLW, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRW, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRW, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SLD, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SLD, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRD, 0, 5, 5, 6, 7, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SRD, 5, 5, 5, 6, 7, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CNTLZW, 0, 5, 5, 6, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CNTLZW, 5, 5, 5, 6, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CNTLZD, 0, 5, 5, 6, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CNTLZD, 5, 5, 5, 6, 1);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(ISYNC, 0, 5);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(EIEIO, 0, 5);
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FSQRT, 0, 5, 0, 1, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FSQRTS, 0, 5, 0, 1, false);
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FDIV, 0, 5, 0, 1, 2, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FSUB, 0, 5, 0, 1, 2, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FADD, 0, 5, 0, 1, 2, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FMUL, 0, 5, 0, 1, 2, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FMSUB, 0, 5, 0, 1, 2, 3, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FMADD, 0, 5, 0, 1, 2, 3, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FNMSUB, 0, 5, 0, 1, 2, 3, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FNMADD, 0, 5, 0, 1, 2, 3, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FNEG, 0, 5, 0, 1, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FMR, 0, 5, 0, 1, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FNABS, 0, 5, 0, 1, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FABS, 0, 5, 0, 1, false);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(FCFID, 0, 5, 0, 1, false);
|
||||
|
||||
PPUState input;
|
||||
input.SetRandom(0x10000);
|
||||
input.GPR[14] = 10;
|
||||
input.GPR[21] = 15;
|
||||
input.GPR[23] = 0x10000;
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZ, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZ, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZ, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZ, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHZUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHA, 0, input, 5, 0, 0x100F0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHA, 1, input, 5, 14, 0x100F0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHAU, 0, input, 5, 14, 0x100F0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHAX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHAX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHAUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LHBRX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZ, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZ, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWZUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWA, 0, input, 5, 0, 0x100F0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWA, 1, input, 5, 14, 0x100F0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWAX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWAX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWAUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWBRX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LD, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LD, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDBRX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFS, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFS, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFSU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFSX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFSX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFSUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFD, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFD, 1, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFDU, 0, input, 5, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFDX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFDX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LFDUX, 0, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWARX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LWARX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDARX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LDARX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LSWI, 0, input, 5, 23, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LSWI, 1, input, 5, 23, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LSWI, 2, input, 5, 23, 7);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LSWI, 3, input, 5, 23, 25);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LMW, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LMW, 1, input, 16, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVXL, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVXL, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSL, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSL, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSL, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSR, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSR, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVSR, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEBX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEBX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEBX, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEHX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEHX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEHX, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEWX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEWX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVEWX, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVLX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVLX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVLX, 2, input, 5, 21, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVRX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVRX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LVRX, 2, input, 5, 21, 23);
|
||||
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STB, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STB, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STBU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STBX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STBX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STBUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STH, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STH, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STHU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STHX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STHX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STHUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STHBRX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STW, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STW, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STWU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STWX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STWX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STWUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STWBRX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STD, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STD, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STDU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STDX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STDX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STDUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFS, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFS, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFSU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFSX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFSX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFSUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFD, 0, input, 3, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFD, 1, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFDU, 0, input, 3, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFDX, 0, input, 3, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFDX, 1, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFDUX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STFIWX, 0, input, 3, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVXL, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVXL, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEBX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEBX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEHX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEHX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEWX, 0, input, 5, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STVEWX, 1, input, 5, 14, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STMW, 0, input, 5, 0, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STMW, 1, input, 16, 14, 0x10000);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STSWI, 0, input, 5, 23, 0);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STSWI, 1, input, 5, 23, 2);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STSWI, 2, input, 5, 23, 7);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(STSWI, 3, input, 5, 23, 25);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(DCBZ, 0, input, 0, 23);
|
||||
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(DCBZ, 1, input, 14, 23);
|
||||
|
||||
initial_state.Store(*ppu_state);
|
||||
#endif // PPU_LLVM_RECOMPILER_UNIT_TESTS
|
||||
}
|
||||
@ -9,6 +9,7 @@
|
||||
#include "Emu/SysCalls/Static.h"
|
||||
#include "Emu/Cell/PPUDecoder.h"
|
||||
#include "Emu/Cell/PPUInterpreter.h"
|
||||
#include "Emu/Cell/PPULLVMRecompiler.h"
|
||||
|
||||
PPUThread& GetCurrentPPUThread()
|
||||
{
|
||||
@ -103,13 +104,18 @@ void PPUThread::DoRun()
|
||||
break;
|
||||
|
||||
case 1:
|
||||
case 2:
|
||||
{
|
||||
auto ppui = new PPUInterpreter(*this);
|
||||
m_dec = new PPUDecoder(ppui);
|
||||
}
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (!m_dec) {
|
||||
m_dec = new PPULLVMEmulator(*this);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
LOG_ERROR(PPU, "Invalid CPU decoder mode: %d", Ini.CPUDecoderMode.GetValue());
|
||||
Emu.Pause();
|
||||
|
||||
@ -419,8 +419,8 @@ void MainFrame::Config(wxCommandEvent& WXUNUSED(event))
|
||||
wxCheckBox* chbox_dbg_ap_systemcall = new wxCheckBox(p_hle, wxID_ANY, "Auto Pause at System Call");
|
||||
wxCheckBox* chbox_dbg_ap_functioncall = new wxCheckBox(p_hle, wxID_ANY, "Auto Pause at Function Call");
|
||||
|
||||
cbox_cpu_decoder->Append("PPU Interpreter & DisAsm");
|
||||
cbox_cpu_decoder->Append("PPU Interpreter");
|
||||
cbox_cpu_decoder->Append("PPU JIT (LLVM)");
|
||||
|
||||
cbox_spu_decoder->Append("SPU Interpreter");
|
||||
cbox_spu_decoder->Append("SPU JIT (asmjit)");
|
||||
|
||||
@ -241,7 +241,7 @@ public:
|
||||
void Load()
|
||||
{
|
||||
// Core
|
||||
CPUDecoderMode.Load(2);
|
||||
CPUDecoderMode.Load(1);
|
||||
SPUDecoderMode.Load(1);
|
||||
|
||||
// Graphics
|
||||
|
||||
@ -61,6 +61,7 @@
|
||||
<ClCompile Include="Emu\Cell\MFC.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPCDecoder.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPCThread.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPULLVMRecompilerTests.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPUThread.cpp" />
|
||||
<ClCompile Include="Emu\Cell\RawSPUThread.cpp" />
|
||||
<ClCompile Include="Emu\Cell\SPURecompilerCore.cpp" />
|
||||
@ -216,6 +217,7 @@
|
||||
<ClCompile Include="Loader\SELF.cpp" />
|
||||
<ClCompile Include="Loader\TROPUSR.cpp" />
|
||||
<ClCompile Include="Loader\TRP.cpp" />
|
||||
<ClCompile Include="Emu\Cell\PPULLVMRecompiler.cpp" />
|
||||
<ClCompile Include="stdafx.cpp">
|
||||
<PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug - MemLeak|Win32'">Create</PrecompiledHeader>
|
||||
<PrecompiledHeader Condition="'$(Configuration)|$(Platform)'=='Debug - MemLeak|x64'">Create</PrecompiledHeader>
|
||||
@ -427,6 +429,7 @@
|
||||
<ClInclude Include="Loader\TROPUSR.h" />
|
||||
<ClInclude Include="Loader\TRP.h" />
|
||||
<ClInclude Include="restore_new.h" />
|
||||
<ClInclude Include="Emu\Cell\PPULLVMRecompiler.h" />
|
||||
<ClInclude Include="stdafx.h" />
|
||||
</ItemGroup>
|
||||
<PropertyGroup Label="Globals">
|
||||
@ -510,15 +513,15 @@
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);</IncludePath>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|x64'">
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);</IncludePath>
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);..\llvm\include;..\llvm_build\include</IncludePath>
|
||||
<IntDir>$(Platform)\$(Configuration)\emucore\</IntDir>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug - MemLeak|x64'">
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);</IncludePath>
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);..\llvm\include;..\llvm_build\include</IncludePath>
|
||||
<IntDir>$(Platform)\$(Configuration)\emucore\</IntDir>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|x64'">
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);</IncludePath>
|
||||
<IncludePath>.\;..\;..\asmjit\src\asmjit;..\wxWidgets\include\msvc;..\wxWidgets\include;.\OpenAL\include;..\ffmpeg\WindowsInclude;..\ffmpeg\Windows\x86_64\Include;$(VC_IncludePath);$(WindowsSDK_IncludePath);..\llvm\include;..\llvm_build\include</IncludePath>
|
||||
<IntDir>$(Platform)\$(Configuration)\emucore\</IntDir>
|
||||
</PropertyGroup>
|
||||
<ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
|
||||
|
||||
@ -626,6 +626,12 @@
|
||||
<ClCompile Include="Emu\SysCalls\Modules\cellMic.cpp">
|
||||
<Filter>Emu\SysCalls\Modules</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="Emu\Cell\PPULLVMRecompiler.cpp">
|
||||
<Filter>Emu\Cell</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="Emu\Cell\PPULLVMRecompilerTests.cpp">
|
||||
<Filter>Source Files</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="Crypto\aes.h">
|
||||
@ -1234,5 +1240,8 @@
|
||||
<ClInclude Include="cellMic.h">
|
||||
<Filter>Emu\SysCalls\Modules</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Emu\Cell\PPULLVMRecompiler.h">
|
||||
<Filter>Emu\Cell</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
</Project>
|
||||
@ -1,4 +1,4 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project ToolsVersion="12.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<PropertyGroup />
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project ToolsVersion="12.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<PropertyGroup />
|
||||
</Project>
|
||||
@ -87,10 +87,10 @@
|
||||
</ClCompile>
|
||||
<Link>
|
||||
<GenerateDebugInformation>true</GenerateDebugInformation>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31ud_adv.lib;wxbase31ud.lib;wxmsw31ud_core.lib;wxmsw31ud_aui.lib;wxtiffd.lib;wxjpegd.lib;wxpngd.lib;wxzlibd.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31ud_adv.lib;wxbase31ud.lib;wxmsw31ud_core.lib;wxmsw31ud_aui.lib;wxtiffd.lib;wxjpegd.lib;wxpngd.lib;wxzlibd.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;LLVMJIT.lib;LLVMVectorize.lib;LLVMX86CodeGen.lib;LLVMX86Disassembler.lib;LLVMExecutionEngine.lib;LLVMAsmPrinter.lib;LLVMSelectionDAG.lib;LLVMCodeGen.lib;LLVMScalarOpts.lib;LLVMInstCombine.lib;LLVMTransformUtils.lib;LLVMipa.lib;LLVMAnalysis.lib;LLVMTarget.lib;LLVMX86Desc.lib;LLVMX86AsmPrinter.lib;LLVMObject.lib;LLVMMCParser.lib;LLVMBitReader.lib;LLVMCore.lib;LLVMX86Utils.lib;LLVMMC.lib;LLVMX86Info.lib;LLVMSupport.lib;
;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<IgnoreSpecificDefaultLibraries>%(IgnoreSpecificDefaultLibraries)</IgnoreSpecificDefaultLibraries>
|
||||
<DataExecutionPrevention>false</DataExecutionPrevention>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64</AdditionalLibraryDirectories>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64;..\llvm_build\Debug\lib</AdditionalLibraryDirectories>
|
||||
</Link>
|
||||
<PreBuildEvent>
|
||||
<Command>"$(SolutionDir)\Utilities\git-version-gen.cmd"</Command>
|
||||
@ -113,10 +113,10 @@
|
||||
</ClCompile>
|
||||
<Link>
|
||||
<GenerateDebugInformation>true</GenerateDebugInformation>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31ud_adv.lib;wxbase31ud.lib;wxmsw31ud_core.lib;wxmsw31ud_aui.lib;wxtiffd.lib;wxjpegd.lib;wxpngd.lib;wxzlibd.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31ud_adv.lib;wxbase31ud.lib;wxmsw31ud_core.lib;wxmsw31ud_aui.lib;wxtiffd.lib;wxjpegd.lib;wxpngd.lib;wxzlibd.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;LLVMJIT.lib;LLVMVectorize.lib;LLVMX86CodeGen.lib;LLVMX86Disassembler.lib;LLVMExecutionEngine.lib;LLVMAsmPrinter.lib;LLVMSelectionDAG.lib;LLVMCodeGen.lib;LLVMScalarOpts.lib;LLVMInstCombine.lib;LLVMTransformUtils.lib;LLVMipa.lib;LLVMAnalysis.lib;LLVMTarget.lib;LLVMX86Desc.lib;LLVMX86AsmPrinter.lib;LLVMObject.lib;LLVMMCParser.lib;LLVMBitReader.lib;LLVMCore.lib;LLVMX86Utils.lib;LLVMMC.lib;LLVMX86Info.lib;LLVMSupport.lib;
;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<IgnoreSpecificDefaultLibraries>%(IgnoreSpecificDefaultLibraries)</IgnoreSpecificDefaultLibraries>
|
||||
<DataExecutionPrevention>false</DataExecutionPrevention>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64</AdditionalLibraryDirectories>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64;..\llvm_build\Debug\lib</AdditionalLibraryDirectories>
|
||||
</Link>
|
||||
<PreBuildEvent>
|
||||
<Command>"$(SolutionDir)\Utilities\git-version-gen.cmd"</Command>
|
||||
@ -148,12 +148,12 @@
|
||||
<GenerateDebugInformation>true</GenerateDebugInformation>
|
||||
<EnableCOMDATFolding>true</EnableCOMDATFolding>
|
||||
<OptimizeReferences>true</OptimizeReferences>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31u_adv.lib;wxbase31u.lib;wxmsw31u_core.lib;wxmsw31u_aui.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;wxtiff.lib;wxjpeg.lib;wxpng.lib;wxzlib.lib;wxregexu.lib;wxexpat.lib;wsock32.lib;wininet.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<AdditionalDependencies>$(SolutionDir)$(Platform)\$(Configuration)\emucore.lib;wxmsw31u_adv.lib;wxbase31u.lib;wxmsw31u_core.lib;wxmsw31u_aui.lib;odbc32.lib;odbccp32.lib;comctl32.lib;ws2_32.lib;shlwapi.lib;winmm.lib;kernel32.lib;user32.lib;gdi32.lib;winspool.lib;comdlg32.lib;advapi32.lib;shell32.lib;ole32.lib;oleaut32.lib;uuid.lib;rpcrt4.lib;wxtiff.lib;wxjpeg.lib;wxpng.lib;wxzlib.lib;wxregexu.lib;wxexpat.lib;wsock32.lib;wininet.lib;avcodec.lib;avformat.lib;avutil.lib;swresample.lib;swscale.lib;libOpenAL32.dll.a;asmjit.lib;LLVMJIT.lib;LLVMVectorize.lib;LLVMX86CodeGen.lib;LLVMX86Disassembler.lib;LLVMExecutionEngine.lib;LLVMAsmPrinter.lib;LLVMSelectionDAG.lib;LLVMCodeGen.lib;LLVMScalarOpts.lib;LLVMInstCombine.lib;LLVMTransformUtils.lib;LLVMipa.lib;LLVMAnalysis.lib;LLVMTarget.lib;LLVMX86Desc.lib;LLVMX86AsmPrinter.lib;LLVMObject.lib;LLVMMCParser.lib;LLVMBitReader.lib;LLVMCore.lib;LLVMX86Utils.lib;LLVMMC.lib;LLVMX86Info.lib;LLVMSupport.lib;
;%(AdditionalDependencies)</AdditionalDependencies>
|
||||
<IgnoreAllDefaultLibraries>
|
||||
</IgnoreAllDefaultLibraries>
|
||||
<IgnoreSpecificDefaultLibraries>%(IgnoreSpecificDefaultLibraries)</IgnoreSpecificDefaultLibraries>
|
||||
<DataExecutionPrevention>false</DataExecutionPrevention>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64</AdditionalLibraryDirectories>
|
||||
<AdditionalLibraryDirectories>..\wxWidgets\lib\vc_x64_lib;..\ffmpeg\Windows\x86_64\lib;..\OpenAL\Win64;..\llvm_build\Release\lib</AdditionalLibraryDirectories>
|
||||
</Link>
|
||||
<PreBuildEvent>
|
||||
<Command>
|
||||
|
||||
@ -32,6 +32,7 @@
|
||||
#include <sstream>
|
||||
#include <functional>
|
||||
#include <algorithm>
|
||||
#include <random>
|
||||
|
||||
#include <sys/stat.h>
|
||||
#include "Utilities/GNU.h"
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user