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https://github.com/RPCS3/rpcs3.git
synced 2025-01-26 09:35:27 +00:00
Compilation fixes
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parent
15b0b6830e
commit
555d053e32
@ -22,6 +22,7 @@
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<ClCompile Include="asmjit\src\asmjit\base\assembler.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\codegen.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\compiler.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\constpool.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\context.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\cpuinfo.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\cputicks.cpp" />
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@ -44,6 +45,9 @@
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<ClCompile Include="asmjit\src\asmjit\x86\x86defs.cpp" />
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<ClCompile Include="asmjit\src\asmjit\x86\x86func.cpp" />
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="asmjit\src\asmjit\base\constpool.h" />
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</ItemGroup>
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<PropertyGroup Label="Globals">
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<ProjectGuid>{AC40FF01-426E-4838-A317-66354CEFAE88}</ProjectGuid>
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<RootNamespace>asmjit</RootNamespace>
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@ -25,5 +25,9 @@
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<ClCompile Include="asmjit\src\asmjit\base\string.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\vmem.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\zone.cpp" />
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<ClCompile Include="asmjit\src\asmjit\base\constpool.cpp" />
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="asmjit\src\asmjit\base\constpool.h" />
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</ItemGroup>
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</Project>
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@ -16,7 +16,7 @@ using namespace asmjit::host;
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struct g_imm_table_struct
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{
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u16 cntb_table[65536];
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//u16 cntb_table[65536];
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__m128i fsmb_table[65536];
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__m128i fsmh_table[256];
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@ -28,7 +28,7 @@ struct g_imm_table_struct
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g_imm_table_struct()
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{
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static_assert(offsetof(g_imm_table_struct, cntb_table) == 0, "offsetof(cntb_table) != 0");
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/*static_assert(offsetof(g_imm_table_struct, cntb_table) == 0, "offsetof(cntb_table) != 0");
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for (u32 i = 0; i < sizeof(cntb_table) / sizeof(cntb_table[0]); i++)
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{
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u32 cnt_low = 0, cnt_high = 0;
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@ -38,7 +38,7 @@ struct g_imm_table_struct
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cnt_high += (i >> (j + 8)) & 1;
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}
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cntb_table[i] = (cnt_high << 8) | cnt_low;
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}
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}*/
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for (u32 i = 0; i < sizeof(fsm_table) / sizeof(fsm_table[0]); i++)
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{
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for (u32 j = 0; j < 4; j++) fsm_table[i].m128i_u32[j] = (i & (1 << j)) ? ~0 : 0;
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@ -660,6 +660,7 @@ private:
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}
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void ROTMA(u32 rt, u32 ra, u32 rb)
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{
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#ifdef _M_X64
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XmmInvalidate(rt);
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for (u32 i = 0; i < 4; i++)
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{
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@ -670,6 +671,14 @@ private:
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c.mov(cpu_dword(GPR[rt]._u32[i]), qw0->r32());
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}
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LOG_OPCODE();
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#else
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WRAPPER_BEGIN(rt, ra, rb, zz);
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CPU.GPR[rt]._i32[0] = ((0 - CPU.GPR[rb]._u32[0]) & 0x3f) < 32 ? CPU.GPR[ra]._i32[0] >> ((0 - CPU.GPR[rb]._u32[0]) & 0x3f) : CPU.GPR[ra]._i32[0] >> 31;
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CPU.GPR[rt]._i32[1] = ((0 - CPU.GPR[rb]._u32[1]) & 0x3f) < 32 ? CPU.GPR[ra]._i32[1] >> ((0 - CPU.GPR[rb]._u32[1]) & 0x3f) : CPU.GPR[ra]._i32[1] >> 31;
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CPU.GPR[rt]._i32[2] = ((0 - CPU.GPR[rb]._u32[2]) & 0x3f) < 32 ? CPU.GPR[ra]._i32[2] >> ((0 - CPU.GPR[rb]._u32[2]) & 0x3f) : CPU.GPR[ra]._i32[2] >> 31;
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CPU.GPR[rt]._i32[3] = ((0 - CPU.GPR[rb]._u32[3]) & 0x3f) < 32 ? CPU.GPR[ra]._i32[3] >> ((0 - CPU.GPR[rb]._u32[3]) & 0x3f) : CPU.GPR[ra]._i32[3] >> 31;
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WRAPPER_END(rt, ra, rb, 0);
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#endif
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}
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void SHL(u32 rt, u32 ra, u32 rb)
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{
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@ -1922,12 +1931,19 @@ private:
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}
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void XSWD(u32 rt, u32 ra)
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{
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#ifdef _M_X64
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c.movsxd(*qw0, cpu_dword(GPR[ra]._i32[0]));
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c.movsxd(*qw1, cpu_dword(GPR[ra]._i32[2]));
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c.mov(cpu_qword(GPR[rt]._i64[0]), *qw0);
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c.mov(cpu_qword(GPR[rt]._i64[1]), *qw1);
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XmmInvalidate(rt);
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LOG_OPCODE();
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#else
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WRAPPER_BEGIN(rt, ra, yy, zz);
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CPU.GPR[rt]._i64[0] = (s64)CPU.GPR[ra]._i32[0];
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CPU.GPR[rt]._i64[1] = (s64)CPU.GPR[ra]._i32[2];
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WRAPPER_END(rt, ra, 0, 0);
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#endif
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}
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void XSHW(u32 rt, u32 ra)
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{
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@ -1939,13 +1955,27 @@ private:
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}
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void CNTB(u32 rt, u32 ra)
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{
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XmmInvalidate(rt);
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/*XmmInvalidate(rt);
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for (u32 i = 0; i < 8; i++)
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{
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c.movzx(*addr, cpu_word(GPR[ra]._u16[i]));
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c.movzx(*addr, word_ptr(*g_imm_var, *addr, 1, offsetof(g_imm_table_struct, cntb_table[0])));
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c.mov(cpu_word(GPR[rt]._u16[i]), addr->r16());
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}
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}*/
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const XmmLink& va = XmmGet(ra, rt);
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const XmmLink& v1 = XmmCopy(va);
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const XmmLink& vm = XmmAlloc();
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c.psrlw(v1.get(), 4);
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c.pand(va.get(), XmmConst(_mm_set1_epi8(0xf)));
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c.pand(v1.get(), XmmConst(_mm_set1_epi8(0xf)));
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c.movdqa(vm.get(), XmmConst(_mm_set_epi8(4, 3, 3, 2, 3, 2, 2, 1, 3, 2, 2, 1, 2, 1, 1, 0)));
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c.pshufb(vm.get(), va.get());
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c.movdqa(va.get(), XmmConst(_mm_set_epi8(4, 3, 3, 2, 3, 2, 2, 1, 3, 2, 2, 1, 2, 1, 1, 0)));
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c.pshufb(va.get(), v1.get());
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c.paddb(va.get(), vm.get());
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XmmFinalize(va, rt);
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XmmFinalize(v1);
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XmmFinalize(vm);
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LOG_OPCODE();
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}
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void XSBH(u32 rt, u32 ra)
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@ -299,10 +299,12 @@ int cellAudioInit()
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// convert the data from float to u16 with clipping:
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if (!first_mix)
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{
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/*for (u32 i = 0; i < (sizeof(buffer) / sizeof(float)); i++)
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#ifndef _M_X64
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for (u32 i = 0; i < (sizeof(buf2ch) / sizeof(float)); i++)
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{
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oal_buffer[oal_pos][oal_buffer_offset + i] = (s16)(min<float>(max<float>(buffer[i] * 0x8000, -0x8000), 0x7fff));
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}*/
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oal_buffer[oal_pos][oal_buffer_offset + i] = (s16)(min<float>(max<float>(buf2ch[i] * 0x8000, -0x8000), 0x7fff));
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}
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#else
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// 2x MULPS
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// 2x MAXPS (optional)
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// 2x MINPS (optional)
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@ -315,6 +317,7 @@ int cellAudioInit()
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_mm_cvtps_epi32(_mm_mul_ps((__m128&)(buf2ch[i]), float2u16)),
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_mm_cvtps_epi32(_mm_mul_ps((__m128&)(buf2ch[i + 4]), float2u16)));
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}
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#endif
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}
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const u64 stamp1 = get_system_time();
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