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SPU analyser: internal spu_itype optimization

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Use only 1 byte for instruction type.
Flags are transformed into range comparisons.
This commit is contained in:
Nekotekina 2019-05-02 19:25:00 +03:00
parent 15bd3b8724
commit 54dc617f39
1 changed files with 106 additions and 92 deletions
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198
rpcs3/Emu/Cell/SPUAnalyser.h
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@ -3,20 +3,16 @@
// SPU Instruction Type
struct spu_itype
{
enum
{
memory = 1 << 8, // Memory Load/Store Instructions
constant = 1 << 9, // Constant Formation Instructions
integer = 1 << 10, // Integer and Logical Instructions
shiftrot = 1 << 11, // Shift and Rotate Instructions
compare = 1 << 12, // Compare Instructions
branch = 1 << 13, // Branch Instructions
floating = 1 << 14, // Floating-Point Instructions
static constexpr struct memory_tag{} memory{}; // Memory Load/Store Instructions
static constexpr struct constant_tag{} constant{}; // Constant Formation Instructions
static constexpr struct integer_tag{} integer{}; // Integer and Logical Instructions
static constexpr struct shiftrot_tag{} shiftrot{}; // Shift and Rotate Instructions
static constexpr struct compare_tag{} compare{}; // Compare Instructions
static constexpr struct branch_tag{} branch{}; // Branch Instructions
static constexpr struct floating_tag{} floating{}; // Floating-Point Instructions
static constexpr struct quadrop_tag{} _quadrop{}; // 4-op Instructions
_quadrop = 1 << 15, // 4-op Instructions
};
enum type
enum type : unsigned char
{
UNK = 0,
@ -43,16 +39,33 @@ struct spu_itype
RCHCNT,
WRCH,
LQD = memory,
BR, // branch_tag first
BRA,
BRNZ,
BRZ,
BRHNZ,
BRHZ,
BRSL,
BRASL,
IRET,
BI,
BISLED,
BISL,
BIZ,
BINZ,
BIHZ,
BIHNZ, // branch_tag last
LQD, // memory_tag first
LQX,
LQA,
LQR,
STQD,
STQX,
STQA,
STQR,
STQR, // memory_tag last
CBD = constant,
CBD, // constant_tag first
CBX,
CHD,
CHX,
@ -65,9 +78,9 @@ struct spu_itype
IL,
ILA,
IOHL,
FSMBI,
FSMBI, // constant_tag last
AH = integer,
AH, // integer_tag first
AHI,
A,
AI,
@ -124,79 +137,15 @@ struct spu_itype
NOR,
EQV,
MPYA = integer | _quadrop,
MPYA, // quadrop_tag first
SELB,
SHUFB,
SHUFB, // integer_tag last
SHLH = shiftrot,
SHLHI,
SHL,
SHLI,
SHLQBI,
SHLQBII,
SHLQBY,
SHLQBYI,
SHLQBYBI,
ROTH,
ROTHI,
ROT,
ROTI,
ROTQBY,
ROTQBYI,
ROTQBYBI,
ROTQBI,
ROTQBII,
ROTHM,
ROTHMI,
ROTM,
ROTMI,
ROTQMBY,
ROTQMBYI,
ROTQMBYBI,
ROTQMBI,
ROTQMBII,
ROTMAH,
ROTMAHI,
ROTMA,
ROTMAI,
FMA, // floating_tag first
FNMS,
FMS, // quadrop_tag last
CEQB = compare,
CEQBI,
CEQH,
CEQHI,
CEQ,
CEQI,
CGTB,
CGTBI,
CGTH,
CGTHI,
CGT,
CGTI,
CLGTB,
CLGTBI,
CLGTH,
CLGTHI,
CLGT,
CLGTI,
BR = branch,
BRA,
BRSL,
BRASL,
BI,
IRET,
BISLED,
BISL,
BRNZ,
BRZ,
BRHNZ,
BRHZ,
BIZ,
BINZ,
BIHZ,
BIHNZ,
FA = floating,
FA,
DFA,
FS,
DFS,
@ -226,11 +175,58 @@ struct spu_itype
DFCMEQ,
DFCGT,
DFCMGT,
DFTSV,
DFTSV, // floating_tag last
FMA = floating | _quadrop,
FNMS,
FMS,
SHLH, // shiftrot_tag first
SHLHI,
SHL,
SHLI,
SHLQBI,
SHLQBII,
SHLQBY,
SHLQBYI,
SHLQBYBI,
ROTH,
ROTHI,
ROT,
ROTI,
ROTQBY,
ROTQBYI,
ROTQBYBI,
ROTQBI,
ROTQBII,
ROTHM,
ROTHMI,
ROTM,
ROTMI,
ROTQMBY,
ROTQMBYI,
ROTQMBYBI,
ROTQMBI,
ROTQMBII,
ROTMAH,
ROTMAHI,
ROTMA,
ROTMAI, // shiftrot_tag last
CEQB, // compare_tag first
CEQBI,
CEQH,
CEQHI,
CEQ,
CEQI,
CGTB,
CGTBI,
CGTH,
CGTHI,
CGT,
CGTI,
CLGTB,
CLGTBI,
CLGTH,
CLGTHI,
CLGT,
CLGTI, // compare_tag last
};
// Enable address-of operator for spu_decoder<>
@ -238,6 +234,24 @@ struct spu_itype
{
return value;
}
// Test for branch instruction
friend constexpr bool operator &(type value, branch_tag)
{
return value >= BR && value <= BIHNZ;
}
// Test for floating point instruction
friend constexpr bool operator &(type value, floating_tag)
{
return value >= FMA && value <= DFTSV;
}
// Test for 4-op instruction
friend constexpr bool operator &(type value, quadrop_tag)
{
return value >= MPYA && value <= FMS;
}
};
struct spu_iflag