rsx: Clear up confusion on depth writes.

According to the NV_fragment_program spec, its not feasible to have 16-bit depth wries
 NOTE: NV_fragement_program precedes NV_fragment_program2 which is very
 close to what RSX consumes. It is hardware from that era afterall
This commit is contained in:
kd-11 2018-02-25 12:46:27 +03:00
parent 053ab585f4
commit 4804efc17d
3 changed files with 6 additions and 16 deletions

View File

@ -306,12 +306,8 @@ void D3D12FragmentDecompiler::insertMainEnd(std::stringstream & OS)
{
if (m_parr.HasParam(PF_PARAM_NONE, "vec4", "r1"))
{
/**
* Note: Naruto Shippuden : Ultimate Ninja Storm 2 sets CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS in a shader
* but it writes depth in r1.z and not h2.z.
* Maybe there's a different flag for depth ?
*/
// OS << " Out.depth = " << ((m_ctrl & CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS) ? "r1.z;" : "h2.z;") << "\n";
//Depth writes are always from a fp32 register. See issues section on nvidia's NV_fragment_program spec
//https://www.khronos.org/registry/OpenGL/extensions/NV/NV_fragment_program.txt
OS << " Out.depth = r1.z;\n";
}
else

View File

@ -411,11 +411,8 @@ void GLFragmentDecompilerThread::insertMainEnd(std::stringstream & OS)
{
if (m_parr.HasParam(PF_PARAM_NONE, "vec4", "r1"))
{
/** Note: Naruto Shippuden : Ultimate Ninja Storm 2 sets CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS in a shader
* but it writes depth in r1.z and not h2.z.
* Maybe there's a different flag for depth ?
*/
//OS << ((m_ctrl & CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS) ? "\tgl_FragDepth = r1.z;\n" : "\tgl_FragDepth = h0.z;\n") << "\n";
//Depth writes are always from a fp32 register. See issues section on nvidia's NV_fragment_program spec
//https://www.khronos.org/registry/OpenGL/extensions/NV/NV_fragment_program.txt
OS << " gl_FragDepth = r1.z;\n";
}
else

View File

@ -406,11 +406,8 @@ void VKFragmentDecompilerThread::insertMainEnd(std::stringstream & OS)
{
if (m_parr.HasParam(PF_PARAM_NONE, "vec4", "r1"))
{
/** Note: Naruto Shippuden : Ultimate Ninja Storm 2 sets CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS in a shader
* but it writes depth in r1.z and not h2.z.
* Maybe there's a different flag for depth ?
*/
//OS << ((m_ctrl & CELL_GCM_SHADER_CONTROL_32_BITS_EXPORTS) ? "\tgl_FragDepth = r1.z;\n" : "\tgl_FragDepth = h0.z;\n") << "\n";
//Depth writes are always from a fp32 register. See issues section on nvidia's NV_fragment_program spec
//https://www.khronos.org/registry/OpenGL/extensions/NV/NV_fragment_program.txt
OS << " gl_FragDepth = r1.z;\n";
}
else