mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-02-06 09:39:55 +00:00
Memory.Write*/Read* replaced
This commit is contained in:
parent
1b499a6fd5
commit
43a61d0ab9
@ -21,8 +21,8 @@ public:
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virtual u8 DecodeMemory(const u64 address)
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{
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using namespace ARMv7_opcodes;
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const u16 code0 = Memory.PSV.Read16((u32)address);
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const u16 code1 = Memory.PSV.Read16((u32)address + 2);
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const u16 code0 = vm::psv::read16((u32)address);
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const u16 code1 = vm::psv::read16((u32)address + 2);
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switch(code0 >> 12) //15 - 12
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{
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@ -275,7 +275,7 @@ protected:
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if(regs_list & mask)
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{
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CPU.SP -= 4;
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Memory.PSV.Write32(CPU.SP, CPU.read_gpr(i));
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vm::psv::write32(CPU.SP, CPU.read_gpr(i));
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}
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}
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}
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@ -286,7 +286,7 @@ protected:
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{
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if(regs_list & mask)
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{
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CPU.write_gpr(i, Memory.PSV.Read32(CPU.SP));
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CPU.write_gpr(i, vm::psv::read32(CPU.SP));
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CPU.SP += 4;
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}
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}
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@ -4,7 +4,7 @@
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u8 PPCDecoder::DecodeMemory(const u64 address)
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{
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u32 instr = Memory.Read32(address);
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u32 instr = vm::read32(address);
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Decode(instr);
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return sizeof(u32);
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@ -37,9 +37,9 @@ void PPCThread::InitStack()
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/*
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m_stack_point += m_stack_size - 0x10;
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m_stack_point &= -0x10;
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Memory.Write64(m_stack_point, 0);
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vm::write64(m_stack_point, 0);
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m_stack_point -= 0x60;
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Memory.Write64(m_stack_point, m_stack_point + 0x60);
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vm::write64(m_stack_point, m_stack_point + 0x60);
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*/
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}
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@ -771,10 +771,10 @@ private:
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{
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float result = CPU.VPR[vb]._f[w] * nScale;
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if (result > S32_MAX)
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CPU.VPR[vd]._s32[w] = (int)S32_MAX;
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else if (result < S32_MIN)
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CPU.VPR[vd]._s32[w] = (int)S32_MIN;
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if (result > 0x7fffffff)
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CPU.VPR[vd]._s32[w] = (int)0x7fffffff;
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else if (result < -pow(2, 31))
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CPU.VPR[vd]._s32[w] = (int)0x80000000;
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else // C rounding = Round towards 0
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CPU.VPR[vd]._s32[w] = (int)result;
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}
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@ -788,8 +788,8 @@ private:
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// C rounding = Round towards 0
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s64 result = (s64)(CPU.VPR[vb]._f[w] * nScale);
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if (result > U32_MAX)
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CPU.VPR[vd]._u32[w] = (u32)U32_MAX;
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if (result > 0xffffffffu)
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CPU.VPR[vd]._u32[w] = 0xffffffffu;
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else if (result < 0)
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CPU.VPR[vd]._u32[w] = 0;
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else
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@ -1061,14 +1061,14 @@ private:
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result += CPU.VPR[vc]._s32[w];
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if (result > S32_MAX)
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if (result > 0x7fffffff)
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{
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saturated = S32_MAX;
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saturated = 0x7fffffff;
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CPU.VSCR.SAT = 1;
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}
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else if (result < S32_MIN)
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else if (result < (s64)(s32)0x80000000)
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{
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saturated = S32_MIN;
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saturated = 0x80000000;
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CPU.VSCR.SAT = 1;
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}
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else
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@ -1121,9 +1121,9 @@ private:
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result += CPU.VPR[vc]._u32[w];
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if (result > U32_MAX)
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if (result > 0xffffffffu)
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{
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saturated = U32_MAX;
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saturated = 0xffffffff;
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CPU.VSCR.SAT = 1;
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}
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else
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@ -2300,8 +2300,8 @@ private:
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{
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//const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
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//CPU.VPR[vd].Clear();
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//CPU.VPR[vd]._u8[addr & 0xf] = Memory.Read8(addr);
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CPU.VPR[vd]._u128 = Memory.Read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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//CPU.VPR[vd]._u8[addr & 0xf] = vm::read8(addr);
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CPU.VPR[vd]._u128 = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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}
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void SUBFC(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
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{
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@ -2371,11 +2371,11 @@ private:
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}
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void LDX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = Memory.Read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = vm::read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void LWZX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = Memory.Read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void SLW(u32 ra, u32 rs, u32 rb, bool rc)
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{
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@ -2449,8 +2449,8 @@ private:
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{
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//const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL;
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//CPU.VPR[vd].Clear();
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//(u16&)CPU.VPR[vd]._u8[addr & 0xf] = Memory.Read16(addr);
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CPU.VPR[vd]._u128 = Memory.Read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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//(u16&)CPU.VPR[vd]._u8[addr & 0xf] = vm::read16(addr);
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CPU.VPR[vd]._u128 = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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}
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void SUBF(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
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{
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@ -2461,7 +2461,7 @@ private:
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void LDUX(u32 rd, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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CPU.GPR[rd] = Memory.Read64(addr);
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CPU.GPR[rd] = vm::read64(addr);
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CPU.GPR[ra] = addr;
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}
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void DCBST(u32 ra, u32 rb)
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@ -2472,7 +2472,7 @@ private:
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void LWZUX(u32 rd, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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CPU.GPR[rd] = Memory.Read32(addr);
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CPU.GPR[rd] = vm::read32(addr);
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CPU.GPR[ra] = addr;
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}
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void CNTLZD(u32 ra, u32 rs, bool rc)
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@ -2499,8 +2499,8 @@ private:
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{
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//const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL;
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//CPU.VPR[vd].Clear();
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//(u32&)CPU.VPR[vd]._u8[addr & 0xf] = Memory.Read32(addr);
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CPU.VPR[vd]._u128 = Memory.Read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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//(u32&)CPU.VPR[vd]._u8[addr & 0xf] = vm::read32(addr);
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CPU.VPR[vd]._u128 = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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}
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void MULHD(u32 rd, u32 ra, u32 rb, bool rc)
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{
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@ -2527,11 +2527,11 @@ private:
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}
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void LBZX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = Memory.Read8(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = vm::read8(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void LVX(u32 vd, u32 ra, u32 rb)
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{
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CPU.VPR[vd]._u128 = Memory.Read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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CPU.VPR[vd]._u128 = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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}
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void NEG(u32 rd, u32 ra, u32 oe, bool rc)
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{
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@ -2544,7 +2544,7 @@ private:
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//if(ra == 0 || ra == rd) throw "Bad instruction [LBZUX]";
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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CPU.GPR[rd] = Memory.Read8(addr);
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CPU.GPR[rd] = vm::read8(addr);
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CPU.GPR[ra] = addr;
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}
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void NOR(u32 ra, u32 rs, u32 rb, bool rc)
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@ -2556,7 +2556,7 @@ private:
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{
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const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
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const u8 eb = addr & 0xf;
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Memory.Write8(addr, CPU.VPR[vs]._u8[15 - eb]);
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vm::write8(addr, CPU.VPR[vs]._u8[15 - eb]);
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}
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void SUBFE(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
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{
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@ -2627,7 +2627,7 @@ private:
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}
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void STDX(u32 rs, u32 ra, u32 rb)
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{
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Memory.Write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.GPR[rs]);
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vm::write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.GPR[rs]);
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}
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void STWCX_(u32 rs, u32 ra, u32 rb)
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{
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@ -2645,31 +2645,31 @@ private:
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}
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void STWX(u32 rs, u32 ra, u32 rb)
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{
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Memory.Write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32)CPU.GPR[rs]);
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vm::write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32)CPU.GPR[rs]);
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}
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void STVEHX(u32 vs, u32 ra, u32 rb)
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{
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const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~1ULL;
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const u8 eb = (addr & 0xf) >> 1;
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Memory.Write16(addr, CPU.VPR[vs]._u16[7 - eb]);
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vm::write16(addr, CPU.VPR[vs]._u16[7 - eb]);
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}
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void STDUX(u32 rs, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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Memory.Write64(addr, CPU.GPR[rs]);
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vm::write64(addr, CPU.GPR[rs]);
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CPU.GPR[ra] = addr;
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}
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void STWUX(u32 rs, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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Memory.Write32(addr, (u32)CPU.GPR[rs]);
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vm::write32(addr, (u32)CPU.GPR[rs]);
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CPU.GPR[ra] = addr;
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}
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void STVEWX(u32 vs, u32 ra, u32 rb)
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{
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const u64 addr = (ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~3ULL;
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const u8 eb = (addr & 0xf) >> 2;
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Memory.Write32(addr, CPU.VPR[vs]._u32[3 - eb]);
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vm::write32(addr, CPU.VPR[vs]._u32[3 - eb]);
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}
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void ADDZE(u32 rd, u32 ra, u32 oe, bool rc)
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{
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@ -2703,11 +2703,11 @@ private:
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}
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void STBX(u32 rs, u32 ra, u32 rb)
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{
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Memory.Write8((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u8)CPU.GPR[rs]);
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vm::write8((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u8)CPU.GPR[rs]);
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}
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void STVX(u32 vs, u32 ra, u32 rb)
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{
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Memory.Write128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL, CPU.VPR[vs]._u128);
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vm::write128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL, CPU.VPR[vs]._u128);
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}
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void SUBFME(u32 rd, u32 ra, u32 oe, bool rc)
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{
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@ -2746,7 +2746,7 @@ private:
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void STBUX(u32 rs, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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Memory.Write8(addr, (u8)CPU.GPR[rs]);
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vm::write8(addr, (u8)CPU.GPR[rs]);
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CPU.GPR[ra] = addr;
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}
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void ADD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
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@ -2764,7 +2764,7 @@ private:
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}
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void LHZX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = Memory.Read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = vm::read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void EQV(u32 ra, u32 rs, u32 rb, bool rc)
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{
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@ -2774,12 +2774,12 @@ private:
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void ECIWX(u32 rd, u32 ra, u32 rb)
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{
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//HACK!
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CPU.GPR[rd] = Memory.Read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void LHZUX(u32 rd, u32 ra, u32 rb)
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{
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const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
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CPU.GPR[rd] = Memory.Read16(addr);
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CPU.GPR[rd] = vm::read16(addr);
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CPU.GPR[ra] = addr;
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}
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void XOR(u32 ra, u32 rs, u32 rb, bool rc)
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@ -2793,7 +2793,7 @@ private:
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}
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void LWAX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = (s64)(s32)Memory.Read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = (s64)(s32)vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void DST(u32 ra, u32 rb, u32 strm, u32 t)
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{
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@ -2801,11 +2801,11 @@ private:
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}
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void LHAX(u32 rd, u32 ra, u32 rb)
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{
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CPU.GPR[rd] = (s64)(s16)Memory.Read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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CPU.GPR[rd] = (s64)(s16)vm::read16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
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}
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void LVXL(u32 vd, u32 ra, u32 rb)
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{
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CPU.VPR[vd]._u128 = Memory.Read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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CPU.VPR[vd]._u128 = vm::read128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL);
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}
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void MFTB(u32 rd, u32 spr)
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{
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@ -2821,7 +2821,7 @@ private:
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void LWAUX(u32 rd, u32 ra, u32 rb)
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{
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const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
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CPU.GPR[rd] = (s64)(s32)Memory.Read32(addr);
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CPU.GPR[rd] = (s64)(s32)vm::read32(addr);
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CPU.GPR[ra] = addr;
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}
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void DSTST(u32 ra, u32 rb, u32 strm, u32 t)
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@ -2831,12 +2831,12 @@ private:
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void LHAUX(u32 rd, u32 ra, u32 rb)
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{
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const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
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CPU.GPR[rd] = (s64)(s16)Memory.Read16(addr);
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CPU.GPR[rd] = (s64)(s16)vm::read16(addr);
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CPU.GPR[ra] = addr;
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}
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void STHX(u32 rs, u32 ra, u32 rb)
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{
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Memory.Write16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u16)CPU.GPR[rs]);
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vm::write16(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u16)CPU.GPR[rs]);
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}
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void ORC(u32 ra, u32 rs, u32 rb, bool rc)
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{
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@ -2846,12 +2846,12 @@ private:
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void ECOWX(u32 rs, u32 ra, u32 rb)
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{
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//HACK!
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Memory.Write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u32)CPU.GPR[rs]);
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vm::write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u32)CPU.GPR[rs]);
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}
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void STHUX(u32 rs, u32 ra, u32 rb)
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{
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const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
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||||
Memory.Write16(addr, (u16)CPU.GPR[rs]);
|
||||
vm::write16(addr, (u16)CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void OR(u32 ra, u32 rs, u32 rb, bool rc)
|
||||
@ -2906,7 +2906,7 @@ private:
|
||||
}
|
||||
void STVXL(u32 vs, u32 ra, u32 rb)
|
||||
{
|
||||
Memory.Write128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL, CPU.VPR[vs]._u128);
|
||||
vm::write128((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]) & ~0xfULL, CPU.VPR[vs]._u128);
|
||||
}
|
||||
void DIVD(u32 rd, u32 ra, u32 rb, u32 oe, bool rc)
|
||||
{
|
||||
@ -2948,7 +2948,7 @@ private:
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[vd].Clear();
|
||||
for (u32 i = 0; i < 16 - eb; ++i) CPU.VPR[vd]._u8[15 - i] = Memory.Read8(addr + i);
|
||||
for (u32 i = 0; i < 16 - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i);
|
||||
}
|
||||
void LDBRX(u32 rd, u32 ra, u32 rb)
|
||||
{
|
||||
@ -2964,7 +2964,7 @@ private:
|
||||
}
|
||||
void LFSX(u32 frd, u32 ra, u32 rb)
|
||||
{
|
||||
(u32&)CPU.FPR[frd] = Memory.Read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
|
||||
(u32&)CPU.FPR[frd] = vm::read32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
|
||||
CPU.FPR[frd] = (float&)CPU.FPR[frd];
|
||||
}
|
||||
void SRW(u32 ra, u32 rs, u32 rb, bool rc)
|
||||
@ -2991,7 +2991,7 @@ private:
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[vd].Clear();
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = Memory.Read8(addr + i - 16);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i - 16);
|
||||
}
|
||||
void LSWI(u32 rd, u32 ra, u32 nb)
|
||||
{
|
||||
@ -3003,7 +3003,7 @@ private:
|
||||
{
|
||||
if (N > 3)
|
||||
{
|
||||
CPU.GPR[reg] = Memory.Read32(EA);
|
||||
CPU.GPR[reg] = vm::read32(EA);
|
||||
EA += 4;
|
||||
N -= 4;
|
||||
}
|
||||
@ -3013,7 +3013,7 @@ private:
|
||||
while (N > 0)
|
||||
{
|
||||
N = N - 1;
|
||||
buf |= Memory.Read8(EA) <<(N*8) ;
|
||||
buf |= vm::read8(EA) <<(N*8) ;
|
||||
EA = EA + 1;
|
||||
}
|
||||
CPU.GPR[reg] = buf;
|
||||
@ -3024,7 +3024,7 @@ private:
|
||||
void LFSUX(u32 frd, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
|
||||
(u64&)CPU.FPR[frd] = Memory.Read32(addr);
|
||||
(u64&)CPU.FPR[frd] = vm::read32(addr);
|
||||
CPU.FPR[frd] = (float&)CPU.FPR[frd];
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
@ -3034,12 +3034,12 @@ private:
|
||||
}
|
||||
void LFDX(u32 frd, u32 ra, u32 rb)
|
||||
{
|
||||
(u64&)CPU.FPR[frd] = Memory.Read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
|
||||
(u64&)CPU.FPR[frd] = vm::read64(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]);
|
||||
}
|
||||
void LFDUX(u32 frd, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
|
||||
(u64&)CPU.FPR[frd] = Memory.Read64(addr);
|
||||
(u64&)CPU.FPR[frd] = vm::read64(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STVLX(u32 vs, u32 ra, u32 rb)
|
||||
@ -3047,7 +3047,7 @@ private:
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 0; i < 16 - eb; ++i) Memory.Write8(addr + i, CPU.VPR[vs]._u8[15 - i]);
|
||||
for (u32 i = 0; i < 16 - eb; ++i) vm::write8(addr + i, CPU.VPR[vs]._u8[15 - i]);
|
||||
}
|
||||
void STSWX(u32 rs, u32 ra, u32 rb)
|
||||
{
|
||||
@ -3059,19 +3059,19 @@ private:
|
||||
}
|
||||
void STFSX(u32 frs, u32 ra, u32 rb)
|
||||
{
|
||||
Memory.Write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.FPR[frs].To32());
|
||||
vm::write32((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), CPU.FPR[frs].To32());
|
||||
}
|
||||
void STVRX(u32 vs, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 16 - eb; i < 16; ++i) Memory.Write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]);
|
||||
}
|
||||
void STFSUX(u32 frs, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
|
||||
Memory.Write32(addr, CPU.FPR[frs].To32());
|
||||
vm::write32(addr, CPU.FPR[frs].To32());
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STSWI(u32 rd, u32 ra, u32 nb)
|
||||
@ -3084,7 +3084,7 @@ private:
|
||||
{
|
||||
if (N > 3)
|
||||
{
|
||||
Memory.Write32(EA, (u32)CPU.GPR[reg]);
|
||||
vm::write32(EA, (u32)CPU.GPR[reg]);
|
||||
EA += 4;
|
||||
N -= 4;
|
||||
}
|
||||
@ -3094,7 +3094,7 @@ private:
|
||||
while (N > 0)
|
||||
{
|
||||
N = N - 1;
|
||||
Memory.Write8(EA, (0xFF000000 & buf) >> 24);
|
||||
vm::write8(EA, (0xFF000000 & buf) >> 24);
|
||||
buf <<= 8;
|
||||
EA = EA + 1;
|
||||
}
|
||||
@ -3104,12 +3104,12 @@ private:
|
||||
}
|
||||
void STFDX(u32 frs, u32 ra, u32 rb)
|
||||
{
|
||||
Memory.Write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u64&)CPU.FPR[frs]);
|
||||
vm::write64((ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb]), (u64&)CPU.FPR[frs]);
|
||||
}
|
||||
void STFDUX(u32 frs, u32 ra, u32 rb)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + CPU.GPR[rb];
|
||||
Memory.Write64(addr, (u64&)CPU.FPR[frs]);
|
||||
vm::write64(addr, (u64&)CPU.FPR[frs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LVLXL(u32 vd, u32 ra, u32 rb)
|
||||
@ -3118,7 +3118,7 @@ private:
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[vd].Clear();
|
||||
for (u32 i = 0; i < 16 - eb; ++i) CPU.VPR[vd]._u8[15 - i] = Memory.Read8(addr + i);
|
||||
for (u32 i = 0; i < 16 - eb; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i);
|
||||
}
|
||||
void LHBRX(u32 rd, u32 ra, u32 rb)
|
||||
{
|
||||
@ -3164,7 +3164,7 @@ private:
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
CPU.VPR[vd].Clear();
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = Memory.Read8(addr + i - 16);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) CPU.VPR[vd]._u8[15 - i] = vm::read8(addr + i - 16);
|
||||
}
|
||||
void DSS(u32 strm, u32 a)
|
||||
{
|
||||
@ -3199,7 +3199,7 @@ private:
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 0; i < 16 - eb; ++i) Memory.Write8(addr + i, CPU.VPR[vs]._u8[15 - i]);
|
||||
for (u32 i = 0; i < 16 - eb; ++i) vm::write8(addr + i, CPU.VPR[vs]._u8[15 - i]);
|
||||
}
|
||||
void STHBRX(u32 rs, u32 ra, u32 rb)
|
||||
{
|
||||
@ -3215,7 +3215,7 @@ private:
|
||||
const u64 addr = ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb];
|
||||
const u8 eb = addr & 0xf;
|
||||
|
||||
for (u32 i = 16 - eb; i < 16; ++i) Memory.Write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]);
|
||||
for (u32 i = 16 - eb; i < 16; ++i) vm::write8(addr + i - 16, CPU.VPR[vs]._u8[15 - i]);
|
||||
}
|
||||
void EXTSB(u32 ra, u32 rs, bool rc)
|
||||
{
|
||||
@ -3224,7 +3224,7 @@ private:
|
||||
}
|
||||
void STFIWX(u32 frs, u32 ra, u32 rb)
|
||||
{
|
||||
Memory.Write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32&)CPU.FPR[frs]);
|
||||
vm::write32(ra ? CPU.GPR[ra] + CPU.GPR[rb] : CPU.GPR[rb], (u32&)CPU.FPR[frs]);
|
||||
}
|
||||
void EXTSW(u32 ra, u32 rs, bool rc)
|
||||
{
|
||||
@ -3245,72 +3245,72 @@ private:
|
||||
}
|
||||
void LWZ(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
CPU.GPR[rd] = Memory.Read32(ra ? CPU.GPR[ra] + d : d);
|
||||
CPU.GPR[rd] = vm::read32(ra ? CPU.GPR[ra] + d : d);
|
||||
}
|
||||
void LWZU(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
CPU.GPR[rd] = Memory.Read32(addr);
|
||||
CPU.GPR[rd] = vm::read32(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LBZ(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
CPU.GPR[rd] = Memory.Read8(ra ? CPU.GPR[ra] + d : d);
|
||||
CPU.GPR[rd] = vm::read8(ra ? CPU.GPR[ra] + d : d);
|
||||
}
|
||||
void LBZU(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
CPU.GPR[rd] = Memory.Read8(addr);
|
||||
CPU.GPR[rd] = vm::read8(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STW(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write32(ra ? CPU.GPR[ra] + d : d, (u32)CPU.GPR[rs]);
|
||||
vm::write32(ra ? CPU.GPR[ra] + d : d, (u32)CPU.GPR[rs]);
|
||||
}
|
||||
void STWU(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
Memory.Write32(addr, (u32)CPU.GPR[rs]);
|
||||
vm::write32(addr, (u32)CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STB(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write8(ra ? CPU.GPR[ra] + d : d, (u8)CPU.GPR[rs]);
|
||||
vm::write8(ra ? CPU.GPR[ra] + d : d, (u8)CPU.GPR[rs]);
|
||||
}
|
||||
void STBU(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
Memory.Write8(addr, (u8)CPU.GPR[rs]);
|
||||
vm::write8(addr, (u8)CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LHZ(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
CPU.GPR[rd] = Memory.Read16(ra ? CPU.GPR[ra] + d : d);
|
||||
CPU.GPR[rd] = vm::read16(ra ? CPU.GPR[ra] + d : d);
|
||||
}
|
||||
void LHZU(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
CPU.GPR[rd] = Memory.Read16(addr);
|
||||
CPU.GPR[rd] = vm::read16(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LHA(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
CPU.GPR[rd] = (s64)(s16)Memory.Read16(ra ? CPU.GPR[ra] + d : d);
|
||||
CPU.GPR[rd] = (s64)(s16)vm::read16(ra ? CPU.GPR[ra] + d : d);
|
||||
}
|
||||
void LHAU(u32 rd, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
CPU.GPR[rd] = (s64)(s16)Memory.Read16(addr);
|
||||
CPU.GPR[rd] = (s64)(s16)vm::read16(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STH(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write16(ra ? CPU.GPR[ra] + d : d, (u16)CPU.GPR[rs]);
|
||||
vm::write16(ra ? CPU.GPR[ra] + d : d, (u16)CPU.GPR[rs]);
|
||||
}
|
||||
void STHU(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
Memory.Write16(addr, (u16)CPU.GPR[rs]);
|
||||
vm::write16(addr, (u16)CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LMW(u32 rd, u32 ra, s32 d)
|
||||
@ -3318,7 +3318,7 @@ private:
|
||||
u64 addr = ra ? CPU.GPR[ra] + d : d;
|
||||
for(u32 i=rd; i<32; ++i, addr += 4)
|
||||
{
|
||||
CPU.GPR[i] = Memory.Read32(addr);
|
||||
CPU.GPR[i] = vm::read32(addr);
|
||||
}
|
||||
}
|
||||
void STMW(u32 rs, u32 ra, s32 d)
|
||||
@ -3326,65 +3326,65 @@ private:
|
||||
u64 addr = ra ? CPU.GPR[ra] + d : d;
|
||||
for(u32 i=rs; i<32; ++i, addr += 4)
|
||||
{
|
||||
Memory.Write32(addr, (u32)CPU.GPR[i]);
|
||||
vm::write32(addr, (u32)CPU.GPR[i]);
|
||||
}
|
||||
}
|
||||
void LFS(u32 frd, u32 ra, s32 d)
|
||||
{
|
||||
const u32 v = Memory.Read32(ra ? CPU.GPR[ra] + d : d);
|
||||
const u32 v = vm::read32(ra ? CPU.GPR[ra] + d : d);
|
||||
CPU.FPR[frd] = (float&)v;
|
||||
}
|
||||
void LFSU(u32 frd, u32 ra, s32 ds)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
const u32 v = Memory.Read32(addr);
|
||||
const u32 v = vm::read32(addr);
|
||||
CPU.FPR[frd] = (float&)v;
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LFD(u32 frd, u32 ra, s32 d)
|
||||
{
|
||||
(u64&)CPU.FPR[frd] = Memory.Read64(ra ? CPU.GPR[ra] + d : d);
|
||||
(u64&)CPU.FPR[frd] = vm::read64(ra ? CPU.GPR[ra] + d : d);
|
||||
}
|
||||
void LFDU(u32 frd, u32 ra, s32 ds)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
(u64&)CPU.FPR[frd] = Memory.Read64(addr);
|
||||
(u64&)CPU.FPR[frd] = vm::read64(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STFS(u32 frs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write32(ra ? CPU.GPR[ra] + d : d, CPU.FPR[frs].To32());
|
||||
vm::write32(ra ? CPU.GPR[ra] + d : d, CPU.FPR[frs].To32());
|
||||
}
|
||||
void STFSU(u32 frs, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
Memory.Write32(addr, CPU.FPR[frs].To32());
|
||||
vm::write32(addr, CPU.FPR[frs].To32());
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void STFD(u32 frs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write64(ra ? CPU.GPR[ra] + d : d, (u64&)CPU.FPR[frs]);
|
||||
vm::write64(ra ? CPU.GPR[ra] + d : d, (u64&)CPU.FPR[frs]);
|
||||
}
|
||||
void STFDU(u32 frs, u32 ra, s32 d)
|
||||
{
|
||||
const u64 addr = CPU.GPR[ra] + d;
|
||||
Memory.Write64(addr, (u64&)CPU.FPR[frs]);
|
||||
vm::write64(addr, (u64&)CPU.FPR[frs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LD(u32 rd, u32 ra, s32 ds)
|
||||
{
|
||||
CPU.GPR[rd] = Memory.Read64(ra ? CPU.GPR[ra] + ds : ds);
|
||||
CPU.GPR[rd] = vm::read64(ra ? CPU.GPR[ra] + ds : ds);
|
||||
}
|
||||
void LDU(u32 rd, u32 ra, s32 ds)
|
||||
{
|
||||
//if(ra == 0 || rt == ra) return;
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
CPU.GPR[rd] = Memory.Read64(addr);
|
||||
CPU.GPR[rd] = vm::read64(addr);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void LWA(u32 rd, u32 ra, s32 ds)
|
||||
{
|
||||
CPU.GPR[rd] = (s64)(s32)Memory.Read32(ra ? CPU.GPR[ra] + ds : ds);
|
||||
CPU.GPR[rd] = (s64)(s32)vm::read32(ra ? CPU.GPR[ra] + ds : ds);
|
||||
}
|
||||
void FDIVS(u32 frd, u32 fra, u32 frb, bool rc)
|
||||
{
|
||||
@ -3487,13 +3487,13 @@ private:
|
||||
}
|
||||
void STD(u32 rs, u32 ra, s32 d)
|
||||
{
|
||||
Memory.Write64(ra ? CPU.GPR[ra] + d : d, CPU.GPR[rs]);
|
||||
vm::write64(ra ? CPU.GPR[ra] + d : d, CPU.GPR[rs]);
|
||||
}
|
||||
void STDU(u32 rs, u32 ra, s32 ds)
|
||||
{
|
||||
//if(ra == 0 || rs == ra) return;
|
||||
const u64 addr = CPU.GPR[ra] + ds;
|
||||
Memory.Write64(addr, CPU.GPR[rs]);
|
||||
vm::write64(addr, CPU.GPR[rs]);
|
||||
CPU.GPR[ra] = addr;
|
||||
}
|
||||
void MTFSB1(u32 crbd, bool rc)
|
||||
|
@ -61,8 +61,8 @@ void PPUThread::AddArgv(const std::string& arg)
|
||||
|
||||
void PPUThread::InitRegs()
|
||||
{
|
||||
const u32 pc = Memory.Read32(entry);
|
||||
const u32 rtoc = Memory.Read32(entry + 4);
|
||||
const u32 pc = vm::read32(entry);
|
||||
const u32 rtoc = vm::read32(entry + 4);
|
||||
|
||||
//ConLog.Write("entry = 0x%x", entry);
|
||||
//ConLog.Write("rtoc = 0x%x", rtoc);
|
||||
@ -219,7 +219,7 @@ int FPRdouble::Cmp(PPCdouble a, PPCdouble b)
|
||||
|
||||
u64 PPUThread::GetStackArg(s32 i)
|
||||
{
|
||||
return Memory.Read64(GPR[1] + 0x70 + 0x8 * (i - 9));
|
||||
return vm::read64(GPR[1] + 0x70 + 0x8 * (i - 9));
|
||||
}
|
||||
|
||||
u64 PPUThread::FastCall(u64 addr, u64 rtoc, u64 arg1, u64 arg2, u64 arg3, u64 arg4, u64 arg5, u64 arg6, u64 arg7, u64 arg8)
|
||||
|
@ -470,9 +470,7 @@ struct FPRdouble
|
||||
|
||||
union VPR_reg
|
||||
{
|
||||
//__m128i _m128i;
|
||||
u128 _u128;
|
||||
s128 _s128;
|
||||
u64 _u64[2];
|
||||
s64 _s64[2];
|
||||
u32 _u32[4];
|
||||
|
@ -102,7 +102,7 @@ void SPURecompilerCore::Compile(u16 pos)
|
||||
|
||||
while (true)
|
||||
{
|
||||
const u32 opcode = Memory.Read32(CPU.dmac.ls_offset + pos * 4);
|
||||
const u32 opcode = vm::read32(CPU.dmac.ls_offset + pos * 4);
|
||||
m_enc->do_finalize = false;
|
||||
if (opcode)
|
||||
{
|
||||
|
@ -198,7 +198,7 @@ void SPUThread::ProcessCmd(u32 cmd, u32 tag, u32 lsa, u64 ea, u32 size)
|
||||
}
|
||||
else if ((cmd & MFC_PUT_CMD) && size == 4 && (addr == SYS_SPU_THREAD_SNR1 || addr == SYS_SPU_THREAD_SNR2))
|
||||
{
|
||||
spu->WriteSNR(SYS_SPU_THREAD_SNR2 == addr, Memory.Read32(dmac.ls_offset + lsa));
|
||||
spu->WriteSNR(SYS_SPU_THREAD_SNR2 == addr, vm::read32(dmac.ls_offset + lsa));
|
||||
return;
|
||||
}
|
||||
else
|
||||
@ -221,13 +221,13 @@ void SPUThread::ProcessCmd(u32 cmd, u32 tag, u32 lsa, u64 ea, u32 size)
|
||||
{
|
||||
case MFC_PUT_CMD:
|
||||
{
|
||||
Memory.Write32(ea, ReadLS32(lsa));
|
||||
vm::write32(ea, ReadLS32(lsa));
|
||||
return;
|
||||
}
|
||||
|
||||
case MFC_GET_CMD:
|
||||
{
|
||||
WriteLS32(lsa, Memory.Read32(ea));
|
||||
WriteLS32(lsa, vm::read32(ea));
|
||||
return;
|
||||
}
|
||||
|
||||
@ -450,7 +450,7 @@ void SPUThread::EnqMfcCmd(MFCReg& MFCArgs)
|
||||
{
|
||||
dis_asm.dump_pc = i;
|
||||
dis_asm.offset = vm::get_ptr<u8>(dmac.ls_offset);
|
||||
const u32 opcode = Memory.Read32(i + dmac.ls_offset);
|
||||
const u32 opcode = vm::read32(i + dmac.ls_offset);
|
||||
(*SPU_instr::rrr_list)(&dis_asm, opcode);
|
||||
if (i >= 0 && i < 0x40000)
|
||||
{
|
||||
|
@ -196,7 +196,6 @@ union SPU_GPR_hdr
|
||||
u32 _u32[4];
|
||||
float _f[4];
|
||||
u128 _u128;
|
||||
s128 _i128;
|
||||
__m128 _m128;
|
||||
__m128i _m128i;
|
||||
u64 _u64[2];
|
||||
@ -522,17 +521,17 @@ public:
|
||||
|
||||
void StopAndSignal(u32 code);
|
||||
|
||||
u8 ReadLS8 (const u32 lsa) const { return Memory.Read8 (lsa + m_offset); }
|
||||
u16 ReadLS16 (const u32 lsa) const { return Memory.Read16 (lsa + m_offset); }
|
||||
u32 ReadLS32 (const u32 lsa) const { return Memory.Read32 (lsa + m_offset); }
|
||||
u64 ReadLS64 (const u32 lsa) const { return Memory.Read64 (lsa + m_offset); }
|
||||
u128 ReadLS128(const u32 lsa) const { return Memory.Read128(lsa + m_offset); }
|
||||
u8 ReadLS8 (const u32 lsa) const { return vm::read8 (lsa + m_offset); }
|
||||
u16 ReadLS16 (const u32 lsa) const { return vm::read16 (lsa + m_offset); }
|
||||
u32 ReadLS32 (const u32 lsa) const { return vm::read32 (lsa + m_offset); }
|
||||
u64 ReadLS64 (const u32 lsa) const { return vm::read64 (lsa + m_offset); }
|
||||
u128 ReadLS128(const u32 lsa) const { return vm::read128(lsa + m_offset); }
|
||||
|
||||
void WriteLS8 (const u32 lsa, const u8& data) const { Memory.Write8 (lsa + m_offset, data); }
|
||||
void WriteLS16 (const u32 lsa, const u16& data) const { Memory.Write16 (lsa + m_offset, data); }
|
||||
void WriteLS32 (const u32 lsa, const u32& data) const { Memory.Write32 (lsa + m_offset, data); }
|
||||
void WriteLS64 (const u32 lsa, const u64& data) const { Memory.Write64 (lsa + m_offset, data); }
|
||||
void WriteLS128(const u32 lsa, const u128& data) const { Memory.Write128(lsa + m_offset, data); }
|
||||
void WriteLS8 (const u32 lsa, const u8& data) const { vm::write8 (lsa + m_offset, data); }
|
||||
void WriteLS16 (const u32 lsa, const u16& data) const { vm::write16 (lsa + m_offset, data); }
|
||||
void WriteLS32 (const u32 lsa, const u32& data) const { vm::write32 (lsa + m_offset, data); }
|
||||
void WriteLS64 (const u32 lsa, const u64& data) const { vm::write64 (lsa + m_offset, data); }
|
||||
void WriteLS128(const u32 lsa, const u128& data) const { vm::write128(lsa + m_offset, data); }
|
||||
|
||||
public:
|
||||
SPUThread(CPUThreadType type = CPU_THREAD_SPU);
|
||||
|
@ -653,7 +653,7 @@ bool VirtualMemoryBlock::Read32(const u64 addr, u32* value)
|
||||
u64 realAddr;
|
||||
if (!getRealAddr(addr, realAddr))
|
||||
return false;
|
||||
*value = Memory.Read32(realAddr);
|
||||
*value = vm::read32(realAddr);
|
||||
return true;
|
||||
}
|
||||
|
||||
@ -662,7 +662,7 @@ bool VirtualMemoryBlock::Write32(const u64 addr, const u32 value)
|
||||
u64 realAddr;
|
||||
if(!getRealAddr(addr, realAddr))
|
||||
return false;
|
||||
Memory.Write32(realAddr, value);
|
||||
vm::write32(realAddr, value);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -42,28 +42,13 @@ public:
|
||||
MemoryBlock* RawSPUMem[(0x100000000 - RAW_SPU_BASE_ADDR) / RAW_SPU_OFFSET];
|
||||
VirtualMemoryBlock RSXIOMem;
|
||||
|
||||
struct Wrapper32LE
|
||||
{
|
||||
void Write8(const u32 addr, const u8 data) { *(u8*)((u8*)m_base_addr + addr) = data; }
|
||||
void Write16(const u32 addr, const u16 data) { *(u16*)((u8*)m_base_addr + addr) = data; }
|
||||
void Write32(const u32 addr, const u32 data) { *(u32*)((u8*)m_base_addr + addr) = data; }
|
||||
void Write64(const u32 addr, const u64 data) { *(u64*)((u8*)m_base_addr + addr) = data; }
|
||||
void Write128(const u32 addr, const u128 data) { *(u128*)((u8*)m_base_addr + addr) = data; }
|
||||
|
||||
u8 Read8(const u32 addr) { return *(u8*)((u8*)m_base_addr + addr); }
|
||||
u16 Read16(const u32 addr) { return *(u16*)((u8*)m_base_addr + addr); }
|
||||
u32 Read32(const u32 addr) { return *(u32*)((u8*)m_base_addr + addr); }
|
||||
u64 Read64(const u32 addr) { return *(u64*)((u8*)m_base_addr + addr); }
|
||||
u128 Read128(const u32 addr) { return *(u128*)((u8*)m_base_addr + addr); }
|
||||
};
|
||||
|
||||
struct : Wrapper32LE
|
||||
struct
|
||||
{
|
||||
DynamicMemoryBlock RAM;
|
||||
DynamicMemoryBlock Userspace;
|
||||
} PSV;
|
||||
|
||||
struct : Wrapper32LE
|
||||
struct
|
||||
{
|
||||
DynamicMemoryBlock Scratchpad;
|
||||
DynamicMemoryBlock VRAM;
|
||||
@ -116,29 +101,22 @@ public:
|
||||
|
||||
void Init(MemoryType type);
|
||||
|
||||
template<typename T> bool IsGoodAddr(const T addr)
|
||||
bool IsGoodAddr(const u32 addr)
|
||||
{
|
||||
if ((u32)addr != addr || !m_pages[addr / 4096]) // TODO: define page parameters
|
||||
{
|
||||
return false;
|
||||
}
|
||||
else
|
||||
{
|
||||
return true;
|
||||
}
|
||||
return m_pages[addr / 4096] != 0; // TODO: define page parameters
|
||||
}
|
||||
|
||||
template<typename T> bool IsGoodAddr(const T addr, const u32 size)
|
||||
bool IsGoodAddr(const u32 addr, const u32 size)
|
||||
{
|
||||
if ((u32)addr != addr || (u64)addr + (u64)size > 0x100000000ull)
|
||||
if (!size || addr + size - 1 < addr)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
else
|
||||
{
|
||||
for (u32 i = (u32)addr / 4096; i <= ((u32)addr + size - 1) / 4096; i++)
|
||||
for (u32 i = addr / 4096; i <= (addr + size - 1) / 4096; i++)
|
||||
{
|
||||
if (!m_pages[i]) return false; // TODO: define page parameters
|
||||
if (m_pages[i] != 0) return false; // TODO: define page parameters
|
||||
}
|
||||
return true;
|
||||
}
|
||||
@ -146,155 +124,10 @@ public:
|
||||
|
||||
void Close();
|
||||
|
||||
//MemoryBase
|
||||
template<typename T> void Write8(T addr, const u8 data)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
*(u8*)((u8*)GetBaseAddr() + addr) = data;
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
*(u8*)GetBaseAddr() = data;
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> void Write16(T addr, const u16 data)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
*(u16*)((u8*)GetBaseAddr() + addr) = re16(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
*(u16*)GetBaseAddr() = data;
|
||||
}
|
||||
}
|
||||
|
||||
__noinline void WriteMMIO32(u32 addr, const u32 data);
|
||||
|
||||
template<typename T> void Write32(T addr, const u32 data)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
if (addr < RAW_SPU_BASE_ADDR || (addr % RAW_SPU_OFFSET) < RAW_SPU_PROB_OFFSET)
|
||||
{
|
||||
*(u32*)((u8*)GetBaseAddr() + addr) = re32(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
WriteMMIO32((u32)addr, data);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
*(u32*)GetBaseAddr() = data;
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> void Write64(T addr, const u64 data)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
*(u64*)((u8*)GetBaseAddr() + addr) = re64(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
*(u64*)GetBaseAddr() = data;
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> void Write128(T addr, const u128 data)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
*(u128*)((u8*)GetBaseAddr() + addr) = re128(data);
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
*(u128*)GetBaseAddr() = data;
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> u8 Read8(T addr)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
return *(u8*)((u8*)GetBaseAddr() + addr);
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
return *(u8*)GetBaseAddr();
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> u16 Read16(T addr)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
return re16(*(u16*)((u8*)GetBaseAddr() + addr));
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
return *(u16*)GetBaseAddr();
|
||||
}
|
||||
}
|
||||
|
||||
__noinline u32 ReadMMIO32(u32 addr);
|
||||
|
||||
template<typename T> u32 Read32(T addr)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
if (addr < RAW_SPU_BASE_ADDR || (addr % RAW_SPU_OFFSET) < RAW_SPU_PROB_OFFSET)
|
||||
{
|
||||
return re32(*(u32*)((u8*)GetBaseAddr() + addr));
|
||||
}
|
||||
else
|
||||
{
|
||||
return ReadMMIO32((u32)addr);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
return *(u32*)GetBaseAddr();
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> u64 Read64(T addr)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
return re64(*(u64*)((u8*)GetBaseAddr() + addr));
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
return *(u64*)GetBaseAddr();
|
||||
}
|
||||
}
|
||||
|
||||
template<typename T> u128 Read128(T addr)
|
||||
{
|
||||
if ((u32)addr == addr)
|
||||
{
|
||||
return re128(*(u128*)((u8*)GetBaseAddr() + addr));
|
||||
}
|
||||
else
|
||||
{
|
||||
InvalidAddress(__FUNCTION__, addr);
|
||||
return *(u128*)GetBaseAddr();
|
||||
}
|
||||
}
|
||||
|
||||
u32 GetUserMemTotalSize()
|
||||
{
|
||||
return UserMemory->GetSize();
|
||||
|
@ -262,7 +262,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
|
||||
if(m_set_semaphore_offset)
|
||||
{
|
||||
m_set_semaphore_offset = false;
|
||||
Memory.Write32(Memory.RSXCMDMem.GetStartAddr() + m_semaphore_offset, ARGS(0));
|
||||
vm::write32(Memory.RSXCMDMem.GetStartAddr() + m_semaphore_offset, ARGS(0));
|
||||
}
|
||||
}
|
||||
break;
|
||||
@ -275,7 +275,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
|
||||
u32 value = ARGS(0);
|
||||
value = (value & 0xff00ff00) | ((value & 0xff) << 16) | ((value >> 16) & 0xff);
|
||||
|
||||
Memory.Write32(Memory.RSXCMDMem.GetStartAddr() + m_semaphore_offset, value);
|
||||
vm::write32(Memory.RSXCMDMem.GetStartAddr() + m_semaphore_offset, value);
|
||||
}
|
||||
}
|
||||
break;
|
||||
@ -883,7 +883,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
|
||||
{
|
||||
int pos = (int)m_indexed_array.m_data.size();
|
||||
m_indexed_array.m_data.resize(m_indexed_array.m_data.size() + 4);
|
||||
index = Memory.Read32(m_indexed_array.m_addr + i * 4);
|
||||
index = vm::read32(m_indexed_array.m_addr + i * 4);
|
||||
*(u32*)&m_indexed_array.m_data[pos] = index;
|
||||
//LOG_WARNING(RSX, "index 4: %d", *(u32*)&m_indexed_array.m_data[pos]);
|
||||
}
|
||||
@ -893,7 +893,7 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
|
||||
{
|
||||
int pos = (int)m_indexed_array.m_data.size();
|
||||
m_indexed_array.m_data.resize(m_indexed_array.m_data.size() + 2);
|
||||
index = Memory.Read16(m_indexed_array.m_addr + i * 2);
|
||||
index = vm::read16(m_indexed_array.m_addr + i * 2);
|
||||
//LOG_WARNING(RSX, "index 2: %d", index);
|
||||
*(u16*)&m_indexed_array.m_data[pos] = index;
|
||||
}
|
||||
@ -1648,9 +1648,9 @@ void RSXThread::DoCmd(const u32 fcmd, const u32 cmd, const u32 args_addr, const
|
||||
u64 timestamp = get_system_time() * 1000;
|
||||
|
||||
// TODO: Reports can be written to the main memory or the local memory (controlled by NV4097_SET_CONTEXT_DMA_REPORT)
|
||||
Memory.Write64(m_local_mem_addr + offset + 0x0, timestamp);
|
||||
Memory.Write32(m_local_mem_addr + offset + 0x8, value);
|
||||
Memory.Write32(m_local_mem_addr + offset + 0xc, 0);
|
||||
vm::write64(m_local_mem_addr + offset + 0x0, timestamp);
|
||||
vm::write32(m_local_mem_addr + offset + 0x8, value);
|
||||
vm::write32(m_local_mem_addr + offset + 0xc, 0);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -191,12 +191,12 @@ void Module::PushNewFuncSub(SFunc* func)
|
||||
|
||||
void fix_import(Module* module, u32 func, u32 addr)
|
||||
{
|
||||
Memory.Write32(addr + 0x0, 0x3d600000 | (func >> 16)); /* lis r11, (func_id >> 16) */
|
||||
Memory.Write32(addr + 0x4, 0x616b0000 | (func & 0xffff)); /* ori r11, (func_id & 0xffff) */
|
||||
Memory.Write32(addr + 0x8, 0x60000000); /* nop */
|
||||
vm::write32(addr + 0x0, 0x3d600000 | (func >> 16)); /* lis r11, (func_id >> 16) */
|
||||
vm::write32(addr + 0x4, 0x616b0000 | (func & 0xffff)); /* ori r11, (func_id & 0xffff) */
|
||||
vm::write32(addr + 0x8, 0x60000000); /* nop */
|
||||
// leave rtoc saving at 0xC
|
||||
Memory.Write64(addr + 0x10, 0x440000024e800020ull); /* sc + blr */
|
||||
Memory.Write64(addr + 0x18, 0x6000000060000000ull); /* nop + nop */
|
||||
vm::write64(addr + 0x10, 0x440000024e800020ull); /* sc + blr */
|
||||
vm::write64(addr + 0x18, 0x6000000060000000ull); /* nop + nop */
|
||||
|
||||
module->Load(func);
|
||||
}
|
||||
@ -211,36 +211,36 @@ void fix_relocs(Module* module, u32 lib, u32 start, u32 end, u32 seg2)
|
||||
|
||||
for (u32 i = lib + start; i < lib + end; i += 24)
|
||||
{
|
||||
u64 addr = Memory.Read64(i);
|
||||
const u64 flag = Memory.Read64(i + 8);
|
||||
u64 addr = vm::read64(i);
|
||||
const u64 flag = vm::read64(i + 8);
|
||||
|
||||
if (flag == 0x10100000001ull)
|
||||
{
|
||||
addr = addr + seg2 + lib;
|
||||
u32 value = Memory.Read32(addr);
|
||||
assert(value == Memory.Read64(i + 16) + seg2);
|
||||
Memory.Write32(addr, value + lib);
|
||||
u32 value = vm::read32(addr);
|
||||
assert(value == vm::read64(i + 16) + seg2);
|
||||
vm::write32(addr, value + lib);
|
||||
}
|
||||
else if (flag == 0x100000001ull)
|
||||
{
|
||||
addr = addr + seg2 + lib;
|
||||
u32 value = Memory.Read32(addr);
|
||||
assert(value == Memory.Read64(i + 16));
|
||||
Memory.Write32(addr, value + lib);
|
||||
u32 value = vm::read32(addr);
|
||||
assert(value == vm::read64(i + 16));
|
||||
vm::write32(addr, value + lib);
|
||||
}
|
||||
else if (flag == 0x10000000001ull)
|
||||
{
|
||||
addr = addr + lib;
|
||||
u32 value = Memory.Read32(addr);
|
||||
assert(value == Memory.Read64(i + 16) + seg2);
|
||||
Memory.Write32(addr, value + lib);
|
||||
u32 value = vm::read32(addr);
|
||||
assert(value == vm::read64(i + 16) + seg2);
|
||||
vm::write32(addr, value + lib);
|
||||
}
|
||||
else if (flag == 1)
|
||||
{
|
||||
addr = addr + lib;
|
||||
u32 value = Memory.Read32(addr);
|
||||
assert(value == Memory.Read64(i + 16));
|
||||
Memory.Write32(addr, value + lib);
|
||||
u32 value = vm::read32(addr);
|
||||
assert(value == vm::read64(i + 16));
|
||||
vm::write32(addr, value + lib);
|
||||
}
|
||||
else if (flag == 0x10000000004ull || flag == 0x10000000006ull)
|
||||
{
|
||||
|
@ -555,7 +555,7 @@ int cellFontExtend(u32 a1, u32 a2, u32 a3)
|
||||
{
|
||||
//Something happens
|
||||
}
|
||||
if (Memory.Read32(a3) == 0)
|
||||
if (vm::read32(a3) == 0)
|
||||
{
|
||||
//Something happens
|
||||
}
|
||||
|
@ -21,7 +21,7 @@ int cellFontInitLibraryFreeTypeWithRevision(u64 revisionFlags, vm::ptr<CellFontL
|
||||
//if (s_fontInternalInstance->m_bInitialized)
|
||||
//return CELL_FONT_ERROR_UNINITIALIZED;
|
||||
|
||||
Memory.Write32(lib_addr_addr, (u32)Memory.Alloc(sizeof(CellFontLibrary), 1));
|
||||
vm::write32(lib_addr_addr, (u32)Memory.Alloc(sizeof(CellFontLibrary), 1));
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
@ -115,7 +115,7 @@ u64 cellGcmGetTimeStamp(u32 index)
|
||||
cellGcmSys->Error("cellGcmGetTimeStamp: Wrong local index (%d)", index);
|
||||
return 0;
|
||||
}
|
||||
return Memory.Read64(Memory.RSXFBMem.GetStartAddr() + index * 0x10);
|
||||
return vm::read64(Memory.RSXFBMem.GetStartAddr() + index * 0x10);
|
||||
}
|
||||
|
||||
int cellGcmGetCurrentField()
|
||||
@ -133,7 +133,7 @@ u32 cellGcmGetNotifyDataAddress(u32 index)
|
||||
cellGcmGetOffsetTable(table);
|
||||
|
||||
// If entry not in use, return NULL
|
||||
u16 entry = Memory.Read16(table->eaAddress + 241 * sizeof(u16));
|
||||
u16 entry = vm::read16(table->eaAddress + 241 * sizeof(u16));
|
||||
if (entry == 0xFFFF) {
|
||||
return 0;
|
||||
}
|
||||
@ -194,7 +194,7 @@ u64 cellGcmGetTimeStampLocation(u32 index, u32 location)
|
||||
cellGcmSys->Error("cellGcmGetTimeStampLocation: Wrong local index (%d)", index);
|
||||
return 0;
|
||||
}
|
||||
return Memory.Read64(Memory.RSXFBMem.GetStartAddr() + index * 0x10);
|
||||
return vm::read64(Memory.RSXFBMem.GetStartAddr() + index * 0x10);
|
||||
}
|
||||
|
||||
if (location == CELL_GCM_LOCATION_MAIN) {
|
||||
@ -203,7 +203,7 @@ u64 cellGcmGetTimeStampLocation(u32 index, u32 location)
|
||||
return 0;
|
||||
}
|
||||
// TODO: It seems m_report_main_addr is not initialized
|
||||
return Memory.Read64(Emu.GetGSManager().GetRender().m_report_main_addr + index * 0x10);
|
||||
return vm::read64(Emu.GetGSManager().GetRender().m_report_main_addr + index * 0x10);
|
||||
}
|
||||
|
||||
cellGcmSys->Error("cellGcmGetTimeStampLocation: Wrong location (%d)", location);
|
||||
@ -378,7 +378,7 @@ s32 _cellGcmInitBody(vm::ptr<CellGcmContextData> context, u32 cmdSize, u32 ioSiz
|
||||
gcm_info.control_addr = gcm_info.context_addr + 0x40;
|
||||
|
||||
vm::get_ref<CellGcmContextData>(gcm_info.context_addr) = current_context;
|
||||
Memory.Write32(context.addr(), gcm_info.context_addr);
|
||||
vm::write32(context.addr(), gcm_info.context_addr);
|
||||
|
||||
auto& ctrl = vm::get_ref<CellGcmControl>(gcm_info.control_addr);
|
||||
ctrl.put = 0;
|
||||
@ -524,8 +524,8 @@ s32 cellGcmSetPrepareFlip(vm::ptr<CellGcmContextData> ctxt, u32 id)
|
||||
}
|
||||
|
||||
current = ctxt->current;
|
||||
Memory.Write32(current, 0x3fead | (1 << 18));
|
||||
Memory.Write32(current + 4, id);
|
||||
vm::write32(current, 0x3fead | (1 << 18));
|
||||
vm::write32(current + 4, id);
|
||||
ctxt->current += 8;
|
||||
|
||||
if(ctxt.addr() == gcm_info.context_addr)
|
||||
@ -700,7 +700,7 @@ int cellGcmGetCurrentDisplayBufferId(u32 id_addr)
|
||||
{
|
||||
cellGcmSys->Warning("cellGcmGetCurrentDisplayBufferId(id_addr=0x%x)", id_addr);
|
||||
|
||||
Memory.Write32(id_addr, Emu.GetGSManager().GetRender().m_gcm_current_buffer);
|
||||
vm::write32(id_addr, Emu.GetGSManager().GetRender().m_gcm_current_buffer);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -818,7 +818,7 @@ s32 cellGcmAddressToOffset(u64 address, vm::ptr<be_t<u32>> offset)
|
||||
// Address in main memory else check
|
||||
else
|
||||
{
|
||||
u16 upper12Bits = Memory.Read16(offsetTable.ioAddress + sizeof(u16)*(address >> 20));
|
||||
u16 upper12Bits = vm::read16(offsetTable.ioAddress + sizeof(u16)*(address >> 20));
|
||||
|
||||
// If the address is mapped in IO
|
||||
if (upper12Bits != 0xFFFF) {
|
||||
@ -857,7 +857,7 @@ s32 cellGcmIoOffsetToAddress(u32 ioOffset, u64 address)
|
||||
if (!Memory.RSXIOMem.getRealAddr(Memory.RSXIOMem.GetStartAddr() + ioOffset, realAddr))
|
||||
return CELL_GCM_ERROR_FAILURE;
|
||||
|
||||
Memory.Write64(address, realAddr);
|
||||
vm::write64(address, realAddr);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -874,8 +874,8 @@ s32 cellGcmMapEaIoAddress(u32 ea, u32 io, u32 size)
|
||||
// Fill the offset table
|
||||
for (u32 i = 0; i<(size >> 20); i++)
|
||||
{
|
||||
Memory.Write16(offsetTable.ioAddress + ((ea >> 20) + i)*sizeof(u16), (io >> 20) + i);
|
||||
Memory.Write16(offsetTable.eaAddress + ((io >> 20) + i)*sizeof(u16), (ea >> 20) + i);
|
||||
vm::write16(offsetTable.ioAddress + ((ea >> 20) + i)*sizeof(u16), (io >> 20) + i);
|
||||
vm::write16(offsetTable.eaAddress + ((io >> 20) + i)*sizeof(u16), (ea >> 20) + i);
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -902,8 +902,8 @@ s32 cellGcmMapLocalMemory(u64 address, u64 size)
|
||||
local_size = 0xf900000; //TODO
|
||||
local_addr = (u32)Memory.RSXFBMem.GetStartAddr();
|
||||
Memory.RSXFBMem.AllocAlign(local_size);
|
||||
Memory.Write32(address, local_addr);
|
||||
Memory.Write32(size, local_size);
|
||||
vm::write32(address, local_addr);
|
||||
vm::write32(size, local_size);
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -931,8 +931,8 @@ s32 cellGcmMapMainMemory(u32 ea, u32 size, vm::ptr<be_t<u32>> offset)
|
||||
//fill the offset table
|
||||
for (u32 i = 0; i<(size >> 20); i++)
|
||||
{
|
||||
Memory.Write16(offsetTable.ioAddress + ((ea >> 20) + i) * sizeof(u16), (u16)(io >> 20) + i);
|
||||
Memory.Write16(offsetTable.eaAddress + ((io >> 20) + i) * sizeof(u16), (u16)(ea >> 20) + i);
|
||||
vm::write16(offsetTable.ioAddress + ((ea >> 20) + i) * sizeof(u16), (u16)(io >> 20) + i);
|
||||
vm::write16(offsetTable.eaAddress + ((io >> 20) + i) * sizeof(u16), (u16)(ea >> 20) + i);
|
||||
}
|
||||
|
||||
*offset = io;
|
||||
@ -977,12 +977,12 @@ s32 cellGcmUnmapEaIoAddress(u64 ea)
|
||||
{
|
||||
u64 io;
|
||||
ea = ea >> 20;
|
||||
io = Memory.Read16(offsetTable.ioAddress + (ea*sizeof(u16)));
|
||||
io = vm::read16(offsetTable.ioAddress + (ea*sizeof(u16)));
|
||||
|
||||
for (u32 i = 0; i<size; i++)
|
||||
{
|
||||
Memory.Write16(offsetTable.ioAddress + ((ea + i)*sizeof(u16)), 0xFFFF);
|
||||
Memory.Write16(offsetTable.eaAddress + ((io + i)*sizeof(u16)), 0xFFFF);
|
||||
vm::write16(offsetTable.ioAddress + ((ea + i)*sizeof(u16)), 0xFFFF);
|
||||
vm::write16(offsetTable.eaAddress + ((io + i)*sizeof(u16)), 0xFFFF);
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -1003,12 +1003,12 @@ s32 cellGcmUnmapIoAddress(u64 io)
|
||||
{
|
||||
u64 ea;
|
||||
io = io >> 20;
|
||||
ea = Memory.Read16(offsetTable.eaAddress + (io*sizeof(u16)));
|
||||
ea = vm::read16(offsetTable.eaAddress + (io*sizeof(u16)));
|
||||
|
||||
for (u32 i = 0; i<size; i++)
|
||||
{
|
||||
Memory.Write16(offsetTable.ioAddress + ((ea + i)*sizeof(u16)), 0xFFFF);
|
||||
Memory.Write16(offsetTable.eaAddress + ((io + i)*sizeof(u16)), 0xFFFF);
|
||||
vm::write16(offsetTable.ioAddress + ((ea + i)*sizeof(u16)), 0xFFFF);
|
||||
vm::write16(offsetTable.eaAddress + ((io + i)*sizeof(u16)), 0xFFFF);
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -1087,7 +1087,7 @@ int cellGcmSetCursorImageOffset(u32 offset)
|
||||
void cellGcmSetDefaultCommandBuffer()
|
||||
{
|
||||
cellGcmSys->Warning("cellGcmSetDefaultCommandBuffer()");
|
||||
Memory.Write32(Emu.GetGSManager().GetRender().m_ctxt_addr, gcm_info.context_addr);
|
||||
vm::write32(Emu.GetGSManager().GetRender().m_ctxt_addr, gcm_info.context_addr);
|
||||
}
|
||||
|
||||
//------------------------------------------------------------------------
|
||||
@ -1107,7 +1107,7 @@ int cellGcmSetFlipCommandWithWaitLabel(vm::ptr<CellGcmContextData> ctx, u32 id,
|
||||
ctx.addr(), id, label_index, label_value);
|
||||
|
||||
int res = cellGcmSetPrepareFlip(ctx, id);
|
||||
Memory.Write32(Memory.RSXCMDMem.GetStartAddr() + 0x10 * label_index, label_value);
|
||||
vm::write32(Memory.RSXCMDMem.GetStartAddr() + 0x10 * label_index, label_value);
|
||||
return res < 0 ? CELL_GCM_ERROR_FAILURE : CELL_OK;
|
||||
}
|
||||
|
||||
|
@ -1025,7 +1025,7 @@ void syncLFQueueDump(vm::ptr<CellSyncLFQueue> queue)
|
||||
cellSync->Notice("CellSyncLFQueue dump: addr = 0x%x", queue.addr());
|
||||
for (u32 i = 0; i < sizeof(CellSyncLFQueue) / 16; i++)
|
||||
{
|
||||
cellSync->Notice("*** 0x%.16llx 0x%.16llx", Memory.Read64(queue.addr() + i * 16), Memory.Read64(queue.addr() + i * 16 + 8));
|
||||
cellSync->Notice("*** 0x%.16llx 0x%.16llx", vm::read64(queue.addr() + i * 16), vm::read64(queue.addr() + i * 16 + 8));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -547,7 +547,7 @@ int cellSurMixerSurBusAddData(u32 busNo, u32 offset, u32 addr, u32 samples)
|
||||
for (u32 i = 0; i < samples; i++)
|
||||
{
|
||||
// reverse byte order and mix
|
||||
u32 v = Memory.Read32(addr + i * sizeof(float));
|
||||
u32 v = vm::read32(addr + i * sizeof(float));
|
||||
mixdata[i*8+busNo] += (float&)v;
|
||||
}
|
||||
|
||||
|
@ -40,7 +40,7 @@ int npDrmIsAvailable(u32 k_licensee_addr, vm::ptr<const char> drm_path)
|
||||
{
|
||||
for (int i = 0; i < 0x10; i++)
|
||||
{
|
||||
k_licensee[i] = Memory.Read8(k_licensee_addr + i);
|
||||
k_licensee[i] = vm::read8(k_licensee_addr + i);
|
||||
k_licensee_str += fmt::Format("%02x", k_licensee[i]);
|
||||
}
|
||||
}
|
||||
|
@ -144,7 +144,7 @@ int sys_raw_spu_image_load(int id, vm::ptr<sys_spu_image> img)
|
||||
|
||||
// TODO: use segment info
|
||||
memcpy(vm::get_ptr<void>(RAW_SPU_BASE_ADDR + RAW_SPU_OFFSET * id), vm::get_ptr<void>(img->segs_addr), 256 * 1024);
|
||||
Memory.Write32(RAW_SPU_BASE_ADDR + RAW_SPU_OFFSET * id + RAW_SPU_PROB_OFFSET + SPU_NPC_offs, (u32)img->entry_point);
|
||||
vm::write32(RAW_SPU_BASE_ADDR + RAW_SPU_OFFSET * id + RAW_SPU_PROB_OFFSET + SPU_NPC_offs, (u32)img->entry_point);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -260,7 +260,7 @@ s64 _sys_spu_printf_attach_group(u32 arg)
|
||||
return CELL_ESTAT;
|
||||
}
|
||||
|
||||
return GetCurrentPPUThread().FastCall(Memory.Read32(spu_printf_agcb), Memory.Read32(spu_printf_agcb + 4), arg);
|
||||
return GetCurrentPPUThread().FastCall(vm::read32(spu_printf_agcb), vm::read32(spu_printf_agcb + 4), arg);
|
||||
}
|
||||
|
||||
s64 _sys_spu_printf_detach_group(u32 arg)
|
||||
@ -272,7 +272,7 @@ s64 _sys_spu_printf_detach_group(u32 arg)
|
||||
return CELL_ESTAT;
|
||||
}
|
||||
|
||||
return GetCurrentPPUThread().FastCall(Memory.Read32(spu_printf_dgcb), Memory.Read32(spu_printf_dgcb + 4), arg);
|
||||
return GetCurrentPPUThread().FastCall(vm::read32(spu_printf_dgcb), vm::read32(spu_printf_dgcb + 4), arg);
|
||||
}
|
||||
|
||||
s64 _sys_spu_printf_attach_thread(u32 arg)
|
||||
@ -284,7 +284,7 @@ s64 _sys_spu_printf_attach_thread(u32 arg)
|
||||
return CELL_ESTAT;
|
||||
}
|
||||
|
||||
return GetCurrentPPUThread().FastCall(Memory.Read32(spu_printf_atcb), Memory.Read32(spu_printf_atcb + 4), arg);
|
||||
return GetCurrentPPUThread().FastCall(vm::read32(spu_printf_atcb), vm::read32(spu_printf_atcb + 4), arg);
|
||||
}
|
||||
|
||||
s64 _sys_spu_printf_detach_thread(u32 arg)
|
||||
@ -296,7 +296,7 @@ s64 _sys_spu_printf_detach_thread(u32 arg)
|
||||
return CELL_ESTAT;
|
||||
}
|
||||
|
||||
return GetCurrentPPUThread().FastCall(Memory.Read32(spu_printf_dtcb), Memory.Read32(spu_printf_dtcb + 4), arg);
|
||||
return GetCurrentPPUThread().FastCall(vm::read32(spu_printf_dtcb), vm::read32(spu_printf_dtcb + 4), arg);
|
||||
}
|
||||
|
||||
s32 _sys_printf(vm::ptr<const char> fmt)
|
||||
|
@ -33,7 +33,7 @@ s32 sys_memory_allocate(u32 size, u32 flags, u32 alloc_addr_addr)
|
||||
|
||||
// Write back the start address of the allocated area.
|
||||
sys_memory.Log("Memory allocated! [addr: 0x%x, size: 0x%x]", addr, size);
|
||||
Memory.Write32(alloc_addr_addr, addr);
|
||||
vm::write32(alloc_addr_addr, addr);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -70,7 +70,7 @@ s32 sys_memory_allocate_from_container(u32 size, u32 cid, u32 flags, u32 alloc_a
|
||||
|
||||
// Write back the start address of the allocated area.
|
||||
sys_memory.Log("Memory allocated! [addr: 0x%x, size: 0x%x]", ct->addr, ct->size);
|
||||
Memory.Write32(alloc_addr_addr, ct->addr);
|
||||
vm::write32(alloc_addr_addr, ct->addr);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
@ -37,7 +37,7 @@ s32 sys_mmapper_allocate_address(u32 size, u64 flags, u32 alignment, u32 alloc_a
|
||||
}
|
||||
|
||||
// Write back the start address of the allocated area.
|
||||
Memory.Write32(alloc_addr, addr);
|
||||
vm::write32(alloc_addr, addr);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -195,7 +195,7 @@ s32 sys_mmapper_search_and_map(u32 start_addr, u32 mem_id, u64 flags, u32 alloc_
|
||||
return CELL_ENOMEM;
|
||||
|
||||
// Write back the start address of the allocated area.
|
||||
Memory.Write32(alloc_addr, addr);
|
||||
vm::write32(alloc_addr, addr);
|
||||
|
||||
// Keep track of mapped addresses.
|
||||
mmapper_info_map[mem_id] = addr;
|
||||
@ -209,7 +209,7 @@ s32 sys_mmapper_unmap_memory(u32 start_addr, u32 mem_id_addr)
|
||||
|
||||
// Write back the mem ID of the unmapped area.
|
||||
u32 mem_id = mmapper_info_map.find(start_addr)->first;
|
||||
Memory.Write32(mem_id_addr, mem_id);
|
||||
vm::write32(mem_id_addr, mem_id);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
@ -86,7 +86,7 @@ s32 sys_ppu_thread_detach(u64 thread_id)
|
||||
void sys_ppu_thread_get_join_state(u32 isjoinable_addr)
|
||||
{
|
||||
sys_ppu_thread.Warning("sys_ppu_thread_get_join_state(isjoinable_addr=0x%x)", isjoinable_addr);
|
||||
Memory.Write32(isjoinable_addr, GetCurrentPPUThread().IsJoinable());
|
||||
vm::write32(isjoinable_addr, GetCurrentPPUThread().IsJoinable());
|
||||
}
|
||||
|
||||
s32 sys_ppu_thread_set_priority(u64 thread_id, s32 prio)
|
||||
@ -108,7 +108,7 @@ s32 sys_ppu_thread_get_priority(u64 thread_id, u32 prio_addr)
|
||||
CPUThread* thr = Emu.GetCPU().GetThread(thread_id);
|
||||
if(!thr) return CELL_ESRCH;
|
||||
|
||||
Memory.Write32(prio_addr, (s32)thr->GetPrio());
|
||||
vm::write32(prio_addr, (s32)thr->GetPrio());
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -119,8 +119,8 @@ s32 sys_ppu_thread_get_stack_information(u32 info_addr)
|
||||
|
||||
declCPU();
|
||||
|
||||
Memory.Write32(info_addr, (u32)CPU.GetStackAddr());
|
||||
Memory.Write32(info_addr + 4, CPU.GetStackSize());
|
||||
vm::write32(info_addr, (u32)CPU.GetStackAddr());
|
||||
vm::write32(info_addr + 4, CPU.GetStackSize());
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
@ -204,7 +204,7 @@ void sys_ppu_thread_once(vm::ptr<std::atomic<be_t<u32>>> once_ctrl, u32 entry)
|
||||
be_t<u32> old = be_t<u32>::MakeFromBE(se32(SYS_PPU_THREAD_ONCE_INIT));
|
||||
if (once_ctrl->compare_exchange_weak(old, be_t<u32>::MakeFromBE(se32(SYS_PPU_THREAD_DONE_INIT))))
|
||||
{
|
||||
GetCurrentPPUThread().FastCall2(Memory.Read32(entry), Memory.Read32(entry + 4));
|
||||
GetCurrentPPUThread().FastCall2(vm::read32(entry), vm::read32(entry + 4));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -279,7 +279,7 @@ s32 sys_process_wait_for_child2(u64 unk1, u64 unk2, u64 unk3, u64 unk4, u64 unk5
|
||||
s32 sys_process_get_status(u64 unk)
|
||||
{
|
||||
sys_process.Todo("sys_process_get_status(unk=0x%llx)", unk);
|
||||
//Memory.Write32(CPU.GPR[4], GetPPUThreadStatus(CPU));
|
||||
//vm::write32(CPU.GPR[4], GetPPUThreadStatus(CPU));
|
||||
return CELL_OK;
|
||||
}
|
||||
|
||||
|
@ -77,8 +77,8 @@ s32 sys_time_get_current_time(u32 sec_addr, u32 nsec_addr)
|
||||
|
||||
u64 time = get_time();
|
||||
|
||||
Memory.Write64(sec_addr, time / timebase_frequency);
|
||||
Memory.Write64(nsec_addr, (time % timebase_frequency) * 1000000000 / (s64)(timebase_frequency));
|
||||
vm::write64(sec_addr, time / timebase_frequency);
|
||||
vm::write64(nsec_addr, (time % timebase_frequency) * 1000000000 / (s64)(timebase_frequency));
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
@ -58,7 +58,7 @@ s32 sys_vm_memory_map(u32 vsize, u32 psize, u32 cid, u64 flag, u64 policy, u32 a
|
||||
}
|
||||
|
||||
// Write a pointer for the allocated memory.
|
||||
Memory.Write32(addr, current_ct->addr);
|
||||
vm::write32(addr, current_ct->addr);
|
||||
|
||||
return CELL_OK;
|
||||
}
|
||||
|
@ -345,7 +345,7 @@ void Emulator::Load()
|
||||
//thread.AddArgv("-emu");
|
||||
|
||||
m_rsx_callback = (u32)Memory.MainMem.AllocAlign(4 * 4) + 4;
|
||||
Memory.Write32(m_rsx_callback - 4, m_rsx_callback);
|
||||
vm::write32(m_rsx_callback - 4, m_rsx_callback);
|
||||
|
||||
auto callback_data = vm::ptr<be_t<u32>>::make(m_rsx_callback);
|
||||
callback_data[0] = ADDI(11, 0, 0x3ff);
|
||||
@ -366,7 +366,7 @@ void Emulator::Load()
|
||||
ppu_thr_stop_data[0] = SC(4);
|
||||
ppu_thr_stop_data[1] = BCLR(0x10 | 0x04, 0, 0, 0);
|
||||
|
||||
Memory.Write64(Memory.PRXMem.AllocAlign(0x10000), 0xDEADBEEFABADCAFE);
|
||||
vm::write64(Memory.PRXMem.AllocAlign(0x10000), 0xDEADBEEFABADCAFE);
|
||||
}
|
||||
break;
|
||||
|
||||
|
@ -170,7 +170,7 @@ public:
|
||||
wxString::Format("%d thread: %d of %d", (int)id + 1, vsize, max_value));
|
||||
|
||||
disasm->dump_pc = sh_addr + off;
|
||||
decoder->Decode(Memory.Read32(disasm->dump_pc));
|
||||
decoder->Decode(vm::read32(disasm->dump_pc));
|
||||
|
||||
arr[id][sh].Add(fmt::FromUTF8(disasm->last_opcode));
|
||||
|
||||
@ -395,7 +395,7 @@ void DisAsmFrame::Dump(wxCommandEvent& WXUNUSED(event))
|
||||
for(u64 addr=sh_addr; addr<sh_addr+sh_size; addr++, vsize++)
|
||||
{
|
||||
disasm->dump_pc = addr;
|
||||
decoder->Decode(Memory.Read32(disasm->dump_pc));
|
||||
decoder->Decode(vm::read32(disasm->dump_pc));
|
||||
fd.Write("\t");
|
||||
fd.Write(fmt::FromUTF8(disasm->last_opcode));
|
||||
}
|
||||
|
@ -73,7 +73,7 @@ InstructionEditorDialog::InstructionEditorDialog(wxPanel *parent, u64 _pc, CPUTh
|
||||
s_panel_margin_x->AddSpacer(12);
|
||||
|
||||
this->Connect(wxEVT_COMMAND_TEXT_UPDATED, wxCommandEventHandler(InstructionEditorDialog::updatePreview));
|
||||
t2_instr->SetValue(wxString::Format("%08x", Memory.Read32(CPU->GetOffset() + pc)));
|
||||
t2_instr->SetValue(wxString::Format("%08x", vm::read32(CPU->GetOffset() + pc)));
|
||||
|
||||
this->SetSizerAndFit(s_panel_margin_x);
|
||||
|
||||
@ -83,7 +83,7 @@ InstructionEditorDialog::InstructionEditorDialog(wxPanel *parent, u64 _pc, CPUTh
|
||||
if (!t2_instr->GetValue().ToULong(&opcode, 16))
|
||||
wxMessageBox("This instruction could not be parsed.\nNo changes were made.","Error");
|
||||
else
|
||||
Memory.Write32(CPU->GetOffset() + pc, (u32)opcode);
|
||||
vm::write32(CPU->GetOffset() + pc, (u32)opcode);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -202,7 +202,7 @@ void MemoryViewerPanel::ShowMemory()
|
||||
|
||||
if (Memory.IsGoodAddr(addr))
|
||||
{
|
||||
const u8 rmem = Memory.Read8(addr);
|
||||
const u8 rmem = vm::read8(addr);
|
||||
t_mem_hex_str += wxString::Format("%02x ", rmem);
|
||||
const bool isPrintable = rmem >= 32 && rmem <= 126;
|
||||
t_mem_ascii_str += isPrintable ? std::string(1, rmem) : ".";
|
||||
|
@ -268,7 +268,7 @@ void RSXDebugger::OnScrollMemory(wxMouseEvent& event)
|
||||
u32 offset;
|
||||
if(Memory.IsGoodAddr(m_addr))
|
||||
{
|
||||
u32 cmd = Memory.Read32(m_addr);
|
||||
u32 cmd = vm::read32(m_addr);
|
||||
u32 count = (cmd & (CELL_GCM_METHOD_FLAG_JUMP | CELL_GCM_METHOD_FLAG_CALL))
|
||||
|| cmd == CELL_GCM_METHOD_FLAG_RETURN ? 0 : (cmd >> 18) & 0x7ff;
|
||||
|
||||
@ -382,7 +382,7 @@ void RSXDebugger::GetMemory()
|
||||
|
||||
if (ioAddr && Memory.IsGoodAddr(addr))
|
||||
{
|
||||
u32 cmd = Memory.Read32(addr);
|
||||
u32 cmd = vm::read32(addr);
|
||||
u32 count = (cmd >> 18) & 0x7ff;
|
||||
m_list_commands->SetItem(i, 1, wxString::Format("%08x", cmd));
|
||||
m_list_commands->SetItem(i, 3, wxString::Format("%d", count));
|
||||
|
@ -437,7 +437,7 @@ bool ELF64Loader::LoadPhdrData(u64 offset)
|
||||
LOG_NOTICE(LOADER, "*** unk1: 0x%x", stub.s_unk1.ToLE());
|
||||
LOG_NOTICE(LOADER, "*** imports: %d", stub.s_imports.ToLE());
|
||||
LOG_NOTICE(LOADER, "*** module name: %s [0x%x]", module_name.c_str(), stub.s_modulename.ToLE());
|
||||
LOG_NOTICE(LOADER, "*** nid: 0x%016llx [0x%x]", Memory.Read64(stub.s_nid), stub.s_nid.ToLE());
|
||||
LOG_NOTICE(LOADER, "*** nid: 0x%016llx [0x%x]", vm::read64(stub.s_nid), stub.s_nid.ToLE());
|
||||
LOG_NOTICE(LOADER, "*** text: 0x%x", stub.s_text.ToLE());
|
||||
#endif
|
||||
static const u32 section = 4 * 3;
|
||||
@ -446,8 +446,8 @@ bool ELF64Loader::LoadPhdrData(u64 offset)
|
||||
|
||||
for(u32 i=0; i<stub.s_imports; ++i)
|
||||
{
|
||||
const u32 nid = Memory.Read32(stub.s_nid + i*4);
|
||||
const u32 text = Memory.Read32(stub.s_text + i*4);
|
||||
const u32 nid = vm::read32(stub.s_nid + i*4);
|
||||
const u32 text = vm::read32(stub.s_text + i*4);
|
||||
|
||||
if (module && !module->Load(nid))
|
||||
{
|
||||
@ -462,7 +462,7 @@ bool ELF64Loader::LoadPhdrData(u64 offset)
|
||||
LOG_NOTICE(LOADER, "*** nid: 0x%x (0x%x)", nid, stub.s_nid + i*4);
|
||||
LOG_NOTICE(LOADER, "*** text: 0x%x (0x%x)", text, stub.s_text + i*4);
|
||||
#endif
|
||||
Memory.Write32(stub.s_text + i*4, (u32)tbl + i*8);
|
||||
vm::write32(stub.s_text + i*4, (u32)tbl + i*8);
|
||||
|
||||
auto out_tbl = vm::ptr<be_t<u32>>::make((u32)tbl + i * 8);
|
||||
out_tbl[0] = (u32)dst + i*section;
|
||||
|
@ -209,6 +209,7 @@
|
||||
<ClInclude Include="Gui\GameViewer.h" />
|
||||
<ClInclude Include="Gui\GLGSFrame.h" />
|
||||
<ClInclude Include="Gui\GSFrame.h" />
|
||||
<ClInclude Include="Gui\InstructionEditor.h" />
|
||||
<ClInclude Include="Gui\InterpreterDisAsm.h" />
|
||||
<ClInclude Include="Gui\KernelExplorer.h" />
|
||||
<ClInclude Include="Gui\MainFrame.h" />
|
||||
|
@ -182,5 +182,8 @@
|
||||
<ClInclude Include="Gui\MsgDialog.h">
|
||||
<Filter>Gui</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="Gui\InstructionEditor.h">
|
||||
<Filter>Gui</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
</Project>
|
@ -42,16 +42,11 @@ typedef uint16_t u16;
|
||||
typedef uint32_t u32;
|
||||
typedef uint64_t u64;
|
||||
|
||||
static const u32 U32_MAX = 0xffffffffu;
|
||||
|
||||
typedef int8_t s8;
|
||||
typedef int16_t s16;
|
||||
typedef int32_t s32;
|
||||
typedef int64_t s64;
|
||||
|
||||
static const s32 S32_MIN = (s32)0x80000000u;
|
||||
static const s32 S32_MAX = 0x7fffffff;
|
||||
|
||||
union u128
|
||||
{
|
||||
struct
|
||||
@ -154,95 +149,6 @@ union u128
|
||||
}
|
||||
};
|
||||
|
||||
union s128
|
||||
{
|
||||
struct
|
||||
{
|
||||
s64 hi;
|
||||
s64 lo;
|
||||
};
|
||||
|
||||
u64 _i64[2];
|
||||
u32 _i32[4];
|
||||
u16 _i16[8];
|
||||
u8 _i8[16];
|
||||
|
||||
operator s64() const { return _i64[0]; }
|
||||
operator s32() const { return _i32[0]; }
|
||||
operator s16() const { return _i16[0]; }
|
||||
operator s8() const { return _i8[0]; }
|
||||
|
||||
operator bool() const { return _i64[0] != 0 || _i64[1] != 0; }
|
||||
|
||||
static s128 From64(s64 src)
|
||||
{
|
||||
s128 ret = { src, 0 };
|
||||
return ret;
|
||||
}
|
||||
|
||||
static s128 From32(s32 src)
|
||||
{
|
||||
s128 ret;
|
||||
ret._i32[0] = src;
|
||||
ret._i32[1] = 0;
|
||||
ret.hi = 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
bool operator == (const s128& right) const
|
||||
{
|
||||
return (lo == right.lo) && (hi == right.hi);
|
||||
}
|
||||
|
||||
bool operator != (const s128& right) const
|
||||
{
|
||||
return (lo != right.lo) || (hi != right.hi);
|
||||
}
|
||||
};
|
||||
|
||||
//TODO: SSE style
|
||||
/*
|
||||
struct u128
|
||||
{
|
||||
__m128 m_val;
|
||||
|
||||
u128 GetValue128()
|
||||
{
|
||||
u128 ret;
|
||||
_mm_store_ps( (float*)&ret, m_val );
|
||||
return ret;
|
||||
}
|
||||
|
||||
u64 GetValue64()
|
||||
{
|
||||
u64 ret;
|
||||
_mm_store_ps( (float*)&ret, m_val );
|
||||
return ret;
|
||||
}
|
||||
|
||||
u32 GetValue32()
|
||||
{
|
||||
u32 ret;
|
||||
_mm_store_ps( (float*)&ret, m_val );
|
||||
return ret;
|
||||
}
|
||||
|
||||
u16 GetValue16()
|
||||
{
|
||||
u16 ret;
|
||||
_mm_store_ps( (float*)&ret, m_val );
|
||||
return ret;
|
||||
}
|
||||
|
||||
u8 GetValue8()
|
||||
{
|
||||
u8 ret;
|
||||
_mm_store_ps( (float*)&ret, m_val );
|
||||
return ret;
|
||||
}
|
||||
};
|
||||
*/
|
||||
|
||||
#define AlignAddr(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
|
||||
|
||||
#include "Utilities/StrFmt.h"
|
||||
|
Loading…
x
Reference in New Issue
Block a user