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Fix dependency injection on terminators
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839a25e129
commit
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@ -334,26 +334,27 @@ namespace aarch64
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std::vector<std::string> constraints;
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std::vector<llvm::Value*> args;
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// We now load the callee args.
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// We now load the callee args in reverse order to avoid self-clobbering of dependencies.
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// FIXME: This is often times redundant and wastes cycles, we'll clean this up in a MachineFunction pass later.
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int args_base_reg = instruction_info.callee_is_GHC ? aarch64::x19 : aarch64::x0; // GHC args are always x19..x25
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for (unsigned i = 0; i < operand_count; ++i)
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for (auto i = static_cast<int>(operand_count) - 1; i >= 0; --i)
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{
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args.push_back(ci->getOperand(i));
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exit_fn += fmt::format("mov x%d, $%u;\n", args_base_reg++, i);
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exit_fn += fmt::format("mov x%d, $%u;\n", (args_base_reg + i), ::size32(args) - 1);
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constraints.push_back("r");
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}
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auto context_base_reg = get_base_register_for_call(instruction_info.callee_name);
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if (!instruction_info.callee_is_GHC)
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{
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// For non-GHC calls, we have to remap the arguments to x0...
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context_base_reg = static_cast<gpr>(context_base_reg - 19);
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}
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// Restore LR to the exit gate if we think it may have been trampled.
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if (function_info.clobbers_x30)
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{
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// 3. Restore the exit gate as the current return address
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// Load the context "base" thread register to restore the link register from
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auto context_base_reg = get_base_register_for_call(instruction_info.callee_name);
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if (!instruction_info.callee_is_GHC)
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{
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// For non-GHC calls, we have to remap the arguments to x0...
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context_base_reg = static_cast<gpr>(context_base_reg - 19);
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}
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// We want to do this after loading the arguments in case there was any spilling involved.
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DPRINT("Patching call from %s to %s on register %d...",
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this_name.c_str(),
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@ -377,7 +378,11 @@ namespace aarch64
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if (execution_context.debug_info)
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{
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// Store x27 as our current address taking the place of LR (for debugging since bt is now useless)
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exit_fn += "adr x27, .;\n";
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// x28 and x29 are used as breadcrumb registers in this mode to form a pseudo-backtrace.
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exit_fn +=
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"mov x29, x28;\n"
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"mov x28, x27;\n"
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"adr x27, .;\n";
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}
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auto target = ensure(ci->getCalledOperand());
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@ -385,8 +390,14 @@ namespace aarch64
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if (instruction_info.is_indirect)
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{
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// NOTE: For indirect calls, we read the callee register before we load the operands
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// If we don't do that the operands will overwrite our callee address if it lies in the x19-x25 range
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// There is no safe temp register to stuff the call address to either, you just have to stuff it below sp and load it after operands are all assigned.
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constraints.push_back("r");
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exit_fn += fmt::format("br $%u;\n", operand_count);
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exit_fn = fmt::format("str $%u, [sp, #-8];\n", operand_count) + exit_fn;
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exit_fn +=
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"ldr x15, [sp, #-8];\n"
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"br x15;\n";
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}
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else
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{
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