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spu: Reimplement FCGT and FCMGT to handle corner cases (such as comparisons against infinites and denormals)
- Also optimize FMA/FMS/FNMS for recompiler
This commit is contained in:
kd-11
parent
9e7a42d057
commit
41d921808b
@ -1674,10 +1674,53 @@ void spu_recompiler::ANDC(spu_opcode_t op)
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void spu_recompiler::FCGT(spu_opcode_t op)
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{
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// reverted less-than
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const XmmLink& vb = XmmGet(op.rb, XmmType::Float);
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c->cmpps(vb, SPU_OFF_128(gpr, op.ra), 1);
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c->movaps(SPU_OFF_128(gpr, op.rt), vb);
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const auto last_exp_bit = XmmConst(_mm_set1_epi32(0x00800000));
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const auto all_exp_bits = XmmConst(_mm_set1_epi32(0x7f800000));
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const XmmLink& tmp0 = XmmAlloc();
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const XmmLink& tmp1 = XmmAlloc();
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const XmmLink& tmp2 = XmmAlloc();
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const XmmLink& tmp3 = XmmAlloc();
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const XmmLink& tmpv = XmmAlloc();
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c->pxor(tmp0, tmp0);
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c->pxor(tmp1, tmp1);
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c->cmpps(tmp0, SPU_OFF_128(gpr, op.ra), 3); //tmp0 is true if a is extended (nan/inf)
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c->cmpps(tmp1, SPU_OFF_128(gpr, op.rb), 3); //tmp1 is true if b is extended (nan/inf)
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//compute lower a and b
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c->movaps(tmp2, last_exp_bit);
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c->movaps(tmp3, last_exp_bit);
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c->pandn(tmp2, SPU_OFF_128(gpr, op.ra)); //tmp2 = lowered_a
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c->pandn(tmp3, SPU_OFF_128(gpr, op.rb)); //tmp3 = lowered_b
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//lower a if extended
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c->movaps(tmpv, tmp0);
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c->pand(tmpv, tmp2);
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c->pandn(tmp0, SPU_OFF_128(gpr, op.ra));
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c->orps(tmp0, tmpv);
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//lower b if extended
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c->movaps(tmpv, tmp1);
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c->pand(tmpv, tmp3);
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c->pandn(tmp1, SPU_OFF_128(gpr, op.rb));
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c->orps(tmp1, tmpv);
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//flush a to 0 if denormalized
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c->pxor(tmpv, tmpv);
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c->movaps(tmp2, SPU_OFF_128(gpr, op.ra));
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c->andps(tmp2, all_exp_bits);
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c->cmpps(tmp2, tmpv, 0);
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c->pandn(tmp2, tmp0);
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//flush b to 0 if denormalized
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c->movaps(tmp3, SPU_OFF_128(gpr, op.rb));
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c->andps(tmp3, all_exp_bits);
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c->cmpps(tmp3, tmpv, 0);
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c->pandn(tmp3, tmp1);
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c->cmpps(tmp3, tmp2, 1);
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c->movaps(SPU_OFF_128(gpr, op.rt), tmp3);
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}
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void spu_recompiler::DFCGT(spu_opcode_t op)
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@ -1729,13 +1772,46 @@ void spu_recompiler::ORC(spu_opcode_t op)
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void spu_recompiler::FCMGT(spu_opcode_t op)
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{
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// reverted less-than
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const XmmLink& vb = XmmGet(op.rb, XmmType::Float);
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const XmmLink& vi = XmmAlloc();
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c->movaps(vi, XmmConst(_mm_set1_epi32(0x7fffffff)));
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c->andps(vb, vi); // abs
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c->andps(vi, SPU_OFF_128(gpr, op.ra));
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c->cmpps(vb, vi, 1);
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c->movaps(SPU_OFF_128(gpr, op.rt), vb);
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// since comparison is absoulte, a > b if a is extended and b is not extended
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// flush denormals to zero to make zero == zero work
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const auto last_exp_bit = XmmConst(_mm_set1_epi32(0x00800000));
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const auto all_exp_bits = XmmConst(_mm_set1_epi32(0x7f800000));
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const auto remove_sign_bits = XmmConst(_mm_set1_epi32(0x7fffffff));
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const XmmLink& tmp0 = XmmAlloc();
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const XmmLink& tmp1 = XmmAlloc();
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const XmmLink& tmp2 = XmmAlloc();
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const XmmLink& tmp3 = XmmAlloc();
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const XmmLink& tmpv = XmmAlloc();
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c->pxor(tmp0, tmp0);
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c->pxor(tmp1, tmp1);
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c->cmpps(tmp0, SPU_OFF_128(gpr, op.ra), 3); //tmp0 is true if a is extended (nan/inf)
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c->cmpps(tmp1, SPU_OFF_128(gpr, op.rb), 3); //tmp1 is true if b is extended (nan/inf)
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//flush a to 0 if denormalized
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c->pxor(tmpv, tmpv);
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c->movaps(tmp2, SPU_OFF_128(gpr, op.ra));
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c->andps(tmp2, all_exp_bits);
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c->cmpps(tmp2, tmpv, 0);
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c->pandn(tmp2, SPU_OFF_128(gpr, op.ra));
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//flush b to 0 if denormalized
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c->movaps(tmp3, SPU_OFF_128(gpr, op.rb));
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c->andps(tmp3, all_exp_bits);
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c->cmpps(tmp3, tmpv, 0);
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c->pandn(tmp3, SPU_OFF_128(gpr, op.rb));
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//Set tmp1 to true where a is extended but b is not extended
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//This is a simplification since absolute values remove necessity of lowering
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c->xorps(tmp0, tmp1); //tmp0 is true when either a or b is extended
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c->pandn(tmp1, tmp0); //tmp1 is true if b is not extended and a is extended
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c->andps(tmp2, remove_sign_bits);
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c->andps(tmp3, remove_sign_bits);
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c->cmpps(tmp3, tmp2, 1);
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c->orps(tmp3, tmp1); //Force result to all true if a is extended but b is not
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c->movaps(SPU_OFF_128(gpr, op.rt), tmp3);
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}
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void spu_recompiler::DFCMGT(spu_opcode_t op)
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@ -2717,15 +2793,13 @@ void spu_recompiler::FNMS(spu_opcode_t op)
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const XmmLink& tmp_a = XmmAlloc();
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const XmmLink& tmp_b = XmmAlloc();
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c->movdqa(tmp_a, mask); //tmp_a = mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = a & mask
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c->cmpps(tmp_a, mask, 4); //tmp_a = tmp_a != mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & va
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c->pxor(tmp_a, tmp_a); //tmp_a = 0
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c->cmpps(tmp_a, SPU_OFF_128(gpr, op.ra), 3); //tmp_a = ra == extended
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c->pandn(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & ~ra_extended
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c->movdqa(tmp_b, mask); //tmp_b = mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = b & mask
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c->cmpps(tmp_b, mask, 4); //tmp_b = tmp_b != mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & vb
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c->pxor(tmp_b, tmp_b); //tmp_b = 0
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c->cmpps(tmp_b, SPU_OFF_128(gpr, op.rb), 3); //tmp_b = rb == extended
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c->pandn(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & ~rb_extended
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c->mulps(tmp_a, tmp_b);
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c->subps(vc, tmp_a);
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@ -2736,19 +2810,16 @@ void spu_recompiler::FMA(spu_opcode_t op)
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{
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const XmmLink& vc = XmmGet(op.rc, XmmType::Float);
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const auto mask = XmmConst(_mm_set1_epi32(0x7f800000));
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const XmmLink& tmp_a = XmmAlloc();
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const XmmLink& tmp_b = XmmAlloc();
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c->movdqa(tmp_a, mask); //tmp_a = mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = a & mask
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c->cmpps(tmp_a, mask, 4); //tmp_a = tmp_a != mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & va
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c->pxor(tmp_a, tmp_a); //tmp_a = 0
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c->cmpps(tmp_a, SPU_OFF_128(gpr, op.ra), 3); //tmp_a = ra == extended
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c->pandn(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & ~ra_extended
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c->movdqa(tmp_b, mask); //tmp_b = mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = b & mask
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c->cmpps(tmp_b, mask, 4); //tmp_b = tmp_b != mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & vb
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c->pxor(tmp_b, tmp_b); //tmp_b = 0
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c->cmpps(tmp_b, SPU_OFF_128(gpr, op.rb), 3); //tmp_b = rb == extended
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c->pandn(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & ~rb_extended
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c->mulps(tmp_a, tmp_b);
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c->addps(tmp_a, SPU_OFF_128(gpr, op.rc));
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@ -2763,15 +2834,13 @@ void spu_recompiler::FMS(spu_opcode_t op)
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const XmmLink& tmp_a = XmmAlloc();
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const XmmLink& tmp_b = XmmAlloc();
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c->movdqa(tmp_a, mask); //tmp_a = mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = a & mask
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c->cmpps(tmp_a, mask, 4); //tmp_a = tmp_a != mask
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c->andps(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & va
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c->pxor(tmp_a, tmp_a); //tmp_a = 0
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c->cmpps(tmp_a, SPU_OFF_128(gpr, op.ra), 3); //tmp_a = ra == extended
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c->pandn(tmp_a, SPU_OFF_128(gpr, op.ra)); //tmp_a = mask_a & ~ra_extended
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c->movdqa(tmp_b, mask); //tmp_b = mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = b & mask
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c->cmpps(tmp_b, mask, 4); //tmp_b = tmp_b != mask
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c->andps(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & vb
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c->pxor(tmp_b, tmp_b); //tmp_b = 0
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c->cmpps(tmp_b, SPU_OFF_128(gpr, op.rb), 3); //tmp_b = rb == extended
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c->pandn(tmp_b, SPU_OFF_128(gpr, op.rb)); //tmp_b = mask_b & ~rb_extended
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c->mulps(tmp_a, tmp_b);
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c->subps(tmp_a, SPU_OFF_128(gpr, op.rc));
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@ -719,7 +719,40 @@ void spu_interpreter::ANDC(SPUThread& spu, spu_opcode_t op)
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void spu_interpreter_fast::FCGT(SPUThread& spu, spu_opcode_t op)
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{
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spu.gpr[op.rt].vf = _mm_cmplt_ps(spu.gpr[op.rb].vf, spu.gpr[op.ra].vf);
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// IMPL NOTES:
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// if (v is inf) v = (inf - 1) i.e nearest normal value to inf with mantissa bits left intact
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// if (v is denormalized) v = 0 flush denormals
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// return v1 > v2
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// branching simulated using bitwise ops and_not+or
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const auto zero = _mm_set1_ps(0.f);
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const auto nan_check_a = _mm_cmpunord_ps(spu.gpr[op.ra].vf, zero); //mask true where a is extended
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const auto nan_check_b = _mm_cmpunord_ps(spu.gpr[op.rb].vf, zero); //mask true where b is extended
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//calculate lowered a and b. The mantissa bits are left untouched for now unless its proven they should be flushed
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const auto last_exp_bit = _mm_castsi128_ps(_mm_set1_epi32(0x00800000));
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const auto lowered_a =_mm_andnot_ps(last_exp_bit, spu.gpr[op.ra].vf); //a is lowered to largest unextended value with sign
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const auto lowered_b = _mm_andnot_ps(last_exp_bit, spu.gpr[op.rb].vf); //b is lowered to largest unextended value with sign
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//check if a and b are denormalized
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const auto all_exp_bits = _mm_castsi128_ps(_mm_set1_epi32(0x7f800000));
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const auto denorm_check_a = _mm_cmpeq_ps(zero, _mm_and_ps(all_exp_bits, spu.gpr[op.ra].vf));
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const auto denorm_check_b = _mm_cmpeq_ps(zero, _mm_and_ps(all_exp_bits, spu.gpr[op.rb].vf));
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//set a and b to their lowered values if they are extended
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const auto a_values_lowered = _mm_and_ps(nan_check_a, lowered_a);
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const auto original_a_masked = _mm_andnot_ps(nan_check_a, spu.gpr[op.ra].vf);
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const auto a_final1 = _mm_or_ps(a_values_lowered, original_a_masked);
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const auto b_values_lowered = _mm_and_ps(nan_check_b, lowered_b);
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const auto original_b_masked = _mm_andnot_ps(nan_check_b, spu.gpr[op.rb].vf);
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const auto b_final1 = _mm_or_ps(b_values_lowered, original_b_masked);
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//Flush denormals to zero
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const auto final_a = _mm_andnot_ps(denorm_check_a, a_final1);
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const auto final_b = _mm_andnot_ps(denorm_check_b, b_final1);
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spu.gpr[op.rt].vf = _mm_cmplt_ps(final_b, final_a);
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}
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void spu_interpreter::DFCGT(SPUThread& spu, spu_opcode_t op)
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@ -754,8 +787,28 @@ void spu_interpreter::ORC(SPUThread& spu, spu_opcode_t op)
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void spu_interpreter_fast::FCMGT(SPUThread& spu, spu_opcode_t op)
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{
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const auto mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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spu.gpr[op.rt].vf = _mm_cmplt_ps(_mm_and_ps(spu.gpr[op.rb].vf, mask), _mm_and_ps(spu.gpr[op.ra].vf, mask));
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//IMPL NOTES: See FCGT
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const auto zero = _mm_set1_ps(0.f);
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const auto nan_check_a = _mm_cmpunord_ps(spu.gpr[op.ra].vf, zero); //mask true where a is extended
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const auto nan_check_b = _mm_cmpunord_ps(spu.gpr[op.rb].vf, zero); //mask true where b is extended
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//check if a and b are denormalized
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const auto all_exp_bits = _mm_castsi128_ps(_mm_set1_epi32(0x7f800000));
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const auto denorm_check_a = _mm_cmpeq_ps(zero, _mm_and_ps(all_exp_bits, spu.gpr[op.ra].vf));
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const auto denorm_check_b = _mm_cmpeq_ps(zero, _mm_and_ps(all_exp_bits, spu.gpr[op.rb].vf));
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//Flush denormals to zero
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const auto final_a = _mm_andnot_ps(denorm_check_a, spu.gpr[op.ra].vf);
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const auto final_b = _mm_andnot_ps(denorm_check_b, spu.gpr[op.rb].vf);
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//Mask to make a > b if a is extended but b is not (is this necessary on x86?)
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const auto nan_mask = _mm_andnot_ps(nan_check_b, _mm_xor_ps(nan_check_a, nan_check_b));
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const auto sign_mask = _mm_castsi128_ps(_mm_set1_epi32(0x7fffffff));
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const auto comparison = _mm_cmplt_ps(_mm_and_ps(final_b, sign_mask), _mm_and_ps(final_a, sign_mask));
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spu.gpr[op.rt].vf = _mm_or_ps(comparison, nan_mask);
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}
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void spu_interpreter::DFCMGT(SPUThread& spu, spu_opcode_t op)
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