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PPU/LLVM: Add regression tests for SUBFIC

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Danila Malyutin 2015-08-26 01:48:11 +03:00 committed by Nekotekina
parent 8ea7da56ec
commit 3468a7ebcf
1 changed files with 32 additions and 0 deletions
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32
rpcs3/Emu/Cell/PPULLVMRecompilerTests.cpp
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@ -591,7 +591,14 @@ void Compiler::RunAllTests() {
// TODO: Rest of the vector instructions
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(MULLI, 0, 5, 1u, 2u, 12345);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 0, 5, 1u, 2u, 12345);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 10, 5, 1u, 2u, -12345);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 15, 5, 1u, 2u, 32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 20, 5, 1u, 2u, -32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 25, 5, 1u, 2u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(SUBFIC, 30, 5, 0u, 1u, -1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPLI, 0, 5, 1u, 0u, 7u, 12345u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPLI, 5, 5, 1u, 1u, 7u, 12345u);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER_USING_RANDOM_INPUT(CMPI, 0, 5, 5u, 0u, 7u, -12345);
@ -808,6 +815,31 @@ void Compiler::RunAllTests() {
input.GPR[23] = 0x10000;
input.mem_block[0] = 0x8877665544332211;
input.GPR[1] = 9223372036854775807;
input.GPR[2] = 1;
input.GPR[3] = 0;
input.XER.XER = 0;
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 0, input, 1u, 2u, -32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 1, input, 1u, 2u, -1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 2, input, 1u, 2u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 3, input, 1u, 1u, -32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 4, input, 1u, 1u, -1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 5, input, 1u, 1u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 6, input, 3u, 3u, -32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 7, input, 3u, 3u, -1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 8, input, 3u, 3u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 0, input, 1u, 2u, 32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 1, input, 1u, 2u, 1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 2, input, 1u, 2u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 3, input, 1u, 1u, 32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 4, input, 1u, 1u, 1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 5, input, 1u, 1u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 6, input, 3u, 3u, 32767);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 7, input, 3u, 3u, 1);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(SUBFIC, 8, input, 3u, 3u, 0);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZ, 0, input, 5u, 0u, 0x10000);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZ, 1, input, 5u, 14u, 0x10000);
VERIFY_INSTRUCTION_AGAINST_INTERPRETER(LBZU, 0, input, 5u, 14u, 0x10000);