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RSX : enum vec_opcode & sc_opcode
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raven02
parent
24c5e7d6cd
commit
32aa5ad415
@ -547,15 +547,15 @@ void GLVertexDecompilerThread::Task()
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switch (d1.sca_opcode)
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{
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case 0x00: break; // NOP
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case 0x01: SetDSTSca("$s"); break; // MOV
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case 0x02: SetDSTSca("(1.0 / $s)"); break; // RCP
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case 0x03: SetDSTSca("clamp(1.0 / $s, 5.42101e-20, 1.884467e19)"); break; // RCC
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case 0x04: SetDSTSca("inversesqrt(abs($s))"); break; // RSQ
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case 0x05: SetDSTSca("exp($s)"); break; // EXP
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case 0x06: SetDSTSca("log($s)"); break; // LOG
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case 0x07: SetDSTSca("vec4(1.0, $s.x, ($s.x > 0 ? exp2($s.w * log2($s.y)) : 0.0), 1.0)"); break; // LIT
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case 0x08: // BRA
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case RSX_SCA_OPCODE_NOP: break;
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case RSX_SCA_OPCODE_MOV: SetDSTSca("$s"); break;
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case RSX_SCA_OPCODE_RCP: SetDSTSca("(1.0 / $s)"); break;
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case RSX_SCA_OPCODE_RCC: SetDSTSca("clamp(1.0 / $s, 5.42101e-20, 1.884467e19)"); break;
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case RSX_SCA_OPCODE_RSQ: SetDSTSca("inversesqrt(abs($s))"); break;
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case RSX_SCA_OPCODE_EXP: SetDSTSca("exp($s)"); break;
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case RSX_SCA_OPCODE_LOG: SetDSTSca("log($s)"); break;
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case RSX_SCA_OPCODE_LIT: SetDSTSca("vec4(1.0, $s.x, ($s.x > 0 ? exp2($s.w * log2($s.y)) : 0.0), 1.0)"); break;
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case RSX_SCA_OPCODE_BRA:
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{
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AddCode("$if ($cond)");
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AddCode("{");
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@ -566,7 +566,7 @@ void GLVertexDecompilerThread::Task()
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AddCode("}");
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}
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break;
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case 0x09: // BRI : works differently (BRI o[1].x(TR) L0;)
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case RSX_SCA_OPCODE_BRI: // works differently (BRI o[1].x(TR) L0;)
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{
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uint jump_position;
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@ -597,17 +597,38 @@ void GLVertexDecompilerThread::Task()
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AddCode("}");
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}
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break;
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//case 0x0a: AddCode("$ifcond $f(); //CAL"); break; // CAL : works same as BRI
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case 0x0b: AddCode("$ifcond $f(); //CLI"); break; // CLI : works same as BRI
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case 0x0c: AddCode("$ifcond return;"); break; // RET : works like BRI but shorter (RET o[1].x(TR);)
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case 0x0d: SetDSTSca("log2($s)"); break; // LG2
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case 0x0e: SetDSTSca("exp2($s)"); break; // EX2
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case 0x0f: SetDSTSca("sin($s)"); break; // SIN
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case 0x10: SetDSTSca("cos($s)"); break; // COS
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//case 0x11: break; // BRB : works differently (BRB o[1].x !b0, L0;)
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//case 0x12: break; // CLB : works same as BRB
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//case 0x13: break; // PSH : works differently (PSH o[1].x A0;)
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//case 0x14: break; // POP : works differently (POP o[1].x;)
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case RSX_SCA_OPCODE_CAL:
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// works same as BRI
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AddCode("$ifcond $f(); //CAL");
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break;
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case RSX_SCA_OPCODE_CLI:
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// works same as BRI
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AddCode("$ifcond $f(); //CLI");
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break;
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case RSX_SCA_OPCODE_RET:
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// works like BRI but shorter (RET o[1].x(TR);)
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AddCode("$ifcond return;");
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break;
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case RSX_SCA_OPCODE_LG2: SetDSTSca("log2($s)"); break;
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case RSX_SCA_OPCODE_EX2: SetDSTSca("exp2($s)"); break;
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case RSX_SCA_OPCODE_SIN: SetDSTSca("sin($s)"); break;
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case RSX_SCA_OPCODE_COS: SetDSTSca("cos($s)"); break;
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case RSX_SCA_OPCODE_BRB:
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// works differently (BRB o[1].x !b0, L0;)
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LOG_ERROR(RSX, "Unimplemented sca_opcode BRB");
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break;
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case RSX_SCA_OPCODE_CLB: break;
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// works same as BRB
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LOG_ERROR(RSX, "Unimplemented sca_opcode CLB");
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break;
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case RSX_SCA_OPCODE_PSH: break;
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// works differently (PSH o[1].x A0;)
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LOG_ERROR(RSX, "Unimplemented sca_opcode PSH");
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break;
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case RSX_SCA_OPCODE_POP: break;
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// works differently (POP o[1].x;)
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LOG_ERROR(RSX, "Unimplemented sca_opcode POP");
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break;
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default:
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AddCode(fmt::Format("//Unknown vp sca_opcode 0x%x", fmt::by_value(d1.sca_opcode)));
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@ -618,29 +639,29 @@ void GLVertexDecompilerThread::Task()
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switch (d1.vec_opcode)
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{
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case 0x00: break; //NOP
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case 0x01: SetDSTVec("$0"); break; //MOV
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case 0x02: SetDSTVec("($0 * $1)"); break; //MUL
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case 0x03: SetDSTVec("($0 + $2)"); break; //ADD
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case 0x04: SetDSTVec("($0 * $1 + $2)"); break; //MAD
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case 0x05: SetDSTVec("vec4(dot($0.xyz, $1.xyz))"); break; //DP3
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case 0x06: SetDSTVec("vec4(dot(vec4($0.xyz, 1.0), $1))"); break; //DPH
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case 0x07: SetDSTVec("vec4(dot($0, $1))"); break; //DP4
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case 0x08: SetDSTVec("vec4(distance($0, $1))"); break; //DST
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case 0x09: SetDSTVec("min($0, $1)"); break; //MIN
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case 0x0a: SetDSTVec("max($0, $1)"); break; //MAX
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case 0x0b: SetDSTVec("vec4(lessThan($0, $1))"); break; //SLT
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case 0x0c: SetDSTVec("vec4(greaterThanEqual($0, $1))"); break; //SGE
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case 0x0d: AddCode("$ifcond $a = ivec4($0)$am;"); break; //ARL
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case 0x0e: SetDSTVec("fract($0)"); break; //FRC
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case 0x0f: SetDSTVec("floor($0)"); break; //FLR
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case 0x10: SetDSTVec("vec4(equal($0, $1))"); break; //SEQ
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case 0x11: SetDSTVec("vec4(equal($0, vec4(0.0)))"); break; //SFL
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case 0x12: SetDSTVec("vec4(greaterThan($0, $1))"); break; //SGT
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case 0x13: SetDSTVec("vec4(lessThanEqual($0, $1))"); break; //SLE
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case 0x14: SetDSTVec("vec4(notEqual($0, $1))"); break; //SNE
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case 0x15: SetDSTVec("vec4(equal($0, vec4(1.0)))"); break; //STR
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case 0x16: SetDSTVec("sign($0)"); break; //SSG
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case RSX_VEC_OPCODE_NOP: break;
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case RSX_VEC_OPCODE_MOV: SetDSTVec("$0"); break;
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case RSX_VEC_OPCODE_MUL: SetDSTVec("($0 * $1)"); break;
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case RSX_VEC_OPCODE_ADD: SetDSTVec("($0 + $2)"); break;
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case RSX_VEC_OPCODE_MAD: SetDSTVec("($0 * $1 + $2)"); break;
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case RSX_VEC_OPCODE_DP3: SetDSTVec("vec4(dot($0.xyz, $1.xyz))"); break;
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case RSX_VEC_OPCODE_DPH: SetDSTVec("vec4(dot(vec4($0.xyz, 1.0), $1))"); break;
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case RSX_VEC_OPCODE_DP4: SetDSTVec("vec4(dot($0, $1))"); break;
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case RSX_VEC_OPCODE_DST: SetDSTVec("vec4(distance($0, $1))"); break;
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case RSX_VEC_OPCODE_MIN: SetDSTVec("min($0, $1)"); break;
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case RSX_VEC_OPCODE_MAX: SetDSTVec("max($0, $1)"); break;
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case RSX_VEC_OPCODE_SLT: SetDSTVec("vec4(lessThan($0, $1))"); break;
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case RSX_VEC_OPCODE_SGE: SetDSTVec("vec4(greaterThanEqual($0, $1))"); break;
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case RSX_VEC_OPCODE_ARL: AddCode("$ifcond $a = ivec4($0)$am;"); break;
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case RSX_VEC_OPCODE_FRC: SetDSTVec("fract($0)"); break;
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case RSX_VEC_OPCODE_FLR: SetDSTVec("floor($0)"); break;
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case RSX_VEC_OPCODE_SEQ: SetDSTVec("vec4(equal($0, $1))"); break;
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case RSX_VEC_OPCODE_SFL: SetDSTVec("vec4(equal($0, vec4(0.0)))"); break;
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case RSX_VEC_OPCODE_SGT: SetDSTVec("vec4(greaterThan($0, $1))"); break;
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case RSX_VEC_OPCODE_SLE: SetDSTVec("vec4(lessThanEqual($0, $1))"); break;
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case RSX_VEC_OPCODE_SNE: SetDSTVec("vec4(notEqual($0, $1))"); break;
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case RSX_VEC_OPCODE_STR: SetDSTVec("vec4(equal($0, vec4(1.0)))"); break;
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case RSX_VEC_OPCODE_SSG: SetDSTVec("sign($0)"); break;
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default:
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AddCode(fmt::Format("//Unknown vp opcode 0x%x", fmt::by_value(d1.vec_opcode)));
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