mirror of
https://github.com/RPCS3/rpcs3.git
synced 2025-03-12 04:14:35 +00:00
rsx: Restructure flip code and frame scoping
- Add an explicit frame scope marker tied in with the queue_prepare command Since queue_prepare is emitted at the end of a frame, it can be used as end-of-frame in games that emit this - If this command is not emitted, fifo flatenner and frameskip will not work
This commit is contained in:
kd-11
kd-11
parent
c50119aefa
commit
2c76f47eec
@ -15,6 +15,9 @@ extern u64 get_timebased_time();
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static shared_mutex s_rsxmem_mtx;
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// Unknown error code returned by sys_rsx_context_attribute
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constexpr unsigned SYS_RSX_CONTEXT_ATTRIBUTE_ERROR = -17u;
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u64 rsxTimeStamp()
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{
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return get_timebased_time();
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@ -82,7 +85,9 @@ error_code sys_rsx_context_allocate(vm::ptr<u32> context_id, vm::ptr<u64> lpar_d
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auto rsx_cfg = g_fxo->get<lv2_rsx_config>();
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if (!rsx_cfg->state)
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{
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return CELL_EINVAL;
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}
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*context_id = 0x55555555;
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@ -96,7 +101,8 @@ error_code sys_rsx_context_allocate(vm::ptr<u32> context_id, vm::ptr<u64> lpar_d
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for (int i = 0; i < 64; ++i)
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reports.notify[i].timestamp = (u64)-1;
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for (int i = 0; i < 256; ++i) {
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for (int i = 0; i < 256; ++i)
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{
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reports.semaphore[i].val = 0x1337C0D3;
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reports.semaphore[i].pad = 0x1337BABE;
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reports.semaphore[i].timestamp = (u64)-1; // technically different but should be fine
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@ -301,9 +307,9 @@ error_code sys_rsx_context_attribute(s32 context_id, u32 package_id, u64 a3, u64
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// fyi -- u32 hardware_channel = (a4 >> 8) & 0xFF;
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// sanity check, the head should have a 'queued' buffer on it, and it should have been previously 'queued'
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u32 sanity_check = 0x40000000 & (1 << flip_idx);
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const u32 sanity_check = 0x40000000 & (1 << flip_idx);
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if ((driverInfo.head[a3].flipFlags & sanity_check) != sanity_check)
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LOG_ERROR(RSX, "Display Flip Queued: Flipping non previously queued buffer 0x%x", a4);
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LOG_ERROR(RSX, "Display Flip Queued: Flipping non previously queued buffer 0x%llx", a4);
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}
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else
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{
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@ -327,23 +333,33 @@ error_code sys_rsx_context_attribute(s32 context_id, u32 package_id, u64 a3, u64
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break;
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case 0x103: // Display Queue
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{
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driverInfo.head[a3].lastQueuedBufferId = a4;
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driverInfo.head[a3].flipFlags |= 0x40000000 | (1 << a4);
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if (a3 == 0)
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sys_event_port_send(rsx_cfg->rsx_event_port, 0, (1 << 5), 0);
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if (a3 == 1)
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sys_event_port_send(rsx_cfg->rsx_event_port, 0, (1 << 6), 0);
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break;
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// NOTE: There currently seem to only be 2 active heads on PS3
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verify(HERE), a3 < 2;
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const u64 shift_offset = (a3 + 5);
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sys_event_port_send(rsx_cfg->rsx_event_port, 0, (1ull << shift_offset), 0);
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render->on_frame_end(a4);
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}
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break;
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case 0x104: // Display buffer
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{
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u8 id = a3 & 0xFF;
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u32 width = (a4 >> 32) & 0xFFFFFFFF;
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u32 height = a4 & 0xFFFFFFFF;
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u32 pitch = (a5 >> 32) & 0xFFFFFFFF;
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u32 offset = a5 & 0xFFFFFFFF;
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const u8 id = a3 & 0xFF;
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if (id > 7)
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return -17;
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{
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return SYS_RSX_CONTEXT_ATTRIBUTE_ERROR;
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}
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const u32 width = (a4 >> 32) & 0xFFFFFFFF;
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const u32 height = a4 & 0xFFFFFFFF;
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const u32 pitch = (a5 >> 32) & 0xFFFFFFFF;
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const u32 offset = a5 & 0xFFFFFFFF;
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render->display_buffers[id].width = width;
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render->display_buffers[id].height = height;
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render->display_buffers[id].pitch = pitch;
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@ -370,7 +386,9 @@ error_code sys_rsx_context_attribute(s32 context_id, u32 package_id, u64 a3, u64
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case 0x10a: // ? Involved in managing flip status through cellGcmResetFlipStatus
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{
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if (a3 > 7)
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return -17;
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{
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return SYS_RSX_CONTEXT_ATTRIBUTE_ERROR;
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}
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u32 flipStatus = driverInfo.head[a3].flipFlags;
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flipStatus = (flipStatus & a4) | a5;
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@ -2235,45 +2235,9 @@ namespace rsx
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void thread::flip(int buffer, bool emu_flip)
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{
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if (!(async_flip_requested & flip_request::any))
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if (async_flip_requested & flip_request::any)
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{
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// Flip is processed through inline FLIP command in the commandstream
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// This is critical as it is a reliable end-of-frame marker
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if (!g_cfg.video.disable_FIFO_reordering)
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{
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// Try to enable FIFO optimizations
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// Only rarely useful for some games like RE4
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m_flattener.evaluate_performance(m_draw_calls);
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}
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// Reset zcull ctrl
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zcull_ctrl->set_active(this, false);
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zcull_ctrl->clear(this);
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if (zcull_ctrl->has_pending())
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{
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LOG_TRACE(RSX, "Dangling reports found, discarding...");
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zcull_ctrl->sync(this);
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}
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if (g_cfg.video.frame_skip_enabled)
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{
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m_skip_frame_ctr++;
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if (m_skip_frame_ctr == g_cfg.video.consequtive_frames_to_draw)
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m_skip_frame_ctr = -g_cfg.video.consequtive_frames_to_skip;
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skip_frame = (m_skip_frame_ctr < 0);
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}
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}
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else
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{
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if (async_flip_requested & flip_request::emu_requested)
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{
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m_flattener.force_disable();
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}
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// Deferred flip
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if (emu_flip)
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{
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async_flip_requested.clear(flip_request::emu_requested);
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@ -2284,13 +2248,16 @@ namespace rsx
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}
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}
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if (!skip_frame)
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if (emu_flip)
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{
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// Reset counter
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m_draw_calls = 0;
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}
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if (g_cfg.video.frame_skip_enabled)
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{
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skip_frame = (m_skip_frame_ctr < 0);
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}
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performance_counters.sampled_frames++;
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m_draw_calls = 0;
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performance_counters.sampled_frames++;
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}
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}
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void thread::check_zcull_status(bool framebuffer_swap)
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@ -2528,31 +2495,9 @@ namespace rsx
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return performance_counters.approximate_load;
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}
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void thread::request_emu_flip(u32 buffer)
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{
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const bool is_rsxthr = std::this_thread::get_id() == m_rsx_thread;
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// requested through command buffer
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if (is_rsxthr)
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{
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// NOTE: The flip will clear any queued flip requests
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handle_emu_flip(buffer);
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}
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else // requested 'manually' through ppu syscall
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{
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if (async_flip_requested & flip_request::emu_requested)
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{
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// ignore multiple requests until previous happens
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return;
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}
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async_flip_buffer = buffer;
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async_flip_requested |= flip_request::emu_requested;
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}
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}
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void thread::handle_emu_flip(u32 buffer)
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void thread::on_frame_end(u32 buffer, bool forced)
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{
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// Marks the end of a frame scope GPU-side
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if (user_asked_for_frame_capture && !capture_current_frame)
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{
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capture_current_frame = true;
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@ -2588,6 +2533,81 @@ namespace rsx
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Emu.Pause();
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}
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// Reset zcull ctrl
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zcull_ctrl->set_active(this, false);
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zcull_ctrl->clear(this);
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if (zcull_ctrl->has_pending())
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{
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LOG_TRACE(RSX, "Dangling reports found, discarding...");
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zcull_ctrl->sync(this);
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}
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if (LIKELY(!forced))
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{
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if (!g_cfg.video.disable_FIFO_reordering)
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{
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// Try to enable FIFO optimizations
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// Only rarely useful for some games like RE4
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m_flattener.evaluate_performance(m_draw_calls);
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}
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if (g_cfg.video.frame_skip_enabled)
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{
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m_skip_frame_ctr++;
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if (m_skip_frame_ctr == g_cfg.video.consequtive_frames_to_draw)
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m_skip_frame_ctr = -g_cfg.video.consequtive_frames_to_skip;
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}
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}
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else
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{
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if (!g_cfg.video.disable_FIFO_reordering)
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{
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// Flattener is unusable due to forced random flips
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m_flattener.force_disable();
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}
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if (g_cfg.video.frame_skip_enabled)
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{
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LOG_ERROR(RSX, "Frame skip is not compatible with this application");
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}
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}
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queued_flip_index = int(buffer);
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}
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void thread::request_emu_flip(u32 buffer)
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{
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const bool is_rsxthr = std::this_thread::get_id() == m_rsx_thread;
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// requested through command buffer
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if (is_rsxthr)
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{
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// NOTE: The flip will clear any queued flip requests
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handle_emu_flip(buffer);
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}
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else // requested 'manually' through ppu syscall
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{
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if (async_flip_requested & flip_request::emu_requested)
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{
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// ignore multiple requests until previous happens
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return;
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}
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async_flip_buffer = buffer;
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async_flip_requested |= flip_request::emu_requested;
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}
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}
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void thread::handle_emu_flip(u32 buffer)
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{
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if (queued_flip_index < 0)
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{
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// Frame was not queued before flipping
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on_frame_end(buffer, true);
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}
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double limit = 0.;
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switch (g_cfg.video.frame_limit)
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{
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@ -2634,6 +2654,7 @@ namespace rsx
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last_flip_time = get_system_time() - 1000000;
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flip_status = CELL_GCM_DISPLAY_FLIP_STATUS_DONE;
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queued_flip_index = -1;
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if (flip_handler)
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{
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@ -558,6 +558,7 @@ namespace rsx
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u64 start_rsx_time = 0;
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u64 int_flip_index = 0;
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u64 last_flip_time;
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int queued_flip_index = -1;
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vm::ptr<void(u32)> flip_handler = vm::null;
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vm::ptr<void(u32)> user_handler = vm::null;
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vm::ptr<void(u32)> vblank_handler = vm::null;
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@ -607,6 +608,7 @@ namespace rsx
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virtual void on_init_rsx() = 0;
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virtual void on_init_thread() = 0;
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virtual bool do_method(u32 /*cmd*/, u32 /*value*/) { return false; }
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virtual void on_frame_end(u32 buffer, bool forced = false);
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virtual void flip(int buffer, bool emu_flip = false) = 0;
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virtual u64 timestamp();
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virtual bool on_access_violation(u32 /*address*/, bool /*is_writing*/) { return false; }
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