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https://github.com/RPCS3/rpcs3.git
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Small fixes
This commit is contained in:
parent
336442eeba
commit
2200e6f4d9
@ -1,29 +1,38 @@
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#include "stdafx.h"
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#include "Utilities/SSemaphore.h"
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bool SSemaphore::wait(u64 timeout)
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void SSemaphore::wait()
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{
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std::unique_lock<std::mutex> lock(m_cv_mutex);
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u32 order;
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{
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std::lock_guard<std::mutex> lock(m_mutex);
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order = m_in_order++;
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}
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std::unique_lock<std::mutex> cv_lock(m_cv_mutex);
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u64 counter = 0;
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while (true)
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{
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if (Emu.IsStopped())
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{
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return false;
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return;
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}
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if (timeout && counter >= timeout)
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{
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return false;
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}
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m_cond.wait_for(lock, std::chrono::milliseconds(1));
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counter++;
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m_cond.wait_for(cv_lock, std::chrono::milliseconds(1));
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std::lock_guard<std::mutex> lock(m_mutex);
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if (m_count)
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{
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m_count--;
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return true;
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if (m_out_order == order)
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{
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m_count--;
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m_out_order++;
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return;
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}
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else
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{
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m_cond.notify_one();
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}
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}
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}
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}
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@ -32,7 +41,8 @@ bool SSemaphore::try_wait()
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{
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std::lock_guard<std::mutex> lock(m_mutex);
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if (m_count)
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// TODO: ordering?
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if (m_count && m_in_order == m_out_order)
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{
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m_count--;
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return true;
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@ -4,6 +4,8 @@ class SSemaphore
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{
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const u32 m_max;
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u32 m_count;
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u32 m_in_order;
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u32 m_out_order;
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std::mutex m_mutex, m_cv_mutex;
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std::condition_variable m_cond;
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@ -11,12 +13,16 @@ public:
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SSemaphore(u32 value, u32 max = 1)
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: m_max(max > 0 ? max : 0xffffffff)
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, m_count(value > m_max ? m_max : value)
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, m_in_order(0)
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, m_out_order(0)
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{
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}
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SSemaphore()
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: m_max(0xffffffff)
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, m_count(0)
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, m_in_order(0)
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, m_out_order(0)
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{
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}
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@ -24,7 +30,7 @@ public:
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{
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}
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bool wait(u64 timeout = 0);
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void wait();
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bool try_wait();
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@ -2,36 +2,6 @@
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#include "SPUThread.h"
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#include "Emu/event.h"
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enum
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{
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MFC_LSA_offs = 0x3004,
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MFC_EAH_offs = 0x3008,
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MFC_EAL_offs = 0x300C,
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MFC_Size_Tag_offs = 0x3010,
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MFC_Class_CMD_offs = 0x3014,
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MFC_CMDStatus_offs = 0x3014,
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MFC_QStatus_offs = 0x3104,
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Prxy_QueryType_offs = 0x3204,
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Prxy_QueryMask_offs = 0x321C,
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Prxy_TagStatus_offs = 0x322C,
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SPU_Out_MBox_offs = 0x4004,
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SPU_In_MBox_offs = 0x400C,
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SPU_MBox_Status_offs = 0x4014,
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SPU_RunCntl_offs = 0x401C,
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SPU_Status_offs = 0x4024,
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SPU_NPC_offs = 0x4034,
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SPU_RdSigNotify1_offs = 0x1400C,
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SPU_RdSigNotify2_offs = 0x1C00C,
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};
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enum : u64
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{
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RAW_SPU_OFFSET = 0x0000000000100000,
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RAW_SPU_BASE_ADDR = 0x00000000E0000000,
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RAW_SPU_LS_OFFSET = 0x0000000000000000,
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RAW_SPU_PROB_OFFSET = 0x0000000000040000,
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};
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__forceinline static u32 GetRawSPURegAddrByNum(int num, int offset)
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{
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return RAW_SPU_OFFSET * num + RAW_SPU_BASE_ADDR + RAW_SPU_PROB_OFFSET + offset;
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@ -129,6 +129,36 @@ enum : u32
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SYS_SPU_THREAD_SNR2 = 0x05C00c,
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};
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enum
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{
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MFC_LSA_offs = 0x3004,
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MFC_EAH_offs = 0x3008,
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MFC_EAL_offs = 0x300C,
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MFC_Size_Tag_offs = 0x3010,
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MFC_Class_CMD_offs = 0x3014,
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MFC_CMDStatus_offs = 0x3014,
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MFC_QStatus_offs = 0x3104,
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Prxy_QueryType_offs = 0x3204,
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Prxy_QueryMask_offs = 0x321C,
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Prxy_TagStatus_offs = 0x322C,
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SPU_Out_MBox_offs = 0x4004,
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SPU_In_MBox_offs = 0x400C,
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SPU_MBox_Status_offs = 0x4014,
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SPU_RunCntl_offs = 0x401C,
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SPU_Status_offs = 0x4024,
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SPU_NPC_offs = 0x4034,
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SPU_RdSigNotify1_offs = 0x1400C,
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SPU_RdSigNotify2_offs = 0x1C00C,
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};
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enum : u64
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{
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RAW_SPU_OFFSET = 0x0000000000100000,
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RAW_SPU_BASE_ADDR = 0x00000000E0000000,
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RAW_SPU_LS_OFFSET = 0x0000000000000000,
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RAW_SPU_PROB_OFFSET = 0x0000000000040000,
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};
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//Floating point status and control register. Unsure if this is one of the GPRs or SPRs
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//Is 128 bits, but bits 0-19, 24-28, 32-49, 56-60, 64-81, 88-92, 96-115, 120-124 are unused
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class FPSCR
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@ -598,26 +628,65 @@ public:
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return false;
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}
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}
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//Sleep(1); // hack
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switch(cmd & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_LIST_MASK | MFC_RESULT_MASK))
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else if (ea >= RAW_SPU_BASE_ADDR && size == 4)
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{
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case MFC_PUT_CMD:
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switch (cmd & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_LIST_MASK | MFC_RESULT_MASK))
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{
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return Memory.Copy(ea, dmac.ls_offset + lsa, size);
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case MFC_PUT_CMD:
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{
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Memory.Write32(ea, ReadLS32(lsa));
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return true;
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}
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case MFC_GET_CMD:
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case MFC_GET_CMD:
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{
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return Memory.Copy(dmac.ls_offset + lsa, ea, size);
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WriteLS32(lsa, Memory.Read32(ea));
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return true;
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}
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default:
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default:
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{
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ConLog.Error("DMAC::ProcessCmd(): Unknown DMA cmd.");
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return false;
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}
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}
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}
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//Sleep(1); // hack
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switch (cmd & ~(MFC_BARRIER_MASK | MFC_FENCE_MASK | MFC_LIST_MASK | MFC_RESULT_MASK))
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{
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case MFC_PUT_CMD:
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{
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if (Memory.Copy(ea, dmac.ls_offset + lsa, size))
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{
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return true;
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}
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else
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{
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ConLog.Error("DMAC::ProcessCmd(): PUT* cmd failed (ea=0x%llx, lsa=0x%x, size=%d)", ea, lsa, size);
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return false; // TODO: page fault (?)
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}
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}
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case MFC_GET_CMD:
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{
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if (Memory.Copy(dmac.ls_offset + lsa, ea, size))
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{
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return true;
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}
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else
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{
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ConLog.Error("DMAC::ProcessCmd(): GET* cmd failed (ea=0x%llx, lsa=0x%x, size=%d)", ea, lsa, size);
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return false; // TODO: page fault (?)
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}
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}
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default:
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{
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ConLog.Error("DMAC::ProcessCmd(): Unknown DMA cmd.");
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return false; // ???
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}
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}
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}
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@ -13,7 +13,7 @@ static SysCallBase sc_int("sys_interrupt");
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int sys_interrupt_tag_destroy(u32 intrtag)
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{
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sc_int.Error("sys_interrupt_tag_destroy(intrtag=%d)", intrtag);
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sc_int.Warning("sys_interrupt_tag_destroy(intrtag=%d)", intrtag);
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u32 id = intrtag & 0xff;
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u32 class_id = intrtag >> 8;
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@ -40,7 +40,7 @@ int sys_interrupt_tag_destroy(u32 intrtag)
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int sys_interrupt_thread_establish(mem32_t ih, u32 intrtag, u64 intrthread, u64 arg)
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{
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sc_int.Error("sys_interrupt_thread_establish(ih_addr=0x%x, intrtag=%d, intrthread=%lld, arg=0x%llx)", ih.GetAddr(), intrtag, intrthread, arg);
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sc_int.Warning("sys_interrupt_thread_establish(ih_addr=0x%x, intrtag=%d, intrthread=%lld, arg=0x%llx)", ih.GetAddr(), intrtag, intrthread, arg);
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if (!ih.IsGood())
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{
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