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CellSpurs: Minor fixes
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4ea7628204
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1e7bf218e0
@ -603,9 +603,7 @@ s32 _spurs::detach_lv2_eq(vm::ptr<CellSpurs> spurs, u8 spuPort, bool spursCreate
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if (!spursCreated)
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{
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const u64 mask = 1ull << spuPort;
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if (!(spurs->spuPortBits.fetch_and(~mask) & mask) && _spurs::get_sdk_version() >= 0x180000)
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if (!spurs->spuPortBits.btr(spuPort) && _spurs::get_sdk_version() >= 0x180000)
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{
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return CELL_SPURS_CORE_ERROR_SRCH;
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}
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@ -1802,18 +1800,16 @@ s32 cellSpursSetPriorities(vm::ptr<CellSpurs> spurs, u32 wid, vm::cptr<u8[8]> pr
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return CELL_SPURS_CORE_ERROR_INVAL;
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}
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const auto wklInfo = wid < CELL_SPURS_MAX_WORKLOAD ? &spurs->wklInfo1[wid] : &spurs->wklInfo2[wid];
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std::memcpy(wklInfo->priority, &prio, 8);
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spurs->sysSrvMsgUpdateWorkload = 0xff;
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spurs->sysSrvMessage = 0xff;
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vm::reservation_light_op(spurs->wklInfo(wid).prio64, [&](atomic_t<u64>& v){ v.release(prio); });
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vm::reservation_light_op(spurs->sysSrvMsgUpdateWorkload, [](atomic_t<u8>& v){ v.release(0xff); });
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vm::reservation_light_op(spurs->sysSrvMessage, [](atomic_t<u8>& v){ v.release(0xff); });
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return CELL_OK;
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}
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/// Set the priority of a workload for the specified SPU
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s32 cellSpursSetPriority(vm::ptr<CellSpurs> spurs, u32 wid, u32 spuId, u32 priority)
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{
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cellSpurs.todo("cellSpursSetPriority(spurs=*0x%x, wid=%d, spuId=%d, priority=%d)", spurs, wid, spuId, priority);
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cellSpurs.trace("cellSpursSetPriority(spurs=*0x%x, wid=%d, spuId=%d, priority=%d)", spurs, wid, spuId, priority);
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if (!spurs)
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return CELL_SPURS_CORE_ERROR_NULL_POINTER;
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@ -1824,6 +1820,18 @@ s32 cellSpursSetPriority(vm::ptr<CellSpurs> spurs, u32 wid, u32 spuId, u32 prior
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if (wid >= spurs->max_workloads())
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return CELL_SPURS_CORE_ERROR_INVAL;
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if (priority >= CELL_SPURS_MAX_PRIORITY || spuId >= spurs->nSpus)
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return CELL_SPURS_CORE_ERROR_INVAL;
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if ((spurs->wklEnabled & (0x80000000u >> wid)) == 0u)
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return CELL_SPURS_CORE_ERROR_SRCH;
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if (spurs->exception)
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return CELL_SPURS_CORE_ERROR_STAT;
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vm::reservation_light_op(spurs->wklInfo(wid).priority[spuId], [&](u8& v){ atomic_storage<u8>::release(v, priority); });
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vm::reservation_light_op(spurs->sysSrvMsgUpdateWorkload, [&](atomic_t<u8>& v){ v.bts(spuId); });
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vm::reservation_light_op(spurs->sysSrvMessage, [&](atomic_t<u8>& v){ v.bts(spuId); });
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return CELL_OK;
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}
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@ -1978,9 +1986,16 @@ s32 cellSpursGetInfo(vm::ptr<CellSpurs> spurs, vm::ptr<CellSpursInfo> info)
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//----------------------------------------------------------------------------
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/// Get the SPU GUID from a .SpuGUID section
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s32 cellSpursGetSpuGuid()
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s32 cellSpursGetSpuGuid(vm::cptr<void> guid, vm::ptr<u64> dst)
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{
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UNIMPLEMENTED_FUNC(cellSpurs);
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cellSpurs.trace("cellSpursGetSpuGuid(guid=*0x%x, dst=*0x%x)", guid, dst);
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if (!guid || !dst)
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return CELL_SPURS_CORE_ERROR_NULL_POINTER;
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if (!dst.aligned())
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return CELL_SPURS_CORE_ERROR_ALIGN;
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return CELL_OK;
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}
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@ -2403,17 +2418,17 @@ s32 _spurs::add_workload(vm::ptr<CellSpurs> spurs, vm::ptr<u32> wid, vm::cptr<vo
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spurs->wklFlagReceiver.compare_and_swap(wnum, 0xff);
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u32 res_wkl;
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const auto wkl = wnum <= 15 ? &spurs->wklInfo1[wnum] : &spurs->wklInfo2[wnum & 0xf];
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spurs->wklMskB.atomic_op([spurs, wkl, wnum, &res_wkl](be_t<u32>& v)
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const auto wkl = &spurs->wklInfo(wnum);
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vm::reservation_op(vm::unsafe_ptr_cast<spurs_wkl_state_op>(spurs.ptr(&CellSpurs::wklState1)), [&](spurs_wkl_state_op& op)
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{
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const u32 mask = v & ~(0x80000000u >> wnum);
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const u32 mask = op.wklMskB & ~(0x80000000u >> wnum);
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res_wkl = 0;
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for (u32 i = 0, m = 0x80000000, k = 0; i < 32; i++, m >>= 1)
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{
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if (mask & m)
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{
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const auto current = i <= 15 ? &spurs->wklInfo1[i] : &spurs->wklInfo2[i & 0xf];
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const auto current = &spurs->wklInfo(i);
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if (current->addr == wkl->addr)
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{
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// if a workload with identical policy module found
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@ -2428,14 +2443,14 @@ s32 _spurs::add_workload(vm::ptr<CellSpurs> spurs, vm::ptr<u32> wid, vm::cptr<vo
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}
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}
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wkl->uniqueId.exchange(static_cast<u8>(res_wkl));
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v = mask | (0x80000000u >> wnum);
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wkl->uniqueId.release(static_cast<u8>(res_wkl));
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op.wklMskB = mask | (0x80000000u >> wnum);
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(wnum < CELL_SPURS_MAX_WORKLOAD ? op.wklState1[wnum] : op.wklState2[wnum % 16]) = SPURS_WKL_STATE_RUNNABLE;
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});
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verify(HERE), (res_wkl <= 31);
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spurs->wklState(wnum).exchange(SPURS_WKL_STATE_RUNNABLE);
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spurs->sysSrvMsgUpdateWorkload.exchange(0xff);
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spurs->sysSrvMessage.exchange(0xff);
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vm::reservation_light_op(spurs->sysSrvMsgUpdateWorkload, [](atomic_t<u8>& v){ v.release(0xff); });
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vm::reservation_light_op(spurs->sysSrvMessage, [](atomic_t<u8>& v){ v.release(0xff); });
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return CELL_OK;
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}
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@ -2529,7 +2544,7 @@ s32 cellSpursShutdownWorkload(ppu_thread& ppu, vm::ptr<CellSpurs> spurs, u32 wid
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if (old_state == SPURS_WKL_STATE_SHUTTING_DOWN)
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{
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spurs->sysSrvMessage = -1;
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vm::reservation_light_op(spurs->sysSrvMessage, [&](atomic_t<u8>& v){ v.release(0xff); });
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return CELL_OK;
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}
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@ -639,7 +639,12 @@ struct alignas(128) CellSpurs
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be_t<u32> size; // 0x10 Size of the executable
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atomic_t<u8> uniqueId; // 0x14 Unique id of the workload. It is the same for all workloads with the same addr.
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u8 pad[3];
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u8 priority[8]; // 0x18 Priority of the workload on each SPU
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union
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{
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atomic_t<u64> prio64;
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u8 priority[8]; // 0x18 Priority of the workload on each SPU
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};
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};
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CHECK_SIZE(WorkloadInfo, 32);
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@ -719,6 +724,7 @@ struct alignas(128) CellSpurs
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atomic_t<u8> handlerDirty; // 0xD64
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atomic_t<u8> handlerWaiting; // 0xD65
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atomic_t<u8> handlerExiting; // 0xD66
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u8 xD67; // 0xD67
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atomic_be_t<u32> enableEH; // 0xD68
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be_t<u32> exception; // 0xD6C
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sys_spu_image spuImg; // 0xD70
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