angie
faaf017aef
isJumpWithAddress
2022-10-13 14:32:36 -03:00
angie
b5f4df9c1a
Add explanations to most stuff on InstrDescriptor
2022-10-13 14:24:34 -03:00
angie
ba09c10925
format tables
2022-10-13 13:32:22 -03:00
Angie
70c8632f4c
Actually compute the size of each operand
2022-10-09 21:43:37 -03:00
Angie
4ebd49711b
add missing operand to trap instructions
2022-10-09 18:29:31 -03:00
Anghelo Carvajal
acee144578
C++ bindings ( #9 )
...
* start making c++ bindings
* Add sanity checks
* add descriptor methods
* setup making c++ library
* cpp test
* format (not tidy because it breaks everything and the result looks dumb)
* Fixes
* add missing alias
* move stuff to their own files
* InstructionRsp bindings
* r5900 bindings
* almost there
* binding for analysis stuff
* setters
2022-10-09 17:51:47 -03:00
Angie
874863ab77
add userdefined instructionId placeholders
2022-10-09 17:48:46 -03:00
Angie
4effc73851
add missing bal metadata
2022-10-09 16:11:04 -03:00
Angie
d23366827c
version bump
2022-10-09 16:04:33 -03:00
angie
9bf973e82d
Add extern "C" in all the headers
2022-10-04 08:31:02 -03:00
Angie
15b254bf03
Add bal support
2022-09-27 22:52:57 -03:00
Angie
69fe5ff69a
Use . + 4 + (X << 2) notation for branches when no immOverride was given
2022-09-27 22:06:28 -03:00
angie
079c2b6b10
Add version header
2022-09-26 11:15:28 -03:00
angie
421e740014
Add building static lib to makefile and a header which includes every other header
2022-09-26 11:00:45 -03:00
Angie
2c77b650a1
undo typo
2022-09-17 17:23:10 -03:00
angie
b9037c70e3
Avoid not fitting value on LoPairingInfo
2022-09-16 14:51:05 -03:00
angie
edc172323d
RegistersTracker.processGpLoad
2022-09-13 17:04:06 -03:00
angie
04b31eff1a
RegistersTracker.preprocessLoAndGetInfo
2022-09-13 14:05:42 -03:00
angie
baf3ce83ee
Fix missing braces warning
2022-09-09 23:19:45 -04:00
angie
ea935b8358
refactor operand names
2022-09-09 23:13:23 -04:00
Anghelo Carvajal
136fb7a09a
Add R5900 support ( #5 )
...
* starting r5900 stuff
* operands of pmaddh
* expose R5900 to python
* fix merge issues
* move to subtables
* mmi0 and mmi3
* the rest of mmi instructions
* normal, special, regimm and cop0
* fpu_s
* cop2 special1
* starting cop2 special2
* the rest of special2
* operands for normal, special, mmi and mmi0
* mmi1 and mmi2
* Fix mmi
* sync.p
* mmi3 and cop1
* add r5900 opcodes to InstrId.pyi
* add invalid bits to unknown instruction comment
* progress on cop2 special1
* kinda finish cop2 special1
* cop2 special2 progress
* Special case for R5900 cvt.w.s -> trunc.w.s
* R5900 c.olt.s and c.ole.s
* Fix a bunch of VU0 instructions
* I'm getting tired of this bullshit
* vlqi, vsqi, vlqd, vsqd
* fix some operands
* fix div1
* lqc2 and sqc2
* sqrt.s and mult
* fix mtsa and bc2
* Remove redundant .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN
* RabbitizerInstrSuffix
* Impleme instr suffix type
* add instr suffix to remaining instructions
* ifdef out xyzw suffix from registers
* format
* fix warnings
* uncomment stuff on InstrId.pyi
* readme
2022-08-27 12:22:48 -04:00
Angie
d4cb445cc1
Add -Wpedantic to makefile
2022-08-23 15:12:55 -04:00
Angie
c9a9845a65
finish up rsp tables
2022-08-23 15:07:25 -04:00
Angie
75e129b3dd
make tables for rsp normal, special, regimm and cop0
2022-08-23 14:06:52 -04:00
Angie
5b59b2dff7
finish up cpu instructions
2022-08-23 12:31:03 -04:00
Angie
2ebb5f7712
Tables for cpu except cop1
2022-08-23 10:55:14 -04:00
Angie
5ec08f914d
Start including the case bits on the tables themselves
2022-08-23 09:32:24 -04:00
Anghelo Carvajal
f8979ede3e
Fix RSP instruction decoding ( #4 )
...
* Use the proper registers on RSP GPR instructions
* Add IMM_base operand to RSP instructions
* Use `ra` on RSP GPR registers
* Fix RABBITIZER_OPERAND_TYPE_RSP_rd
* ??
* fix vector register element index
* fix RSP mfc2 and mtc2
* fix vmov and similar instructions
* format
* update readme
* version pump
2022-08-22 16:27:51 -04:00
Angie
a5ef766311
Utils.escapeString
2022-07-10 16:04:39 -04:00
angie
a539a8a39d
Annotate functions with attributes
2022-07-09 19:19:53 -04:00
angie
ef1ce2634c
add more checks to clang tidy
2022-07-09 18:12:21 -04:00
angie
ecc8de8df2
Add a makefile for testing and fix one warning
2022-07-09 16:54:42 -04:00
angie
b3ffb7a713
Rename isHiPair and isLoPair to canBeHi and canBeLo
2022-07-07 15:48:10 -04:00
angie
dc314098d0
hasDelaySlot
2022-07-07 15:12:26 -04:00
angie
19579a183a
Allow pickling Instruction type
2022-07-07 14:22:41 -04:00
Angie
d5b4b096b4
Allow disabling upper case for immediates
2022-07-07 00:44:30 -04:00
Angie
3d70f9d285
Option to omit the 0x on small hex immediates
2022-07-07 00:25:05 -04:00
Angie
c129447463
getProcessedImmediate
2022-07-06 20:12:37 -04:00
Angie
6fc7be4517
RabbitizerInstruction_disassembleOperands
2022-07-06 19:17:29 -04:00
angie
55de30256a
doesLoad and doesStore
2022-07-05 13:32:24 -04:00
angie
63591003f6
RabbitizerInstruction_hasOperandAlias
2022-07-05 09:18:48 -04:00
Angie
568a0662f2
remove redundant functions
2022-07-05 00:53:28 -04:00
Angie
bed5d928dd
RabbitizerInstruction_isValid
2022-07-03 19:28:13 -04:00
Angie
a725e0281a
minor cleanups
2022-07-03 11:34:46 -04:00
Angie
0c678ab6df
remove specific registers from instruction struct
...
do bitwise operations to access them instead
2022-07-03 08:34:26 -04:00
Angie
d0b39c6f8c
introduce macros for reading the bits from the instruction word
2022-07-02 18:49:05 -04:00
angie
1b67fe86dd
expose some more descriptor methods to python
2022-07-01 12:57:58 -04:00
angie
7eab5eb1df
Add architecture version to most cpu instructions
...
fp instructions are not done yet
2022-07-01 12:07:45 -04:00
angie
42a2a33d7d
RegistersTracker#hasLoButNoHi
2022-06-13 14:01:48 -04:00
angie
298e84ef71
Finish RegistersTracker
2022-06-12 09:29:38 -04:00
