9 Commits

Author	SHA1	Message	Date
Angie	61d30e5aa1	Change treatJAsUnconditionalBranch to true by default	2022-12-18 21:09:14 -03:00
Angie	59f143b21d	rust stuff on readme	2022-12-18 18:37:07 -03:00
Anghelo Carvajal	fb8c1edbd7	Rust bindings (#17) ... * Generate bindings for enums * Add .gitignore Cargo didn't automatically made * Actually build the files into the library * `pub` in `mod` to fix warning * instruction struct * Instruction rust binding * Add InstrId::ALL_MAX * link C library to rust * Publish crate CI * test * config bindings * add getters for registers * add names methods for register enums * get_operand_type * feedback from simon * Forgot to add new file to python setup.py * get_operands_slice * add stuff to cargo.toml	2022-12-18 15:15:39 -03:00
angie	4be4f6798d	Update references	2022-12-14 15:27:16 -03:00
Anghelo Carvajal	136fb7a09a	Add R5900 support (#5) ... * starting r5900 stuff * operands of pmaddh * expose R5900 to python * fix merge issues * move to subtables * mmi0 and mmi3 * the rest of mmi instructions * normal, special, regimm and cop0 * fpu_s * cop2 special1 * starting cop2 special2 * the rest of special2 * operands for normal, special, mmi and mmi0 * mmi1 and mmi2 * Fix mmi * sync.p * mmi3 and cop1 * add r5900 opcodes to InstrId.pyi * add invalid bits to unknown instruction comment * progress on cop2 special1 * kinda finish cop2 special1 * cop2 special2 progress * Special case for R5900 cvt.w.s -> trunc.w.s * R5900 c.olt.s and c.ole.s * Fix a bunch of VU0 instructions * I'm getting tired of this bullshit * vlqi, vsqi, vlqd, vsqd * fix some operands * fix div1 * lqc2 and sqc2 * sqrt.s and mult * fix mtsa and bc2 * Remove redundant .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN * RabbitizerInstrSuffix * Impleme instr suffix type * add instr suffix to remaining instructions * ifdef out xyzw suffix from registers * format * fix warnings * uncomment stuff on InstrId.pyi * readme	2022-08-27 12:22:48 -04:00
Anghelo Carvajal	f8979ede3e	Fix RSP instruction decoding (#4) ... * Use the proper registers on RSP GPR instructions * Add IMM_base operand to RSP instructions * Use `ra` on RSP GPR registers * Fix RABBITIZER_OPERAND_TYPE_RSP_rd * ?? * fix vector register element index * fix RSP mfc2 and mtc2 * fix vmov and similar instructions * format * update readme * version pump	2022-08-22 16:27:51 -04:00
angie	274c889241	Some readme work	2022-06-23 00:29:41 -04:00
angie	1b082d4fe8	Initial structure porting	2022-06-03 13:46:51 -04:00
angie	c74c3be0a2	First commit	2022-06-03 01:37:52 -04:00