angie
|
32acccf873
|
Try to make logic check tests
|
2022-12-15 16:06:48 -03:00 |
|
angie
|
77dda82424
|
readsR* functions
|
2022-12-14 18:03:13 -03:00 |
|
angie
|
6d49bb4abf
|
Remove signedness from access type and move it to doesUnsignedMemoryAccess
|
2022-10-16 17:02:50 -03:00 |
|
angie
|
5d0f9ad8f6
|
reads/modifies HI/LO
|
2022-10-14 14:58:14 -03:00 |
|
angie
|
7cec779b85
|
AccessType enum
|
2022-10-13 19:41:46 -03:00 |
|
angie
|
91f30645e8
|
Remove RabbitizerArchitectureVersion and deprecate RabbitizerInstrType
|
2022-10-13 16:12:07 -03:00 |
|
angie
|
faaf017aef
|
isJumpWithAddress
|
2022-10-13 14:32:36 -03:00 |
|
angie
|
b5f4df9c1a
|
Add explanations to most stuff on InstrDescriptor
|
2022-10-13 14:24:34 -03:00 |
|
angie
|
9bf973e82d
|
Add extern "C" in all the headers
|
2022-10-04 08:31:02 -03:00 |
|
Anghelo Carvajal
|
136fb7a09a
|
Add R5900 support (#5)
* starting r5900 stuff
* operands of pmaddh
* expose R5900 to python
* fix merge issues
* move to subtables
* mmi0 and mmi3
* the rest of mmi instructions
* normal, special, regimm and cop0
* fpu_s
* cop2 special1
* starting cop2 special2
* the rest of special2
* operands for normal, special, mmi and mmi0
* mmi1 and mmi2
* Fix mmi
* sync.p
* mmi3 and cop1
* add r5900 opcodes to InstrId.pyi
* add invalid bits to unknown instruction comment
* progress on cop2 special1
* kinda finish cop2 special1
* cop2 special2 progress
* Special case for R5900 cvt.w.s -> trunc.w.s
* R5900 c.olt.s and c.ole.s
* Fix a bunch of VU0 instructions
* I'm getting tired of this bullshit
* vlqi, vsqi, vlqd, vsqd
* fix some operands
* fix div1
* lqc2 and sqc2
* sqrt.s and mult
* fix mtsa and bc2
* Remove redundant .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN
* RabbitizerInstrSuffix
* Impleme instr suffix type
* add instr suffix to remaining instructions
* ifdef out xyzw suffix from registers
* format
* fix warnings
* uncomment stuff on InstrId.pyi
* readme
|
2022-08-27 12:22:48 -04:00 |
|
angie
|
a539a8a39d
|
Annotate functions with attributes
|
2022-07-09 19:19:53 -04:00 |
|
angie
|
b3ffb7a713
|
Rename isHiPair and isLoPair to canBeHi and canBeLo
|
2022-07-07 15:48:10 -04:00 |
|
angie
|
55de30256a
|
doesLoad and doesStore
|
2022-07-05 13:32:24 -04:00 |
|
angie
|
1b67fe86dd
|
expose some more descriptor methods to python
|
2022-07-01 12:57:58 -04:00 |
|
angie
|
7eab5eb1df
|
Add architecture version to most cpu instructions
fp instructions are not done yet
|
2022-07-01 12:07:45 -04:00 |
|
angie
|
b3843f271e
|
starting to port RegistersTracker
|
2022-06-11 17:49:33 -04:00 |
|
angie
|
8b37e56e2e
|
Some fixes
|
2022-06-08 22:44:43 -04:00 |
|
angie
|
bab16d24a5
|
Add more stuff to Descriptor
|
2022-06-08 02:17:48 -04:00 |
|
angie
|
9c05b19866
|
rename RabbitizerRegisterType to RabbitizerOperandType
|
2022-06-07 23:30:01 -04:00 |
|
angie
|
518953980c
|
more rsp stuff
|
2022-06-07 02:28:10 -04:00 |
|
angie
|
6b7650476f
|
Change capitalization
|
2022-06-05 13:19:45 -04:00 |
|
angie
|
cedf56ca36
|
logic for disassembling as data
|
2022-06-04 02:17:25 -04:00 |
|
angie
|
74b009931c
|
Starting to workout the disassembly
|
2022-06-03 20:19:58 -04:00 |
|
angie
|
d610dab8e1
|
Array of opcode names
|
2022-06-03 17:33:10 -04:00 |
|
angie
|
b36cf689e0
|
Array of opcode names placeholder
|
2022-06-03 14:19:43 -04:00 |
|
angie
|
1b082d4fe8
|
Initial structure porting
|
2022-06-03 13:46:51 -04:00 |
|