119 Commits

Author	SHA1	Message	Date
angie	145114c096	toggle register names	2022-06-05 01:57:22 -04:00
angie	6a0cdbb637	more stuff	2022-06-04 23:23:06 -04:00
angie	55b016488a	implementing some missing functions and some bugfixes	2022-06-04 22:18:53 -04:00
angie	97fd189cda	RSP instr id enum placeholder	2022-06-04 17:40:16 -04:00
angie	f5c3f7ce2d	Move instruction id definitions to common macros	2022-06-04 17:34:17 -04:00
angie	85bf2c887a	Convert extraLjustWidthOpcode to a parameter	2022-06-04 12:43:54 -04:00
angie	7411aadae3	Functions to calculate the size for the disassembly buffer	2022-06-04 02:42:17 -04:00
angie	cedf56ca36	logic for disassembling as data	2022-06-04 02:17:25 -04:00
angie	9f118686fd	simulate ljust	2022-06-04 01:24:59 -04:00
angie	779412bea8	cop1, cop2 and generic one	2022-06-04 00:49:59 -04:00
angie	371ac0fea1	RabbitizerInstr_ProcessUniqueId_Coprocessor0	2022-06-03 23:53:51 -04:00
angie	9639bc4590	RabbitizerInstr_ProcessUniqueId_Regimm	2022-06-03 23:37:47 -04:00
angie	9d18f32937	RabbitizerInstr_ProcessUniqueId_Special	2022-06-03 23:32:16 -04:00
angie	2e5ed6a0b6	Implement every RegisterType	2022-06-03 22:39:10 -04:00
angie	74b009931c	Starting to workout the disassembly	2022-06-03 20:19:58 -04:00
angie	d610dab8e1	Array of opcode names	2022-06-03 17:33:10 -04:00
angie	a3b7e13784	Opcodes enum	2022-06-03 17:05:00 -04:00
angie	b36cf689e0	Array of opcode names placeholder	2022-06-03 14:19:43 -04:00
angie	1b082d4fe8	Initial structure porting	2022-06-03 13:46:51 -04:00