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https://github.com/Decompollaborate/rabbitizer.git
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Add architecture version to most cpu instructions
fp instructions are not done yet
This commit is contained in:
angie
parent
274c889241
commit
7eab5eb1df
@ -19,6 +19,15 @@ typedef enum RabbitizerInstrType {
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RABBITIZER_INSTR_TYPE_MAX,
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RABBITIZER_INSTR_TYPE_MAX,
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} RabbitizerInstrType;
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} RabbitizerInstrType;
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typedef enum RabbitizerArchitectureVersion {
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RABBITIZER_ARCHVERSION_INVALID=-1,
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RABBITIZER_ARCHVERSION_UNKNOWN,
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RABBITIZER_ARCHVERSION_MIPS_I,
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RABBITIZER_ARCHVERSION_MIPS_II,
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RABBITIZER_ARCHVERSION_MIPS_III,
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RABBITIZER_ARCHVERSION_MIPS_IV
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} RabbitizerArchitectureVersion;
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typedef struct RabbitizerInstrDescriptor {
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typedef struct RabbitizerInstrDescriptor {
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RabbitizerOperandType operands[4];
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RabbitizerOperandType operands[4];
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RabbitizerInstrType instrType;
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RabbitizerInstrType instrType;
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@ -44,7 +53,9 @@ typedef struct RabbitizerInstrDescriptor {
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bool doesDereference;
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bool doesDereference;
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bool maybeIsMove;
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bool maybeIsMove;
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// int mipsVersion;
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bool isPseudo;
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int architectureVersion;
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} RabbitizerInstrDescriptor;
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} RabbitizerInstrDescriptor;
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// TODO: less redundant name
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// TODO: less redundant name
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@ -1,170 +1,170 @@
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/* SPDX-FileCopyrightText: © 2022 Decompollaborate */
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/* SPDX-FileCopyrightText: © 2022 Decompollaborate */
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/* SPDX-License-Identifier: MIT */
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/* SPDX-License-Identifier: MIT */
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RABBITIZER_DEF_INSTR_ID(cpu, INVALID, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN),
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RABBITIZER_DEF_INSTR_ID(cpu, INVALID, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .architectureVersion=-1),
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// OP rs
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// OP rs
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RABBITIZER_DEF_INSTR_ID(cpu, mthi, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R), // Move To HI register
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RABBITIZER_DEF_INSTR_ID(cpu, mthi, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Move To HI register
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RABBITIZER_DEF_INSTR_ID(cpu, mtlo, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R), // Move To LO register
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RABBITIZER_DEF_INSTR_ID(cpu, mtlo, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Move To LO register
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RABBITIZER_DEF_INSTR_ID(cpu, jr, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true), // Jump Register
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RABBITIZER_DEF_INSTR_ID(cpu, jr, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Jump Register
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RABBITIZER_DEF_INSTR_ID(cpu, jalr, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true, .modifiesRd=true, .doesLink=true), // Jump And Link Register
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RABBITIZER_DEF_INSTR_ID(cpu, jalr, .operands={RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true, .modifiesRd=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Jump And Link Register
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// OP rd, rs
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// OP rd, rs
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, jalr_rd, jalr, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true, .modifiesRd=true, .doesLink=true), // Jump And Link Register // Special case for rd != 31
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, jalr_rd, jalr, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .isJump=true, .modifiesRd=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Jump And Link Register // Special case for rd != 31
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// OP rd
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// OP rd
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RABBITIZER_DEF_INSTR_ID(cpu, mfhi, .operands={RABBITIZER_OPERAND_TYPE_rd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Move From HI register
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RABBITIZER_DEF_INSTR_ID(cpu, mfhi, .operands={RABBITIZER_OPERAND_TYPE_rd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Move From HI register
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RABBITIZER_DEF_INSTR_ID(cpu, mflo, .operands={RABBITIZER_OPERAND_TYPE_rd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Move From LO register
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RABBITIZER_DEF_INSTR_ID(cpu, mflo, .operands={RABBITIZER_OPERAND_TYPE_rd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Move From LO register
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// OP rs, rt
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// OP rs, rt
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RABBITIZER_DEF_INSTR_ID(cpu, mult, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // MULTtiply word
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RABBITIZER_DEF_INSTR_ID(cpu, mult, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // MULTtiply word
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RABBITIZER_DEF_INSTR_ID(cpu, multu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // MULTtiply Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, multu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // MULTtiply Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, dmult, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // Doubleword MULTiply
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RABBITIZER_DEF_INSTR_ID(cpu, dmult, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword MULTiply
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RABBITIZER_DEF_INSTR_ID(cpu, dmultu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // Doubleword MULTiply Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, dmultu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword MULTiply Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, tge, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if Greater or Equal
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RABBITIZER_DEF_INSTR_ID(cpu, tge, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if Greater or Equal
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RABBITIZER_DEF_INSTR_ID(cpu, tgeu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if Greater or Equal Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, tgeu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if Greater or Equal Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, tlt, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if Less Than
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RABBITIZER_DEF_INSTR_ID(cpu, tlt, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if Less Than
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RABBITIZER_DEF_INSTR_ID(cpu, tltu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if Less Than Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, tltu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if Less Than Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, teq, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if EQual
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RABBITIZER_DEF_INSTR_ID(cpu, teq, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if EQual
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RABBITIZER_DEF_INSTR_ID(cpu, tne, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true), // Trap if Not Equal
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RABBITIZER_DEF_INSTR_ID(cpu, tne, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Trap if Not Equal
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// OP rd, rs, rt
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// OP rd, rs, rt
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RABBITIZER_DEF_INSTR_ID(cpu, movz, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // MOVe conditional on Zero
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RABBITIZER_DEF_INSTR_ID(cpu, movz, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_IV), // MOVe conditional on Zero
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RABBITIZER_DEF_INSTR_ID(cpu, movn, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // MOVe conditional on Not zero
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RABBITIZER_DEF_INSTR_ID(cpu, movn, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_IV), // MOVe conditional on Not zero
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RABBITIZER_DEF_INSTR_ID(cpu, div, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // DIVide word
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RABBITIZER_DEF_INSTR_ID(cpu, div, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // DIVide word
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RABBITIZER_DEF_INSTR_ID(cpu, divu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // DIVide Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, divu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // DIVide Unsigned word
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, sn64_div, div, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // DIVide word
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, sn64_div, div, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // DIVide word
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, sn64_divu, divu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // DIVide Unsigned word
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RABBITIZER_DEF_INSTR_ID_ALTNAME(cpu, sn64_divu, divu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // DIVide Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, ddiv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // Doubleword DIVide
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RABBITIZER_DEF_INSTR_ID(cpu, ddiv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword DIVide
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RABBITIZER_DEF_INSTR_ID(cpu, ddivu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R), // Doubleword DIVide Unsigned
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RABBITIZER_DEF_INSTR_ID(cpu, ddivu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword DIVide Unsigned
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// RABBITIZER_DEF_INSTR_ID(cpu, ddiv, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R),
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// RABBITIZER_DEF_INSTR_ID(cpu, ddiv, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III),
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// RABBITIZER_DEF_INSTR_ID(cpu, ddivu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R),
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// RABBITIZER_DEF_INSTR_ID(cpu, ddivu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III),
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RABBITIZER_DEF_INSTR_ID(cpu, add, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .notEmitedByCompilers=true), // ADD word
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RABBITIZER_DEF_INSTR_ID(cpu, add, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .notEmitedByCompilers=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // ADD word
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RABBITIZER_DEF_INSTR_ID(cpu, addu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true), // ADD Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, addu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // ADD Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, sub, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Subtract word
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RABBITIZER_DEF_INSTR_ID(cpu, sub, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Subtract word
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RABBITIZER_DEF_INSTR_ID(cpu, subu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // SUBtract Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, subu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // SUBtract Unsigned word
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RABBITIZER_DEF_INSTR_ID(cpu, and, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // AND
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RABBITIZER_DEF_INSTR_ID(cpu, and, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // AND
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RABBITIZER_DEF_INSTR_ID(cpu, or, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true), // OR
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RABBITIZER_DEF_INSTR_ID(cpu, or, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // OR
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RABBITIZER_DEF_INSTR_ID(cpu, xor, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // eXclusive OR
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RABBITIZER_DEF_INSTR_ID(cpu, xor, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // eXclusive OR
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RABBITIZER_DEF_INSTR_ID(cpu, nor, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Not OR
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RABBITIZER_DEF_INSTR_ID(cpu, nor, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Not OR
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RABBITIZER_DEF_INSTR_ID(cpu, slt, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Set on Less Than
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RABBITIZER_DEF_INSTR_ID(cpu, slt, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Set on Less Than
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sltu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Set on Less Than Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, sltu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Set on Less Than Unsigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dadd, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Add
|
RABBITIZER_DEF_INSTR_ID(cpu, dadd, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Add
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, daddu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true), // Doubleword Add Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, daddu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Add Unsigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsub, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword SUBtract
|
RABBITIZER_DEF_INSTR_ID(cpu, dsub, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword SUBtract
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsubu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword SUBtract Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, dsubu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword SUBtract Unsigned
|
||||||
|
|
||||||
// OP code
|
// OP code
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, syscall, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R), // SYStem CALL
|
RABBITIZER_DEF_INSTR_ID(cpu, syscall, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // SYStem CALL
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, break, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R), // Break
|
RABBITIZER_DEF_INSTR_ID(cpu, break, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Break
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sync, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R), // Sync
|
RABBITIZER_DEF_INSTR_ID(cpu, sync, .operands={RABBITIZER_OPERAND_TYPE_code}, .instrType=RABBITIZER_INSTR_TYPE_R, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Sync
|
||||||
|
|
||||||
// OP rd, rt, rs
|
// OP rd, rt, rs
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsllv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Left Logical Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, dsllv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Left Logical Variable
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsrlv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Logical Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, dsrlv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Logical Variable
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsrav, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Arithmetic Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, dsrav, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Arithmetic Variable
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sllv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Left Logical Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, sllv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Left Logical Variable
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, srlv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Right Logical Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, srlv, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Right Logical Variable
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, srav, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Right Arithmetic Variable
|
RABBITIZER_DEF_INSTR_ID(cpu, srav, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Right Arithmetic Variable
|
||||||
|
|
||||||
// OP rd, rt, sa
|
// OP rd, rt, sa
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sll, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Left Logical
|
RABBITIZER_DEF_INSTR_ID(cpu, sll, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Left Logical
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, srl, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Right Logical
|
RABBITIZER_DEF_INSTR_ID(cpu, srl, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Right Logical
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sra, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Shift word Right Arithmetic
|
RABBITIZER_DEF_INSTR_ID(cpu, sra, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Shift word Right Arithmetic
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsll, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Left Logical
|
RABBITIZER_DEF_INSTR_ID(cpu, dsll, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Left Logical
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsrl, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Logical
|
RABBITIZER_DEF_INSTR_ID(cpu, dsrl, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Logical
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsra, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Arithmetic
|
RABBITIZER_DEF_INSTR_ID(cpu, dsra, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Arithmetic
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsll32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Left Logical plus 32
|
RABBITIZER_DEF_INSTR_ID(cpu, dsll32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Left Logical plus 32
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsrl32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Logical plus 32
|
RABBITIZER_DEF_INSTR_ID(cpu, dsrl32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Logical plus 32
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, dsra32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Doubleword Shift Right Arithmetic plus 32
|
RABBITIZER_DEF_INSTR_ID(cpu, dsra32, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword Shift Right Arithmetic plus 32
|
||||||
|
|
||||||
// OP rs, IMM
|
// OP rs, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bltz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true), // Branch on Less Than Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, bltz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Less Than Zero
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true), // Branch on Greater than or Equal to Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, bgez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Greater than or Equal to Zero
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bltzl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true), // Branch on Less Than Zero Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bltzl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Less Than Zero Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgezl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true), // Branch on Greater than or Equal to Zero Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bgezl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Greater than or Equal to Zero Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, tgei, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, tgei, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, tgeiu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, tgeiu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, tlti, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, tlti, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, tltiu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, tltiu, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bltzal, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .doesLink=true), // Branch on Less Than Zero and Link
|
RABBITIZER_DEF_INSTR_ID(cpu, bltzal, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Less Than Zero and Link
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgezal, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .doesLink=true), // Branch on Greater Than or Equal to Zero and Link
|
RABBITIZER_DEF_INSTR_ID(cpu, bgezal, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Greater Than or Equal to Zero and Link
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bltzall, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .doesLink=true), // Branch on Less Than Zero and Link Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bltzall, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Less Than Zero and Link Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgezall, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .doesLink=true), // Branch on Greater Than or Equal to Zero and Link Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bgezall, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isBranch=true, .isBranchLikely=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Greater Than or Equal to Zero and Link Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, teqi, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, teqi, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, tnei, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, tnei, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_REGIMM, .isTrap=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II),
|
||||||
|
|
||||||
// OP LABEL
|
// OP LABEL
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, j, .operands={RABBITIZER_OPERAND_TYPE_LABEL}, .instrType=RABBITIZER_INSTR_TYPE_J, .isJump=true), // Jump
|
RABBITIZER_DEF_INSTR_ID(cpu, j, .operands={RABBITIZER_OPERAND_TYPE_LABEL}, .instrType=RABBITIZER_INSTR_TYPE_J, .isJump=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Jump
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, jal, .operands={RABBITIZER_OPERAND_TYPE_LABEL}, .instrType=RABBITIZER_INSTR_TYPE_J, .isJump=true, .doesLink=true), // Jump And Link
|
RABBITIZER_DEF_INSTR_ID(cpu, jal, .operands={RABBITIZER_OPERAND_TYPE_LABEL}, .instrType=RABBITIZER_INSTR_TYPE_J, .isJump=true, .doesLink=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Jump And Link
|
||||||
|
|
||||||
// OP rs, rt, IMM
|
// OP rs, rt, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, beq, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on EQual
|
RABBITIZER_DEF_INSTR_ID(cpu, beq, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on EQual
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bne, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on Not Equal
|
RABBITIZER_DEF_INSTR_ID(cpu, bne, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Not Equal
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, beql, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true), // Branch on EQual Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, beql, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on EQual Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bnel, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true), // Branch on Not Equal Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bnel, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Not Equal Likely
|
||||||
|
|
||||||
// OP rs, IMM
|
// OP rs, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, blez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on Less than or Equal to Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, blez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Less than or Equal to Zero
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgtz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on Greater Than Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, bgtz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Branch on Greater Than Zero
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, blezl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true), // Branch on Less than or Equal to Zero Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, blezl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Less than or Equal to Zero Likely
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bgtzl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true), // Branch on Greater Than Zero Likely
|
RABBITIZER_DEF_INSTR_ID(cpu, bgtzl, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isBranchLikely=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Branch on Greater Than Zero Likely
|
||||||
|
|
||||||
// OP rt, IMM
|
// OP rt, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lui, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .isHiPair=true), // Load Upper Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, lui, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .isHiPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Upper Immediate
|
||||||
|
|
||||||
// OP rt, rs, IMM
|
// OP rt, rs, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, andi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true), // And Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, andi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // And Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ori, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .isLoPair=true), // Or Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, ori, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .isLoPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Or Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, xori, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true), // eXclusive OR Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, xori, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isUnsigned=true, .modifiesRt=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // eXclusive OR Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, addi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .notEmitedByCompilers=true, .isLoPair=true), // Add Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, addi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .notEmitedByCompilers=true, .isLoPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Add Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, addiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true), // Add Immediate Unsigned Word
|
RABBITIZER_DEF_INSTR_ID(cpu, addiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Add Immediate Unsigned Word
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, daddi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true), // Doubleword add Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, daddi, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword add Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, daddiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true), // Doubleword add Immediate Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, daddiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Doubleword add Immediate Unsigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, slti, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true), // Set on Less Than Immediate
|
RABBITIZER_DEF_INSTR_ID(cpu, slti, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Set on Less Than Immediate
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sltiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true), // Set on Less Than Immediate Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, sltiu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Set on Less Than Immediate Unsigned
|
||||||
|
|
||||||
// OP rt, IMM(base)
|
// OP rt, IMM(base)
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ldl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Doubleword Left
|
RABBITIZER_DEF_INSTR_ID(cpu, ldl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Load Doubleword Left
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ldr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Doubleword Right
|
RABBITIZER_DEF_INSTR_ID(cpu, ldr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Load Doubleword Right
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lb, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Byte
|
RABBITIZER_DEF_INSTR_ID(cpu, lb, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Byte
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lh, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Halfword
|
RABBITIZER_DEF_INSTR_ID(cpu, lh, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Halfword
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lwl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Word Left
|
RABBITIZER_DEF_INSTR_ID(cpu, lwl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Word Left
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lw, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Word
|
RABBITIZER_DEF_INSTR_ID(cpu, lw, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Word
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lbu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Byte Insigned
|
RABBITIZER_DEF_INSTR_ID(cpu, lbu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Byte Insigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lhu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Halfword Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, lhu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Halfword Unsigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lwr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Word Right
|
RABBITIZER_DEF_INSTR_ID(cpu, lwr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Word Right
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lwu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Word Unsigned
|
RABBITIZER_DEF_INSTR_ID(cpu, lwu, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Load Word Unsigned
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sb, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Byte
|
RABBITIZER_DEF_INSTR_ID(cpu, sb, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Byte
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sh, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Halfword
|
RABBITIZER_DEF_INSTR_ID(cpu, sh, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Halfword
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, swl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Word Left
|
RABBITIZER_DEF_INSTR_ID(cpu, swl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Word Left
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sw, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Word
|
RABBITIZER_DEF_INSTR_ID(cpu, sw, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Word
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sdl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Doubleword Left
|
RABBITIZER_DEF_INSTR_ID(cpu, sdl, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Store Doubleword Left
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sdr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Doubleword Right
|
RABBITIZER_DEF_INSTR_ID(cpu, sdr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Store Doubleword Right
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, swr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Word Right
|
RABBITIZER_DEF_INSTR_ID(cpu, swr, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Word Right
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ll, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Linked word
|
RABBITIZER_DEF_INSTR_ID(cpu, ll, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Load Linked word
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, pref, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Prefetch
|
RABBITIZER_DEF_INSTR_ID(cpu, pref, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_IV), // Prefetch
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lld, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Linked Doubleword
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RABBITIZER_DEF_INSTR_ID(cpu, lld, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Load Linked Doubleword
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ld, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Load Doubleword
|
RABBITIZER_DEF_INSTR_ID(cpu, ld, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Load Doubleword
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sc, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Store Conditional word
|
RABBITIZER_DEF_INSTR_ID(cpu, sc, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Store Conditional word
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, scd, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Store Conditional Doubleword
|
RABBITIZER_DEF_INSTR_ID(cpu, scd, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Store Conditional Doubleword
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sd, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true), // Store Doubleword
|
RABBITIZER_DEF_INSTR_ID(cpu, sd, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_III), // Store Doubleword
|
||||||
|
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, cache, .operands={RABBITIZER_OPERAND_TYPE_op, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .notEmitedByCompilers=true), // Cache
|
RABBITIZER_DEF_INSTR_ID(cpu, cache, .operands={RABBITIZER_OPERAND_TYPE_op, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .notEmitedByCompilers=true), // Cache
|
||||||
|
|
||||||
// OP ft, IMM(base)
|
// OP ft, IMM(base)
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lwc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isLoPair=true, .doesDereference=true), // Load Word to Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, lwc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Word to Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ldc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isDouble=true, .isLoPair=true, .doesDereference=true), // Load Doubleword to Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, ldc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isDouble=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Load Doubleword to Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, swc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isLoPair=true, .doesDereference=true), // Store Word from Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, swc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Word from Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sdc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isDouble=true, .isLoPair=true, .doesDereference=true), // Store Doubleword from Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, sdc1, .operands={RABBITIZER_OPERAND_TYPE_ft, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isFloat=true, .isDouble=true, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Store Doubleword from Coprocessor z
|
||||||
|
|
||||||
// OP cop2t, IMM(base)
|
// OP cop2t, IMM(base)
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, lwc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Load Word to Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, lwc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Load Word to Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, ldc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Load Doubleword to Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, ldc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Load Doubleword to Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, swc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Word from Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, swc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_I), // Store Word from Coprocessor z
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, sdc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true), // Store Doubleword from Coprocessor z
|
RABBITIZER_DEF_INSTR_ID(cpu, sdc2, .operands={RABBITIZER_OPERAND_TYPE_cop2t, RABBITIZER_OPERAND_TYPE_IMM_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .isLoPair=true, .doesDereference=true, .architectureVersion=RABBITIZER_ARCHVERSION_MIPS_II), // Store Doubleword from Coprocessor z
|
||||||
|
|
||||||
// OP rt, cop0d
|
// OP rt, cop0d
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, mfc0, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_cop0d}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .modifiesRt=true, .notEmitedByCompilers=true), // Move word From CP0
|
RABBITIZER_DEF_INSTR_ID(cpu, mfc0, .operands={RABBITIZER_OPERAND_TYPE_rt, RABBITIZER_OPERAND_TYPE_cop0d}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .modifiesRt=true, .notEmitedByCompilers=true), // Move word From CP0
|
||||||
@ -287,18 +287,18 @@
|
|||||||
|
|
||||||
// Pseudo-Instruction Unique IDs
|
// Pseudo-Instruction Unique IDs
|
||||||
// OP
|
// OP
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, nop, .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_R), // No OPeration
|
RABBITIZER_DEF_INSTR_ID(cpu, nop, .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_R, .isPseudo=true), // No OPeration
|
||||||
|
|
||||||
// OP rs, IMM
|
// OP rs, IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, beqz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on EQual Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, beqz, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isPseudo=true), // Branch on EQual Zero
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, bnez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch on Not Equal Zero
|
RABBITIZER_DEF_INSTR_ID(cpu, bnez, .operands={RABBITIZER_OPERAND_TYPE_rs, RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isPseudo=true), // Branch on Not Equal Zero
|
||||||
|
|
||||||
// OP IMM
|
// OP IMM
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, b, .operands={RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true), // Branch (unconditional)
|
RABBITIZER_DEF_INSTR_ID(cpu, b, .operands={RABBITIZER_OPERAND_TYPE_IMM}, .instrType=RABBITIZER_INSTR_TYPE_I, .isBranch=true, .isPseudo=true), // Branch (unconditional)
|
||||||
|
|
||||||
// OP rd, rs
|
// OP rd, rs
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, move, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true), // Move
|
RABBITIZER_DEF_INSTR_ID(cpu, move, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .maybeIsMove=true, .isPseudo=true), // Move
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, not, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true), // Not
|
RABBITIZER_DEF_INSTR_ID(cpu, not, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .isPseudo=true), // Not
|
||||||
|
|
||||||
// OP rd, rt
|
// OP rd, rt
|
||||||
RABBITIZER_DEF_INSTR_ID(cpu, negu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true),
|
RABBITIZER_DEF_INSTR_ID(cpu, negu, .operands={RABBITIZER_OPERAND_TYPE_rd, RABBITIZER_OPERAND_TYPE_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .isPseudo=true),
|
||||||
|
|||||||
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Reference in New Issue
Block a user