Merge pull request #66 from Decompollaborate/develop

1.11.2
This commit is contained in:
Anghelo Carvajal 2024-07-16 21:19:07 -04:00 committed by GitHub
commit 1e0daec706
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42 changed files with 446 additions and 122 deletions

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@ -212,8 +212,8 @@ jobs:
- name: Run instruction check - r5900_trunc_cvt
run: ./build/tests/c/instruction_checks/r5900_trunc_cvt.elf
instruction_checks_r5900_vcallms:
name: Test - instruction_checks_r5900_vcallms
instruction_checks_r5900_disasm:
name: Test - instruction_checks_r5900_disasm
needs: [build_repo]
runs-on: ubuntu-latest
@ -230,5 +230,5 @@ jobs:
- name: Make tests executable
run: chmod --recursive +x build/
- name: Run instruction check - r5900_vcallms
run: ./build/tests/c/instruction_checks/r5900_vcallms.elf
- name: Run instruction check - r5900_disasm
run: ./build/tests/c/instruction_checks/r5900_disasm.elf

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@ -7,6 +7,16 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
## [Unreleased]
## [1.11.2] - 2024-07-16
### Added
- Implement the `rfe` ("Restore From Exception") instruction.
### Fixed
- Fix `pmfhl`, `pmthl`, `vilwr` and `viswr` missing the `.fmt` specifier.
## [1.11.1] - 2024-07-12
### Added
@ -633,6 +643,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- First version
[unreleased]: https://github.com/Decompollaborate/rabbitizer/compare/master...develop
[1.11.2]: https://github.com/Decompollaborate/rabbitizer/compare/1.11.1...1.11.2
[1.11.1]: https://github.com/Decompollaborate/rabbitizer/compare/1.11.0...1.11.1
[1.11.0]: https://github.com/Decompollaborate/rabbitizer/compare/1.10.0...1.11.0
[1.10.0]: https://github.com/Decompollaborate/rabbitizer/compare/1.9.5...1.10.0

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@ -4,12 +4,11 @@
[package]
name = "rabbitizer"
# Version should be synced with include/common/RabbitizerVersion.h
version = "1.11.1"
version = "1.11.2"
edition = "2021"
authors = ["Anghelo Carvajal <angheloalf95@gmail.com>"]
description = "MIPS instruction decoder"
readme = "README.md"
homepage = "https://github.com/Decompollaborate/rabbitizer"
repository = "https://github.com/Decompollaborate/rabbitizer"
license-file = "LICENSE"
keywords = ["MIPS", "decoder"]

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@ -69,7 +69,7 @@ If you use a `requirements.txt` file in your repository, then you can add this
library with the following line:
```txt
rabbitizer>=1.11.1,<2.0.0
rabbitizer>=1.11.2,<2.0.0
```
### Development version
@ -109,7 +109,7 @@ cargo add rabbitizer
Or you can add it manually to your `Cargo.toml`:
```toml
rabbitizer = "1.11.1"
rabbitizer = "1.11.2"
```
See this crate at <https://crates.io/crates/rabbitizer>.
@ -120,6 +120,7 @@ See this crate at <https://crates.io/crates/rabbitizer>.
- MIPS IV Instruction Set (Revision 3.2): <https://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf>
- MIPS Calling Convention Summary: <https://courses.cs.washington.edu/courses/cse410/09sp/examples/MIPSCallingConventionsSummary.pdf>
- mipt-mips pseudo instructions: <https://github.com/MIPT-ILab/mipt-mips/wiki/MIPS-pseudo-instructions>
- IDT R30xx Family Software Reference Manual, page 325 (for `rfe`): <https://psx.arthus.net/docs/R3000.pdf>
- N64's RSP (Reality Signal Processor):
- Nintendo Ultra64 RSP Programmers Guide: <https://ultra64.ca/files/documentation/silicon-graphics/SGI_Nintendo_64_RSP_Programmers_Guide.pdf>

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@ -95,14 +95,18 @@ enum class IdType {
R5900_COP1,
R5900_COP1_FPUS,
R5900_COP2,
R5900_COP2_NOHIGHBIT,
R5900_COP2_BC2,
R5900_COP2_SPECIAL1,
R5900_COP2_SPECIAL2,
R5900_COP2_VIWR,
R5900_MMI,
R5900_MMI_0,
R5900_MMI_1,
R5900_MMI_2,
R5900_MMI_3,
R5900_MMI_PMFHL,
R5900_MMI_PMTHL,
ALL_MAX,
};

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@ -138,6 +138,7 @@ enum class OperandType {
r5900_vis_postincr,
r5900_vit_postincr,
r5900_vid_postincr,
r5900_vis_parenthesis,
r5900_immediate5,
r5900_immediate15,
ALL_MAX,

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@ -154,6 +154,7 @@ enum class UniqueId {
cpu_tlbwi,
cpu_tlbwr,
cpu_tlbp,
cpu_rfe,
cpu_eret,
cpu_mfc1,
cpu_dmfc1,
@ -798,8 +799,6 @@ enum class UniqueId {
r5900_divu1,
r5900_madd1,
r5900_maddu1,
r5900_pmfhl,
r5900_pmthl,
r5900_psllh,
r5900_psrlh,
r5900_psrah,
@ -884,6 +883,12 @@ enum class UniqueId {
r5900_pexch,
r5900_pcpyh,
r5900_pexcw,
r5900_pmfhl_lw,
r5900_pmfhl_uw,
r5900_pmfhl_slw,
r5900_pmfhl_lh,
r5900_pmfhl_sh,
r5900_pmthl_lw,
r5900_ei,
r5900_di,
r5900_c1__sqrt_s,
@ -1021,12 +1026,18 @@ enum class UniqueId {
r5900_vwaitq,
r5900_vmtir,
r5900_vmfir,
r5900_vilwr,
r5900_viswr,
r5900_vrnext,
r5900_vrget,
r5900_vrinit,
r5900_vrxor,
r5900_vilwr_w,
r5900_vilwr_z,
r5900_vilwr_y,
r5900_vilwr_x,
r5900_viswr_w,
r5900_viswr_z,
r5900_viswr_y,
r5900_viswr_x,
r5900_USERDEF_00,
r5900_USERDEF_01,
r5900_USERDEF_02,

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@ -14,7 +14,7 @@ extern "C" {
// Header version
#define RAB_VERSION_MAJOR 1
#define RAB_VERSION_MINOR 11
#define RAB_VERSION_PATCH 1
#define RAB_VERSION_PATCH 2
#define RAB_VERSION_STR RAB_STRINGIFY(RAB_VERSION_MAJOR) "." RAB_STRINGIFY(RAB_VERSION_MINOR) "." RAB_STRINGIFY(RAB_VERSION_PATCH)

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@ -154,6 +154,7 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = {
[RABBITIZER_INSTR_ID_cpu_tlbwi] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .notEmittedByCompilers=true },
[RABBITIZER_INSTR_ID_cpu_tlbwr] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN },
[RABBITIZER_INSTR_ID_cpu_tlbp] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .notEmittedByCompilers=true },
[RABBITIZER_INSTR_ID_cpu_rfe] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .notEmittedByCompilers=true },
[RABBITIZER_INSTR_ID_cpu_eret] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .notEmittedByCompilers=true },
[RABBITIZER_INSTR_ID_cpu_mfc1] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_fs}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isFloat=true, .modifiesRt=true, .readsFs=true },
[RABBITIZER_INSTR_ID_cpu_dmfc1] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_fs}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isFloat=true, .modifiesRt=true, .readsFs=true },
@ -798,8 +799,6 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = {
[RABBITIZER_INSTR_ID_r5900_divu1] = { .operands={RAB_OPERAND_cpu_zero, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .readsRs=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_madd1] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .modifiesRd=true, .readsRs=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_maddu1] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .modifiesRd=true, .readsRs=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmthl] = { .operands={RAB_OPERAND_cpu_rs}, .readsRs=true },
[RABBITIZER_INSTR_ID_r5900_psllh] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, .modifiesRd=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_psrlh] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, .modifiesRd=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_psrah] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, .modifiesRd=true, .readsRt=true },
@ -884,6 +883,12 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = {
[RABBITIZER_INSTR_ID_r5900_pexch] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .modifiesRd=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_pcpyh] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .modifiesRd=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_pexcw] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .modifiesRd=true, .readsRt=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl_lw] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl_uw] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl_slw] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl_lh] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmfhl_sh] = { .operands={RAB_OPERAND_cpu_rd}, .modifiesRd=true },
[RABBITIZER_INSTR_ID_r5900_pmthl_lw] = { .operands={RAB_OPERAND_cpu_rs}, .readsRs=true },
[RABBITIZER_INSTR_ID_r5900_ei] = { .operands={0} },
[RABBITIZER_INSTR_ID_r5900_di] = { .operands={0} },
[RABBITIZER_INSTR_ID_r5900_c1__sqrt_s] = { .operands={RAB_OPERAND_cpu_copraw} },
@ -1021,12 +1026,18 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = {
[RABBITIZER_INSTR_ID_r5900_vwaitq] = { .operands={0} },
[RABBITIZER_INSTR_ID_r5900_vmtir] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vfsl} },
[RABBITIZER_INSTR_ID_r5900_vmfir] = { .operands={RAB_OPERAND_r5900_vftxyzw, RAB_OPERAND_r5900_vis}, .instrSuffix=RABINSTRSUFFIX_R5900_xyzw, .isFloat=true },
[RABBITIZER_INSTR_ID_r5900_vilwr] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_viswr] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis}, .isFloat=true, .doesDereference=true, .doesStore=true },
[RABBITIZER_INSTR_ID_r5900_vrnext] = { .operands={RAB_OPERAND_r5900_vftxyzw, RAB_OPERAND_r5900_R}, .instrSuffix=RABINSTRSUFFIX_R5900_xyzw, .isFloat=true },
[RABBITIZER_INSTR_ID_r5900_vrget] = { .operands={RAB_OPERAND_r5900_vftxyzw, RAB_OPERAND_r5900_R}, .instrSuffix=RABINSTRSUFFIX_R5900_xyzw, .isFloat=true },
[RABBITIZER_INSTR_ID_r5900_vrinit] = { .operands={RAB_OPERAND_r5900_R, RAB_OPERAND_r5900_vfsl} },
[RABBITIZER_INSTR_ID_r5900_vrxor] = { .operands={RAB_OPERAND_r5900_R, RAB_OPERAND_r5900_vfsl} },
[RABBITIZER_INSTR_ID_r5900_vilwr_w] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_vilwr_z] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_vilwr_y] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_vilwr_x] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_viswr_w] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_viswr_z] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_viswr_y] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_viswr_x] = { .operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis}, .isFloat=true, .doesDereference=true, .doesLoad=true },
[RABBITIZER_INSTR_ID_r5900_USERDEF_00] = { .operands={0} },
[RABBITIZER_INSTR_ID_r5900_USERDEF_01] = { .operands={0} },
[RABBITIZER_INSTR_ID_r5900_USERDEF_02] = { .operands={0} },

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@ -95,14 +95,18 @@ const char *RabInstrIdType_Names[] = {
[RAB_INSTR_ID_TYPE_R5900_COP1] = "R5900" "_" "COP1",
[RAB_INSTR_ID_TYPE_R5900_COP1_FPUS] = "R5900" "_" "COP1_FPUS",
[RAB_INSTR_ID_TYPE_R5900_COP2] = "R5900" "_" "COP2",
[RAB_INSTR_ID_TYPE_R5900_COP2_NOHIGHBIT] = "R5900" "_" "COP2_NOHIGHBIT",
[RAB_INSTR_ID_TYPE_R5900_COP2_BC2] = "R5900" "_" "COP2_BC2",
[RAB_INSTR_ID_TYPE_R5900_COP2_SPECIAL1] = "R5900" "_" "COP2_SPECIAL1",
[RAB_INSTR_ID_TYPE_R5900_COP2_SPECIAL2] = "R5900" "_" "COP2_SPECIAL2",
[RAB_INSTR_ID_TYPE_R5900_COP2_VIWR] = "R5900" "_" "COP2_VIWR",
[RAB_INSTR_ID_TYPE_R5900_MMI] = "R5900" "_" "MMI",
[RAB_INSTR_ID_TYPE_R5900_MMI_0] = "R5900" "_" "MMI_0",
[RAB_INSTR_ID_TYPE_R5900_MMI_1] = "R5900" "_" "MMI_1",
[RAB_INSTR_ID_TYPE_R5900_MMI_2] = "R5900" "_" "MMI_2",
[RAB_INSTR_ID_TYPE_R5900_MMI_3] = "R5900" "_" "MMI_3",
[RAB_INSTR_ID_TYPE_R5900_MMI_PMFHL] = "R5900" "_" "MMI_PMFHL",
[RAB_INSTR_ID_TYPE_R5900_MMI_PMTHL] = "R5900" "_" "MMI_PMTHL",
[RAB_INSTR_ID_TYPE_ALL_MAX] = "ALL" "_" "MAX",
};

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@ -95,14 +95,18 @@ typedef enum RabInstrIdType {
RAB_INSTR_ID_TYPE_R5900_COP1,
RAB_INSTR_ID_TYPE_R5900_COP1_FPUS,
RAB_INSTR_ID_TYPE_R5900_COP2,
RAB_INSTR_ID_TYPE_R5900_COP2_NOHIGHBIT,
RAB_INSTR_ID_TYPE_R5900_COP2_BC2,
RAB_INSTR_ID_TYPE_R5900_COP2_SPECIAL1,
RAB_INSTR_ID_TYPE_R5900_COP2_SPECIAL2,
RAB_INSTR_ID_TYPE_R5900_COP2_VIWR,
RAB_INSTR_ID_TYPE_R5900_MMI,
RAB_INSTR_ID_TYPE_R5900_MMI_0,
RAB_INSTR_ID_TYPE_R5900_MMI_1,
RAB_INSTR_ID_TYPE_R5900_MMI_2,
RAB_INSTR_ID_TYPE_R5900_MMI_3,
RAB_INSTR_ID_TYPE_R5900_MMI_PMFHL,
RAB_INSTR_ID_TYPE_R5900_MMI_PMTHL,
RAB_INSTR_ID_TYPE_ALL_MAX,
} RabInstrIdType;

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@ -154,6 +154,7 @@ const char *RabbitizerInstrId_Names[] = {
[RABBITIZER_INSTR_ID_cpu_tlbwi] = "tlbwi",
[RABBITIZER_INSTR_ID_cpu_tlbwr] = "tlbwr",
[RABBITIZER_INSTR_ID_cpu_tlbp] = "tlbp",
[RABBITIZER_INSTR_ID_cpu_rfe] = "rfe",
[RABBITIZER_INSTR_ID_cpu_eret] = "eret",
[RABBITIZER_INSTR_ID_cpu_mfc1] = "mfc1",
[RABBITIZER_INSTR_ID_cpu_dmfc1] = "dmfc1",
@ -798,8 +799,6 @@ const char *RabbitizerInstrId_Names[] = {
[RABBITIZER_INSTR_ID_r5900_divu1] = "divu1",
[RABBITIZER_INSTR_ID_r5900_madd1] = "madd1",
[RABBITIZER_INSTR_ID_r5900_maddu1] = "maddu1",
[RABBITIZER_INSTR_ID_r5900_pmfhl] = "pmfhl",
[RABBITIZER_INSTR_ID_r5900_pmthl] = "pmthl",
[RABBITIZER_INSTR_ID_r5900_psllh] = "psllh",
[RABBITIZER_INSTR_ID_r5900_psrlh] = "psrlh",
[RABBITIZER_INSTR_ID_r5900_psrah] = "psrah",
@ -884,6 +883,12 @@ const char *RabbitizerInstrId_Names[] = {
[RABBITIZER_INSTR_ID_r5900_pexch] = "pexch",
[RABBITIZER_INSTR_ID_r5900_pcpyh] = "pcpyh",
[RABBITIZER_INSTR_ID_r5900_pexcw] = "pexcw",
[RABBITIZER_INSTR_ID_r5900_pmfhl_lw] = "pmfhl.lw",
[RABBITIZER_INSTR_ID_r5900_pmfhl_uw] = "pmfhl.uw",
[RABBITIZER_INSTR_ID_r5900_pmfhl_slw] = "pmfhl.slw",
[RABBITIZER_INSTR_ID_r5900_pmfhl_lh] = "pmfhl.lh",
[RABBITIZER_INSTR_ID_r5900_pmfhl_sh] = "pmfhl.sh",
[RABBITIZER_INSTR_ID_r5900_pmthl_lw] = "pmthl.lw",
[RABBITIZER_INSTR_ID_r5900_ei] = "ei",
[RABBITIZER_INSTR_ID_r5900_di] = "di",
[RABBITIZER_INSTR_ID_r5900_c1__sqrt_s] = "c1",
@ -1021,12 +1026,18 @@ const char *RabbitizerInstrId_Names[] = {
[RABBITIZER_INSTR_ID_r5900_vwaitq] = "vwaitq",
[RABBITIZER_INSTR_ID_r5900_vmtir] = "vmtir",
[RABBITIZER_INSTR_ID_r5900_vmfir] = "vmfir",
[RABBITIZER_INSTR_ID_r5900_vilwr] = "vilwr",
[RABBITIZER_INSTR_ID_r5900_viswr] = "viswr",
[RABBITIZER_INSTR_ID_r5900_vrnext] = "vrnext",
[RABBITIZER_INSTR_ID_r5900_vrget] = "vrget",
[RABBITIZER_INSTR_ID_r5900_vrinit] = "vrinit",
[RABBITIZER_INSTR_ID_r5900_vrxor] = "vrxor",
[RABBITIZER_INSTR_ID_r5900_vilwr_w] = "vilwr.w",
[RABBITIZER_INSTR_ID_r5900_vilwr_z] = "vilwr.z",
[RABBITIZER_INSTR_ID_r5900_vilwr_y] = "vilwr.y",
[RABBITIZER_INSTR_ID_r5900_vilwr_x] = "vilwr.x",
[RABBITIZER_INSTR_ID_r5900_viswr_w] = "viswr.w",
[RABBITIZER_INSTR_ID_r5900_viswr_z] = "viswr.z",
[RABBITIZER_INSTR_ID_r5900_viswr_y] = "viswr.y",
[RABBITIZER_INSTR_ID_r5900_viswr_x] = "viswr.x",
[RABBITIZER_INSTR_ID_r5900_USERDEF_00] = "USERDEF_00",
[RABBITIZER_INSTR_ID_r5900_USERDEF_01] = "USERDEF_01",
[RABBITIZER_INSTR_ID_r5900_USERDEF_02] = "USERDEF_02",

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@ -154,6 +154,7 @@ typedef enum RabbitizerInstrId {
RABBITIZER_INSTR_ID_cpu_tlbwi,
RABBITIZER_INSTR_ID_cpu_tlbwr,
RABBITIZER_INSTR_ID_cpu_tlbp,
RABBITIZER_INSTR_ID_cpu_rfe,
RABBITIZER_INSTR_ID_cpu_eret,
RABBITIZER_INSTR_ID_cpu_mfc1,
RABBITIZER_INSTR_ID_cpu_dmfc1,
@ -798,8 +799,6 @@ typedef enum RabbitizerInstrId {
RABBITIZER_INSTR_ID_r5900_divu1,
RABBITIZER_INSTR_ID_r5900_madd1,
RABBITIZER_INSTR_ID_r5900_maddu1,
RABBITIZER_INSTR_ID_r5900_pmfhl,
RABBITIZER_INSTR_ID_r5900_pmthl,
RABBITIZER_INSTR_ID_r5900_psllh,
RABBITIZER_INSTR_ID_r5900_psrlh,
RABBITIZER_INSTR_ID_r5900_psrah,
@ -884,6 +883,12 @@ typedef enum RabbitizerInstrId {
RABBITIZER_INSTR_ID_r5900_pexch,
RABBITIZER_INSTR_ID_r5900_pcpyh,
RABBITIZER_INSTR_ID_r5900_pexcw,
RABBITIZER_INSTR_ID_r5900_pmfhl_lw,
RABBITIZER_INSTR_ID_r5900_pmfhl_uw,
RABBITIZER_INSTR_ID_r5900_pmfhl_slw,
RABBITIZER_INSTR_ID_r5900_pmfhl_lh,
RABBITIZER_INSTR_ID_r5900_pmfhl_sh,
RABBITIZER_INSTR_ID_r5900_pmthl_lw,
RABBITIZER_INSTR_ID_r5900_ei,
RABBITIZER_INSTR_ID_r5900_di,
RABBITIZER_INSTR_ID_r5900_c1__sqrt_s,
@ -1021,12 +1026,18 @@ typedef enum RabbitizerInstrId {
RABBITIZER_INSTR_ID_r5900_vwaitq,
RABBITIZER_INSTR_ID_r5900_vmtir,
RABBITIZER_INSTR_ID_r5900_vmfir,
RABBITIZER_INSTR_ID_r5900_vilwr,
RABBITIZER_INSTR_ID_r5900_viswr,
RABBITIZER_INSTR_ID_r5900_vrnext,
RABBITIZER_INSTR_ID_r5900_vrget,
RABBITIZER_INSTR_ID_r5900_vrinit,
RABBITIZER_INSTR_ID_r5900_vrxor,
RABBITIZER_INSTR_ID_r5900_vilwr_w,
RABBITIZER_INSTR_ID_r5900_vilwr_z,
RABBITIZER_INSTR_ID_r5900_vilwr_y,
RABBITIZER_INSTR_ID_r5900_vilwr_x,
RABBITIZER_INSTR_ID_r5900_viswr_w,
RABBITIZER_INSTR_ID_r5900_viswr_z,
RABBITIZER_INSTR_ID_r5900_viswr_y,
RABBITIZER_INSTR_ID_r5900_viswr_x,
RABBITIZER_INSTR_ID_r5900_USERDEF_00,
RABBITIZER_INSTR_ID_r5900_USERDEF_01,
RABBITIZER_INSTR_ID_r5900_USERDEF_02,

View File

@ -138,6 +138,7 @@ typedef enum RabbitizerOperandType {
RAB_OPERAND_r5900_vis_postincr,
RAB_OPERAND_r5900_vit_postincr,
RAB_OPERAND_r5900_vid_postincr,
RAB_OPERAND_r5900_vis_parenthesis,
RAB_OPERAND_r5900_immediate5,
RAB_OPERAND_r5900_immediate15,
RAB_OPERAND_ALL_MAX,

View File

@ -136,6 +136,7 @@
size_t RabbitizerOperandType_process_r5900_vis_postincr (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);
size_t RabbitizerOperandType_process_r5900_vit_postincr (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);
size_t RabbitizerOperandType_process_r5900_vid_postincr (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);
size_t RabbitizerOperandType_process_r5900_vis_parenthesis (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);
size_t RabbitizerOperandType_process_r5900_immediate5 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);
size_t RabbitizerOperandType_process_r5900_immediate15 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength);

View File

@ -137,6 +137,7 @@ const OperandCallback instrOpercandCallbacks[] = {
[RAB_OPERAND_r5900_vis_postincr] = RabbitizerOperandType_process_r5900_vis_postincr,
[RAB_OPERAND_r5900_vit_postincr] = RabbitizerOperandType_process_r5900_vit_postincr,
[RAB_OPERAND_r5900_vid_postincr] = RabbitizerOperandType_process_r5900_vid_postincr,
[RAB_OPERAND_r5900_vis_parenthesis] = RabbitizerOperandType_process_r5900_vis_parenthesis,
[RAB_OPERAND_r5900_immediate5] = RabbitizerOperandType_process_r5900_immediate5,
[RAB_OPERAND_r5900_immediate15] = RabbitizerOperandType_process_r5900_immediate15,
};

View File

@ -12,8 +12,12 @@ extern "C" {
#endif
#define RAB_INSTR_R5900_GET_cop2_highbit(self) (SHIFTR((self)->word, 25, 1))
#define RAB_INSTR_R5900_GET_cop2_nohighbit_fmt(self) (SHIFTR((self)->word, 21, 4))
#define RAB_INSTR_R5900_GET_mmi_function(self) (SHIFTR((self)->word, 6, 5))
#define RAB_INSTR_R5900_GET_fhi_flo(self) ((SHIFTR((self)->word, 6, 5) << 2) | SHIFTR((self)->word, 0, 2))
#define RAB_INSTR_R5900_GET_viwr_fhilo(self) ((SHIFTR((self)->word, 21, 4) << 2) | SHIFTR((self)->word, 0, 2))
#define RAB_INSTR_R5900_GET_vfs(self) (SHIFTR((self)->word, 11, 5))
#define RAB_INSTR_R5900_GET_vft(self) (SHIFTR((self)->word, 16, 5))
@ -35,8 +39,12 @@ extern "C" {
#define RAB_INSTR_R5900_GET_imm15(self) (SHIFTR((self)->word, 6, 15))
#define RAB_INSTR_R5900_PACK_cop2_highbit(word, value) (BITREPACK((word), (value), 25, 1))
#define RAB_INSTR_R5900_PACK_cop2_nohighbit_fmt(word, value) (BITREPACK((word), (value), 21, 4))
#define RAB_INSTR_R5900_PACK_mmi_function(word, value) (BITREPACK((word), (value), 6, 5))
#define RAB_INSTR_R5900_PACK_fhi_flo(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 6, 5), (value), 0, 2))
#define RAB_INSTR_R5900_PACK_viwr_fhilo(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 21, 4), (value), 0, 2))
#define RAB_INSTR_R5900_PACK_vfs(word, value) (BITREPACK((word), (value), 11, 5))
#define RAB_INSTR_R5900_PACK_vft(word, value) (BITREPACK((word), (value), 16, 5))

View File

@ -4,7 +4,7 @@
[project]
name = "rabbitizer"
# Version should be synced with include/common/RabbitizerVersion.h
version = "1.11.1"
version = "1.11.2"
description = "MIPS instruction decoder"
# license = "MIT"
readme = "README.md"

19
rabbitizer/InstrId.pyi generated
View File

@ -155,6 +155,7 @@ class InstrId:
cpu_tlbwi: Enum
cpu_tlbwr: Enum
cpu_tlbp: Enum
cpu_rfe: Enum
cpu_eret: Enum
cpu_mfc1: Enum
cpu_dmfc1: Enum
@ -719,8 +720,6 @@ class InstrId:
r5900_divu1: Enum
r5900_madd1: Enum
r5900_maddu1: Enum
r5900_pmfhl: Enum
r5900_pmthl: Enum
r5900_psllh: Enum
r5900_psrlh: Enum
r5900_psrah: Enum
@ -805,6 +804,12 @@ class InstrId:
r5900_pexch: Enum
r5900_pcpyh: Enum
r5900_pexcw: Enum
r5900_pmfhl_lw: Enum
r5900_pmfhl_uw: Enum
r5900_pmfhl_slw: Enum
r5900_pmfhl_lh: Enum
r5900_pmfhl_sh: Enum
r5900_pmthl_lw: Enum
r5900_ei: Enum
r5900_di: Enum
r5900_c1__sqrt_s: Enum
@ -942,11 +947,17 @@ class InstrId:
r5900_vwaitq: Enum
r5900_vmtir: Enum
r5900_vmfir: Enum
r5900_vilwr: Enum
r5900_viswr: Enum
r5900_vrnext: Enum
r5900_vrget: Enum
r5900_vrinit: Enum
r5900_vrxor: Enum
r5900_vilwr_w: Enum
r5900_vilwr_z: Enum
r5900_vilwr_y: Enum
r5900_vilwr_x: Enum
r5900_viswr_w: Enum
r5900_viswr_z: Enum
r5900_viswr_y: Enum
r5900_viswr_x: Enum
r5900_MAX: Enum
ALL_MAX: Enum

View File

@ -96,12 +96,16 @@ class InstrIdType:
R5900_COP1: Enum
R5900_COP1_FPUS: Enum
R5900_COP2: Enum
R5900_COP2_NOHIGHBIT: Enum
R5900_COP2_BC2: Enum
R5900_COP2_SPECIAL1: Enum
R5900_COP2_SPECIAL2: Enum
R5900_COP2_VIWR: Enum
R5900_MMI: Enum
R5900_MMI_0: Enum
R5900_MMI_1: Enum
R5900_MMI_2: Enum
R5900_MMI_3: Enum
R5900_MMI_PMFHL: Enum
R5900_MMI_PMTHL: Enum
ALL_MAX: Enum

View File

@ -139,6 +139,7 @@ class OperandType:
r5900_vis_postincr: Enum
r5900_vit_postincr: Enum
r5900_vid_postincr: Enum
r5900_vis_parenthesis: Enum
r5900_immediate5: Enum
r5900_immediate15: Enum
ALL_MAX: Enum

View File

@ -154,6 +154,7 @@ pub enum InstrId {
cpu_tlbwi,
cpu_tlbwr,
cpu_tlbp,
cpu_rfe,
cpu_eret,
cpu_mfc1,
cpu_dmfc1,
@ -798,8 +799,6 @@ pub enum InstrId {
r5900_divu1,
r5900_madd1,
r5900_maddu1,
r5900_pmfhl,
r5900_pmthl,
r5900_psllh,
r5900_psrlh,
r5900_psrah,
@ -884,6 +883,12 @@ pub enum InstrId {
r5900_pexch,
r5900_pcpyh,
r5900_pexcw,
r5900_pmfhl_lw,
r5900_pmfhl_uw,
r5900_pmfhl_slw,
r5900_pmfhl_lh,
r5900_pmfhl_sh,
r5900_pmthl_lw,
r5900_ei,
r5900_di,
r5900_c1__sqrt_s,
@ -1021,12 +1026,18 @@ pub enum InstrId {
r5900_vwaitq,
r5900_vmtir,
r5900_vmfir,
r5900_vilwr,
r5900_viswr,
r5900_vrnext,
r5900_vrget,
r5900_vrinit,
r5900_vrxor,
r5900_vilwr_w,
r5900_vilwr_z,
r5900_vilwr_y,
r5900_vilwr_x,
r5900_viswr_w,
r5900_viswr_z,
r5900_viswr_y,
r5900_viswr_x,
r5900_USERDEF_00,
r5900_USERDEF_01,
r5900_USERDEF_02,

View File

@ -95,13 +95,17 @@ pub enum InstrIdType {
R5900_COP1,
R5900_COP1_FPUS,
R5900_COP2,
R5900_COP2_NOHIGHBIT,
R5900_COP2_BC2,
R5900_COP2_SPECIAL1,
R5900_COP2_SPECIAL2,
R5900_COP2_VIWR,
R5900_MMI,
R5900_MMI_0,
R5900_MMI_1,
R5900_MMI_2,
R5900_MMI_3,
R5900_MMI_PMFHL,
R5900_MMI_PMTHL,
ALL_MAX,
}

View File

@ -138,6 +138,7 @@ pub enum OperandType {
r5900_vis_postincr,
r5900_vit_postincr,
r5900_vid_postincr,
r5900_vis_parenthesis,
r5900_immediate5,
r5900_immediate15,
ALL_MAX,

View File

@ -573,6 +573,9 @@ bool RabbitizerInstrDescriptor_hasOperandAlias(const RabbitizerInstrDescriptor *
if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r5900_vis_postincr)) {
return true;
}
if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r5900_vis_parenthesis)) {
return true;
}
break;
case RAB_OPERAND_r5900_vit:
@ -629,6 +632,12 @@ bool RabbitizerInstrDescriptor_hasOperandAlias(const RabbitizerInstrDescriptor *
}
break;
case RAB_OPERAND_r5900_vis_parenthesis:
if (RabbitizerInstrDescriptor_hasOperandAlias(self, RAB_OPERAND_r5900_vis)) {
return true;
}
break;
case RAB_OPERAND_r5900_immediate5:
break;

View File

@ -637,6 +637,10 @@ void RabbitizerInstruction_blankOut(RabbitizerInstruction *self) {
self->word = RAB_INSTR_R5900_PACK_vid(self->word, 0);
break;
case RAB_OPERAND_r5900_vis_parenthesis:
self->word = RAB_INSTR_R5900_PACK_vis(self->word, 0);
break;
case RAB_OPERAND_r5900_immediate5:
self->word = RAB_INSTR_R5900_PACK_imm5(self->word, 0);
break;

View File

@ -709,6 +709,10 @@ uint32_t RabbitizerInstruction_getValidBits(const RabbitizerInstruction *self) {
validbits = RAB_INSTR_R5900_PACK_vid(validbits, ~0);
break;
case RAB_OPERAND_r5900_vis_parenthesis:
validbits = RAB_INSTR_R5900_PACK_vis(validbits, ~0);
break;
case RAB_OPERAND_r5900_immediate5:
validbits = RAB_INSTR_R5900_PACK_imm5(validbits, ~0);
break;

View File

@ -487,6 +487,20 @@ size_t RabbitizerOperandType_process_r5900_vid_postincr(const RabbitizerInstruct
return totalSize;
}
size_t RabbitizerOperandType_process_r5900_vis_parenthesis(const RabbitizerInstruction *self, char *dst,
const char *immOverride, size_t immOverrideLength) {
size_t totalSize = 0;
RABUTILS_BUFFER_WRITE_CHAR(dst, totalSize, '(');
RABUTILS_BUFFER_ADVANCE(dst, totalSize,
RabbitizerOperandType_process_r5900_vis(self, dst, immOverride, immOverrideLength));
RABUTILS_BUFFER_WRITE_CHAR(dst, totalSize, ')');
return totalSize;
}
size_t RabbitizerOperandType_process_r5900_immediate5(const RabbitizerInstruction *self, char *dst,
const char *immOverride, size_t immOverrideLength) {
size_t totalSize = 0;

View File

@ -177,6 +177,17 @@ void RabbitizerInstruction_processUniqueId_Coprocessor2_BC2(RabbitizerInstructio
}
}
void RabbitizerInstructionR5900_processUniqueId_Coprocessor2_viwr(RabbitizerInstruction *self) {
uint32_t fhiflo = RAB_INSTR_R5900_GET_viwr_fhilo(self);
self->_mandatorybits = RAB_INSTR_R5900_PACK_viwr_fhilo(self->_mandatorybits, fhiflo);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_COP2_VIWR;
switch (fhiflo) {
#include "tables/instr_id/r5900/r5900_cop2_viwr.inc"
}
}
void RabbitizerInstructionR5900_processUniqueId_Coprocessor2_Special2(RabbitizerInstruction *self) {
uint32_t fhiflo = RAB_INSTR_R5900_GET_fhi_flo(self);
@ -185,6 +196,11 @@ void RabbitizerInstructionR5900_processUniqueId_Coprocessor2_Special2(Rabbitizer
switch (fhiflo) {
#include "tables/instr_id/r5900/r5900_cop2_special2.inc"
case 0x3E:
case 0x3F:
RabbitizerInstructionR5900_processUniqueId_Coprocessor2_viwr(self);
break;
}
}
@ -206,11 +222,11 @@ void RabbitizerInstructionR5900_processUniqueId_Coprocessor2_Special1(Rabbitizer
}
}
void RabbitizerInstructionR5900_processUniqueId_Coprocessor2(RabbitizerInstruction *self) {
uint8_t fmt = RAB_INSTR_GET_fmt(self);
void RabbitizerInstructionR5900_processUniqueId_Coprocessor2_nohighbit(RabbitizerInstruction *self) {
uint8_t fmt = RAB_INSTR_R5900_GET_cop2_nohighbit_fmt(self);
self->_mandatorybits = RAB_INSTR_PACK_fmt(self->_mandatorybits, fmt);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_COP2;
self->_mandatorybits = RAB_INSTR_R5900_PACK_cop2_nohighbit_fmt(self->_mandatorybits, fmt);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_COP2_NOHIGHBIT;
switch (fmt) {
#include "tables/instr_id/r5900/r5900_cop2.inc"
@ -218,23 +234,21 @@ void RabbitizerInstructionR5900_processUniqueId_Coprocessor2(RabbitizerInstructi
case 0x08:
RabbitizerInstruction_processUniqueId_Coprocessor2_BC2(self);
break;
}
}
case 0x10:
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x18:
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
void RabbitizerInstructionR5900_processUniqueId_Coprocessor2(RabbitizerInstruction *self) {
uint8_t fmt = RAB_INSTR_R5900_GET_cop2_highbit(self);
self->_mandatorybits = RAB_INSTR_R5900_PACK_cop2_highbit(self->_mandatorybits, fmt);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_COP2;
switch (fmt) {
case 0x00:
RabbitizerInstructionR5900_processUniqueId_Coprocessor2_nohighbit(self);
break;
case 0x01:
RabbitizerInstructionR5900_processUniqueId_Coprocessor2_Special1(self);
break;
}
@ -286,6 +300,28 @@ void RabbitizerInstructionR5900_processUniqueId_MMI_3(RabbitizerInstruction *sel
}
}
void RabbitizerInstructionR5900_processUniqueId_MMI_PMFHL(RabbitizerInstruction *self) {
uint32_t function = RAB_INSTR_R5900_GET_mmi_function(self);
self->_mandatorybits = RAB_INSTR_R5900_PACK_mmi_function(self->_mandatorybits, function);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_MMI_PMFHL;
switch (function) {
#include "tables/instr_id/r5900/r5900_mmi_pmfhl.inc"
}
}
void RabbitizerInstructionR5900_processUniqueId_MMI_PMTHL(RabbitizerInstruction *self) {
uint32_t function = RAB_INSTR_R5900_GET_mmi_function(self);
self->_mandatorybits = RAB_INSTR_R5900_PACK_mmi_function(self->_mandatorybits, function);
self->instrIdType = RAB_INSTR_ID_TYPE_R5900_MMI_PMTHL;
switch (function) {
#include "tables/instr_id/r5900/r5900_mmi_pmthl.inc"
}
}
void RabbitizerInstructionR5900_processUniqueId_MMI(RabbitizerInstruction *self) {
uint32_t function = RAB_INSTR_GET_function(self);
@ -307,6 +343,13 @@ void RabbitizerInstructionR5900_processUniqueId_MMI(RabbitizerInstruction *self)
case 0x29:
RabbitizerInstructionR5900_processUniqueId_MMI_3(self);
break;
case 0x30:
RabbitizerInstructionR5900_processUniqueId_MMI_PMFHL(self);
break;
case 0x31:
RabbitizerInstructionR5900_processUniqueId_MMI_PMTHL(self);
break;
}
self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId];

View File

@ -16,6 +16,8 @@
#include "r5900/r5900_mmi_1.inc"
#include "r5900/r5900_mmi_2.inc"
#include "r5900/r5900_mmi_3.inc"
#include "r5900/r5900_mmi_pmfhl.inc"
#include "r5900/r5900_mmi_pmthl.inc"
#include "r5900/r5900_cop0_tlb.inc"
@ -25,6 +27,7 @@
#include "r5900/r5900_cop2_bc2.inc"
#include "r5900/r5900_cop2_special1.inc"
#include "r5900/r5900_cop2_special2.inc"
#include "r5900/r5900_cop2_viwr.inc"
#ifndef INSTRID_AVOID_USERDEF
RABBITIZER_DEF_INSTR_ID(

View File

@ -8,7 +8,7 @@
|--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo
000 | --- | TLBR | TLBWI | --- | --- | --- | TLBWR | --- |
001 | TLBP | --- | --- | --- | --- | --- | --- | --- |
010 | --- | --- | --- | --- | --- | --- | --- | --- |
010 | RFE | --- | --- | --- | --- | --- | --- | --- |
011 | ERET | --- | --- | --- | --- | --- | --- | --- |
100 | --- | --- | --- | --- | --- | --- | --- | --- |
101 | --- | --- | --- | --- | --- | --- | --- | --- |
@ -44,6 +44,13 @@
.notEmittedByCompilers=true
) // Probe TLB for Matching Entry
RABBITIZER_DEF_INSTR_ID(
cpu, 0x10, rfe,
.operands={0},
.instrType=RABBITIZER_INSTR_TYPE_UNKNOWN,
.notEmittedByCompilers=true
) // Restore From Exception
RABBITIZER_DEF_INSTR_ID(
cpu, 0x18, eret,
.operands={0},

View File

@ -2,9 +2,9 @@
/* SPDX-License-Identifier: MIT */
/*
31---------26-25-----21-20-----------------------------5--------0
| =COP2 | Special1 | |function|
------6----------5------------------------------------------6----
31-------26-25-----------------------------------------5--------0
| =COP2 |1| |function|
------6-----1-----------------------------------------------6----
|--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo
000 |VADDx |VADDy |VADDz |VADDw |VSUBx |VSUBy |VSUBz |VSUBw |
001 |VMADDx |VMADDy |VMADDz |VMADDw |VMSUBx |VMSUBy |VMSUBz |VMSUBw |

View File

@ -2,12 +2,9 @@
/* SPDX-License-Identifier: MIT */
/*
31---------26-25-----21-20------------------11-10------6-5-2-1--0
| =COP2 | Special2 | | fhi |1111|flo|
------6----------5-----------------------------------------------
Note: opcode is flo | (
fhi * 4
).
31--------26-25----------------------------10------6-5-----2-1--0
| COP2 |1| | fhi |1 1 1 1|flo|
------6------1---------------------------------5--------4-----2--
|--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo
0000 |VADDAx |VADDAy |VADDAz |VADDAw |VSUBAx |VSUBAy |VSUBAz |VSUBAw |
0001 |VMADDAx|VMADDAy|VMADDAz|VMADDAw|VMSUBAx|VMSUBAy|VMSUBAz|VMSUBAw|
@ -16,7 +13,7 @@ Note: opcode is flo | (
0100 |VADDAq |VMADDAq|VADDAi |VMADDAi|VSUBAq |VMSUBAq|VSUBAi |VMSUBAi|
0101 |VADDA |VMADDA |VMULA | --- |VSUBA |VMSUBA |VOPMULA|VNOP |
0110 |VMOVE |VMR32 | --- | --- |VLQI |VSQI |VLQD |VSQD |
0111 |VDIV |VSQRT |VRSQRT |VWAITQ |VMTIR |VMFIR |VILWR |VISWR |
0111 |VDIV |VSQRT |VRSQRT |VWAITQ |VMTIR |VMFIR | *1 | *1 |
1000 |VRNEXT |VRGET |VRINIT |VRXOR | --- | --- | --- | --- |
1001 | --- | --- | --- | --- | --- | --- | --- | --- |
1010 | --- | --- | --- | --- | --- | --- | --- | --- |
@ -26,6 +23,7 @@ Note: opcode is flo | (
1110 | --- | --- | --- | --- | --- | --- | --- | --- |
1111 | --- | --- | --- | --- | --- | --- | --- | --- |
hi |-------|-------|-------|-------|-------|-------|-------|-------|
*1 = VIWR list
*/
// TODO: operands and properties
@ -378,47 +376,6 @@ Note: opcode is flo | (
.isFloat=true
) // Move from integer register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x3E, vilwr,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer load word register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x3F, viswr,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis},
.isFloat=true,
.doesDereference=true,
.doesStore=true
) // Integer store word register
/*
"vilwr.w", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"vilwr.x", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"vilwr.y", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"vilwr.z", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"viswr.w", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"viswr.x", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"viswr.y", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
"viswr.z", RAB_OPERAND_r5900_vit,(
RAB_OPERAND_r5900_vis
)
*/
RABBITIZER_DEF_INSTR_ID(
r5900, 0x40, vrnext,
.operands={RAB_OPERAND_r5900_vftxyzw, RAB_OPERAND_r5900_R},

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@ -0,0 +1,84 @@
/* SPDX-FileCopyrightText: © 2024 Decompollaborate */
/* SPDX-License-Identifier: MIT */
/*
31--------26-25-24--21---------------------10--------------2-1--0
| COP2 |1| fhi | |0 1 1 1 1 1 1 1 1|flo|
------6------1----4--------------------------------9----------2--
|---00--|---01--|---10--|---11--| lo
0000 | --- | --- | --- | --- |
0001 | --- | --- |VILWR.W|VISWR.W|
0010 | --- | --- |VILWR.Z|VISWR.Z|
0011 | --- | --- | --- | --- |
0100 | --- | --- |VILWR.Y|VISWR.Y|
0101 | --- | --- | --- | --- |
0110 | --- | --- | --- | --- |
0111 | --- | --- | --- | --- |
1000 | --- | --- |VILWR.X|VISWR.X|
1001 | --- | --- | --- | --- |
1010 | --- | --- | --- | --- |
1011 | --- | --- | --- | --- |
1100 | --- | --- | --- | --- |
1101 | --- | --- | --- | --- |
1110 | --- | --- | --- | --- |
1111 | --- | --- | --- | --- |
hi |-------|-------|-------|-------|
*/
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x01 << 2) | 0x02, vilwr_w, vilwr.w,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer load word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x02 << 2) | 0x02, vilwr_z, vilwr.z,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer load word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x04 << 2) | 0x02, vilwr_y, vilwr.y,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer load word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x08 << 2) | 0x02, vilwr_x, vilwr.x,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer load word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x01 << 2) | 0x03, viswr_w, viswr.w,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer store word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x02 << 2) | 0x03, viswr_z, viswr.z,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer store word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x04 << 2) | 0x03, viswr_y, viswr.y,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer store word register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, (0x08 << 2) | 0x03, viswr_x, viswr.x,
.operands={RAB_OPERAND_r5900_vit, RAB_OPERAND_r5900_vis_parenthesis},
.isFloat=true,
.doesDereference=true,
.doesLoad=true
) // Integer store word register

View File

@ -12,11 +12,15 @@
011 | MULT1 | MULTU1| DIV1 | DIVU1 | --- | --- | --- | --- |
100 | MADD1 | MADDU1| --- | --- | --- | --- | --- | --- |
101 | *3 | *4 | --- | --- | --- | --- | --- | --- |
110 | PMFHL | PMTHL | --- | --- | PSLLH | --- | PSRLH | PSRAH |
110 | *5 | *6 | --- | --- | PSLLH | --- | PSRLH | PSRAH |
111 | --- | --- | --- | --- | PSLLW | --- | PSRLW | PSRAW |
hi |-------|-------|-------|-------|-------|-------|-------|-------|
*1 = MMI0 list *2 = MMI2 list
*3 = MMI1 list *4 = MMI3 list
*1 = MMI0 list
*2 = MMI2 list
*3 = MMI1 list
*4 = MMI3 list
*5 = PMFHL list
*6 = PMTHL list
*/
RABBITIZER_DEF_INSTR_ID(
@ -103,18 +107,6 @@
.readsRt=true
) // Multiply-ADD Unsigned word pipeline 1
// TODO: check this two instruction, it is supposed to have an extra .fmt
RABBITIZER_DEF_INSTR_ID(
r5900, 0x30, pmfhl,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x31, pmthl,
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Parallel Move To Hi/Lo register
RABBITIZER_DEF_INSTR_ID(
r5900, 0x34, psllh,
.operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa},

View File

@ -0,0 +1,48 @@
/* SPDX-FileCopyrightText: © 2024 Decompollaborate */
/* SPDX-License-Identifier: MIT */
/*
31---------26------------------------------10------6-5----------0
|0 1 1 1 0 0| | fmt |1 1 0 0 0 0|
------6----------------------------------------5----------6------
|-------00------|-------01------|-------10------|-------11------|
000 | PMFHL.LW | PMFHL.UW | PMFHL.SLW | PMFHL.LH |
001 | PMFHL.SH | --- | --- | --- |
010 | --- | --- | --- | --- |
011 | --- | --- | --- | --- |
100 | --- | --- | --- | --- |
101 | --- | --- | --- | --- |
110 | --- | --- | --- | --- |
111 | --- | --- | --- | --- |
hi |---------------|---------------|---------------|---------------|
*/
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x00, pmfhl_lw, pmfhl.lw,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x01, pmfhl_uw, pmfhl.uw,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x02, pmfhl_slw, pmfhl.slw,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x03, pmfhl_lh, pmfhl.lh,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x04, pmfhl_sh, pmfhl.sh,
.operands={RAB_OPERAND_cpu_rd},
.modifiesRd=true
) // Parallel Move From Hi/Lo register

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@ -0,0 +1,24 @@
/* SPDX-FileCopyrightText: © 2024 Decompollaborate */
/* SPDX-License-Identifier: MIT */
/*
31---------26------------------------------10------6-5----------0
|0 1 1 1 0 0| | fmt |1 1 0 0 0 1|
------6----------------------------------------5----------6------
|-------00------|-------01------|-------10------|-------11------|
000 | PMTHL.LW | --- | --- | --- |
001 | --- | --- | --- | --- |
010 | --- | --- | --- | --- |
011 | --- | --- | --- | --- |
100 | --- | --- | --- | --- |
101 | --- | --- | --- | --- |
110 | --- | --- | --- | --- |
111 | --- | --- | --- | --- |
hi |---------------|---------------|---------------|---------------|
*/
RABBITIZER_DEF_INSTR_ID_ALTNAME(
r5900, 0x00, pmthl_lw, pmthl.lw,
.operands={RAB_OPERAND_cpu_rs},
.readsRs=true
) // Parallel Move To Hi/Lo register

View File

@ -16,12 +16,16 @@
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP1_FPUS)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2_NOHIGHBIT)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2_BC2)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2_SPECIAL1)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2_SPECIAL2)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, COP2_VIWR)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_0)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_1)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_2)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_3)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_PMFHL)
RABBITIZER_DEF_INSTR_ID_TYPE(R5900, MMI_PMTHL)

View File

@ -30,5 +30,6 @@
RAB_DEF_OPERAND(r5900, vis_postincr)
RAB_DEF_OPERAND(r5900, vit_postincr)
RAB_DEF_OPERAND(r5900, vid_postincr)
RAB_DEF_OPERAND(r5900, vis_parenthesis)
RAB_DEF_OPERAND(r5900, immediate5)
RAB_DEF_OPERAND(r5900, immediate15)

View File

@ -50,6 +50,8 @@ const TestEntry test_entries[] = {
TEST_ENTRY_C(0x00E41823, NULL, "subu $v1, $a3, $a0"),
TEST_ENTRY_C(0x00041823, NULL, "negu $v1, $a0"),
TEST_ENTRY_C(0x42000010, NULL, "rfe"),
// Invalid instructions
TEST_ENTRY_C(0x44444444, NULL, ".word 0x44444444 # cfc1 $a0, $8 # 00000444 <InstrIdType: CPU_COP1>"),
TEST_ENTRY_C(0x77777777, NULL, ".word 0x77777777 # INVALID $k1, $s7, 0x7777 # 00000000 <InstrIdType: CPU_NORMAL>"),

View File

@ -11,6 +11,7 @@
#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R5900, word, imm, expected,)
// TODO: fill
const TestEntry test_entries[] = {
TEST_ENTRY_C(0x4A000038, NULL, "vcallms 0x0"),
TEST_ENTRY_C(0x4A004038, NULL, "vcallms 0x800"),
@ -23,6 +24,22 @@ const TestEntry test_entries[] = {
TEST_ENTRY_C(0x4A080038, NULL, "vcallms 0x10000"),
TEST_ENTRY_C(0x4A1F8038, NULL, "vcallms 0x3F000"),
TEST_ENTRY_C(0x4A1FFFB8, NULL, "vcallms 0x3FFF0"),
TEST_ENTRY_C(0x70001030, NULL, "pmfhl.lw $v0"),
TEST_ENTRY_C(0x70001070, NULL, "pmfhl.uw $v0"),
TEST_ENTRY_C(0x700010B0, NULL, "pmfhl.slw $v0"),
TEST_ENTRY_C(0x700010F0, NULL, "pmfhl.lh $v0"),
TEST_ENTRY_C(0x70001130, NULL, "pmfhl.sh $v0"),
TEST_ENTRY_C(0x70000031, NULL, "pmthl.lw $zero"),
TEST_ENTRY_C(0x4B020BFE, NULL, "vilwr.x $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A820BFE, NULL, "vilwr.y $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A420BFE, NULL, "vilwr.z $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A220BFE, NULL, "vilwr.w $vi2, ($vi1)"),
TEST_ENTRY_C(0x4B020BFF, NULL, "viswr.x $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A820BFF, NULL, "viswr.y $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A420BFF, NULL, "viswr.z $vi2, ($vi1)"),
TEST_ENTRY_C(0x4A220BFF, NULL, "viswr.w $vi2, ($vi1)"),
};
size_t test_entries_len = ARRAY_COUNT(test_entries);

View File

@ -10,5 +10,5 @@ set -e
./build/tests/c/instruction_checks/r3000gte_disasm.elf
./build/tests/c/instruction_checks/r4000allegrex_disasm.elf
./build/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.elf
./build/tests/c/instruction_checks/r5900_disasm.elf
./build/tests/c/instruction_checks/r5900_trunc_cvt.elf
./build/tests/c/instruction_checks/r5900_vcallms.elf