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https://github.com/raspberrypi/pico-sdk.git
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68571ad33e
* Use reg[0] description for hardware structs register arrays * Update struct headers to match SVD and latest svd2struct
117 lines
3.9 KiB
C
117 lines
3.9 KiB
C
// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
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/*
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _HARDWARE_STRUCTS_RESETS_H
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#define _HARDWARE_STRUCTS_RESETS_H
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#include "hardware/address_mapped.h"
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#include "hardware/regs/resets.h"
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// Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_resets
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//
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// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
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// _REG_(x) will link to the corresponding register in hardware/regs/resets.h.
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//
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// Bit-field descriptions are of the form:
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// BITMASK [BITRANGE]: FIELDNAME (RESETVALUE): DESCRIPTION
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/// \tag::resets_hw[]
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typedef struct {
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_REG_(RESETS_RESET_OFFSET) // RESETS_RESET
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// Reset control
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// 0x01000000 [24] : usbctrl (1)
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// 0x00800000 [23] : uart1 (1)
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// 0x00400000 [22] : uart0 (1)
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// 0x00200000 [21] : timer (1)
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// 0x00100000 [20] : tbman (1)
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// 0x00080000 [19] : sysinfo (1)
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// 0x00040000 [18] : syscfg (1)
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// 0x00020000 [17] : spi1 (1)
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// 0x00010000 [16] : spi0 (1)
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// 0x00008000 [15] : rtc (1)
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// 0x00004000 [14] : pwm (1)
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// 0x00002000 [13] : pll_usb (1)
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// 0x00001000 [12] : pll_sys (1)
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// 0x00000800 [11] : pio1 (1)
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// 0x00000400 [10] : pio0 (1)
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// 0x00000200 [9] : pads_qspi (1)
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// 0x00000100 [8] : pads_bank0 (1)
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// 0x00000080 [7] : jtag (1)
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// 0x00000040 [6] : io_qspi (1)
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// 0x00000020 [5] : io_bank0 (1)
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// 0x00000010 [4] : i2c1 (1)
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// 0x00000008 [3] : i2c0 (1)
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// 0x00000004 [2] : dma (1)
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// 0x00000002 [1] : busctrl (1)
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// 0x00000001 [0] : adc (1)
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io_rw_32 reset;
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_REG_(RESETS_WDSEL_OFFSET) // RESETS_WDSEL
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// Watchdog select
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// 0x01000000 [24] : usbctrl (0)
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// 0x00800000 [23] : uart1 (0)
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// 0x00400000 [22] : uart0 (0)
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// 0x00200000 [21] : timer (0)
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// 0x00100000 [20] : tbman (0)
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// 0x00080000 [19] : sysinfo (0)
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// 0x00040000 [18] : syscfg (0)
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// 0x00020000 [17] : spi1 (0)
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// 0x00010000 [16] : spi0 (0)
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// 0x00008000 [15] : rtc (0)
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// 0x00004000 [14] : pwm (0)
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// 0x00002000 [13] : pll_usb (0)
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// 0x00001000 [12] : pll_sys (0)
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// 0x00000800 [11] : pio1 (0)
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// 0x00000400 [10] : pio0 (0)
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// 0x00000200 [9] : pads_qspi (0)
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// 0x00000100 [8] : pads_bank0 (0)
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// 0x00000080 [7] : jtag (0)
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// 0x00000040 [6] : io_qspi (0)
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// 0x00000020 [5] : io_bank0 (0)
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// 0x00000010 [4] : i2c1 (0)
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// 0x00000008 [3] : i2c0 (0)
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// 0x00000004 [2] : dma (0)
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// 0x00000002 [1] : busctrl (0)
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// 0x00000001 [0] : adc (0)
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io_rw_32 wdsel;
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_REG_(RESETS_RESET_DONE_OFFSET) // RESETS_RESET_DONE
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// Reset done
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// 0x01000000 [24] : usbctrl (0)
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// 0x00800000 [23] : uart1 (0)
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// 0x00400000 [22] : uart0 (0)
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// 0x00200000 [21] : timer (0)
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// 0x00100000 [20] : tbman (0)
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// 0x00080000 [19] : sysinfo (0)
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// 0x00040000 [18] : syscfg (0)
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// 0x00020000 [17] : spi1 (0)
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// 0x00010000 [16] : spi0 (0)
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// 0x00008000 [15] : rtc (0)
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// 0x00004000 [14] : pwm (0)
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// 0x00002000 [13] : pll_usb (0)
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// 0x00001000 [12] : pll_sys (0)
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// 0x00000800 [11] : pio1 (0)
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// 0x00000400 [10] : pio0 (0)
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// 0x00000200 [9] : pads_qspi (0)
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// 0x00000100 [8] : pads_bank0 (0)
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// 0x00000080 [7] : jtag (0)
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// 0x00000040 [6] : io_qspi (0)
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// 0x00000020 [5] : io_bank0 (0)
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// 0x00000010 [4] : i2c1 (0)
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// 0x00000008 [3] : i2c0 (0)
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// 0x00000004 [2] : dma (0)
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// 0x00000002 [1] : busctrl (0)
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// 0x00000001 [0] : adc (0)
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io_ro_32 reset_done;
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} resets_hw_t;
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#define resets_hw ((resets_hw_t *const)RESETS_BASE)
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/// \end::resets_hw[]
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#endif
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