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https://github.com/Mbed-TLS/mbedtls.git
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fix various issues
- Improve some function names - Improve comments - improve readability Signed-off-by: Jerry Yu <jerry.h.yu@arm.com>
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@ -2080,7 +2080,7 @@
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*
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* \warning `MBEDTLS_SHA512_USE_A64_CRYPTO_*` should be disabled when enabled
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*
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* This modules adds support for the AES crypto instructions on Arm64
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* This module adds support for the AES crypto instructions on Arm64
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*/
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#define MBEDTLS_AESCE_C
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@ -1,5 +1,5 @@
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/*
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* Arm64 crypto engine support functions
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* Arm64 crypto extension support functions
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*
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* Copyright The Mbed TLS Contributors
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* SPDX-License-Identifier: Apache-2.0
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@ -70,15 +70,18 @@ static uint8x16_t aesce_encrypt_block(uint8x16_t block,
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int rounds)
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{
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for (int i = 0; i < rounds - 1; i++) {
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/* AES AddRoundKey, SubBytes, ShiftRows (in this order).
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* AddRoundKey adds the round key for the previous round. */
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block = vaeseq_u8(block, vld1q_u8(keys + i * 16));
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/* AES mix columns */
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block = vaesmcq_u8(block);
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}
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/* AES single round encryption */
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/* AES AddRoundKey for the previous round.
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* SubBytes, ShiftRows for the final round. */
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block = vaeseq_u8(block, vld1q_u8(keys + (rounds -1) * 16));
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/* Final Add (bitwise Xor) */
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/* Final round: no MixColumns */
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block = veorq_u8(block, vld1q_u8(keys + rounds * 16));
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return block;
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@ -90,15 +93,28 @@ static uint8x16_t aesce_decrypt_block(uint8x16_t block,
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{
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for (int i = 0; i < rounds - 1; i++) {
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/* AES AddRoundKey, SubBytes, ShiftRows */
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block = vaesdq_u8(block, vld1q_u8(keys + i * 16));
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/* AES inverse mix columns */
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/* AES inverse MixColumns for the next round.
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*
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* This means that we switch the order of the inverse AddRoundKey and
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* inverse MixColumns operations. We have to do this as AddRoundKey is
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* done in an atomic instruction together with the inverses of SubBytes
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* and ShiftRows.
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*
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* It works because MixColumns is a linear operation over GF(2^8) and
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* AddRoundKey is an exclusive or, which is equivalent to addition over
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* GF(2^8). (The inverse of MixColumns needs to be applied to the
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* affected round keys separately which has been done when the
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* decryption round keys were calculated.) */
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block = vaesimcq_u8(block);
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}
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/* AES single round encryption */
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/* The inverses of AES AddRoundKey, SubBytes, ShiftRows finishing up the
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* last full round. */
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block = vaesdq_u8(block, vld1q_u8(keys + (rounds - 1) * 16));
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/* Final Add (bitwise Xor) */
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/* Inverse AddRoundKey for inverting the initial round key addition. */
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block = veorq_u8(block, vld1q_u8(keys + rounds * 16));
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return block;
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@ -147,18 +163,20 @@ void mbedtls_aesce_inverse_key(unsigned char *invkey,
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static uint8_t const rcon[] = { 0x01, 0x02, 0x04, 0x08, 0x10,
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0x20, 0x40, 0x80, 0x1b, 0x36 };
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static inline uint32_t ror32_8(uint32_t word)
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static inline uint32_t aes_rot_word(uint32_t word)
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{
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return (word << (32 - 8)) | (word >> 8);
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}
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static inline uint32_t aes_sub(uint32_t in)
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static inline uint32_t aes_sub_word(uint32_t in)
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{
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uint32x4_t _in = vdupq_n_u32(in);
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uint32x4_t v;
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uint8x16_t v = vreinterpretq_u8_u32(vdupq_n_u32(in));
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uint8x16_t zero = vdupq_n_u8(0);
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v = vreinterpretq_u32_u8(vaeseq_u8(zero, vreinterpretq_u8_u32(_in)));
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return vgetq_lane_u32(v, 0);
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/* vaeseq_u8 does both SubBytes and ShiftRows. Taking the first row yields
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* the correct result as ShiftRows doesn't change the first row. */
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v = vaeseq_u8(zero, v);
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return vgetq_lane_u32(vreinterpretq_u32_u8(v), 0);
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}
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/*
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@ -170,12 +188,13 @@ static void aesce_setkey_enc_128(unsigned char *rk,
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uint32_t *rki;
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uint32_t *rko;
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uint32_t *rk_u32 = (uint32_t *) rk;
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memcpy(rk, key, (128 / 8));
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for (size_t i = 0; i < sizeof(rcon); i++) {
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rki = rk_u32 + i * (128 / 32);
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rko = rki + (128 / 32);
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rko[0] = ror32_8(aes_sub(rki[(128 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[0] = aes_rot_word(aes_sub_word(rki[(128 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[1] = rko[0] ^ rki[1];
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rko[2] = rko[1] ^ rki[2];
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rko[3] = rko[2] ^ rki[3];
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@ -196,7 +215,7 @@ static void aesce_setkey_enc_192(unsigned char *rk,
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for (size_t i = 0; i < 8; i++) {
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rki = rk_u32 + i * (192 / 32);
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rko = rki + (192 / 32);
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rko[0] = ror32_8(aes_sub(rki[(192 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[0] = aes_rot_word(aes_sub_word(rki[(192 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[1] = rko[0] ^ rki[1];
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rko[2] = rko[1] ^ rki[2];
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rko[3] = rko[2] ^ rki[3];
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@ -221,12 +240,12 @@ static void aesce_setkey_enc_256(unsigned char *rk,
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for (size_t i = 0; i < 7; i++) {
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rki = rk_u32 + i * (256 / 32);
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rko = rki + (256 / 32);
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rko[0] = ror32_8(aes_sub(rki[(256 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[0] = aes_rot_word(aes_sub_word(rki[(256 / 32) - 1])) ^ rcon[i] ^ rki[0];
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rko[1] = rko[0] ^ rki[1];
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rko[2] = rko[1] ^ rki[2];
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rko[3] = rko[2] ^ rki[3];
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if (i < 6) {
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rko[4] = aes_sub(rko[3]) ^ rki[4];
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rko[4] = aes_sub_word(rko[3]) ^ rki[4];
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rko[5] = rko[4] ^ rki[5];
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rko[6] = rko[5] ^ rki[6];
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rko[7] = rko[6] ^ rki[7];
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@ -2,7 +2,7 @@
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* \file aesce.h
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*
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* \brief AES-CE for hardware AES acceleration on ARMv8 processors with crypto
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* engine.
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* extension.
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*
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* \warning These functions are only for internal use by other library
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* functions; you must not call them directly.
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@ -43,7 +43,7 @@ extern "C" {
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#endif
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/**
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* \brief Internal function to detect the crypto engine in CPUs.
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* \brief Internal function to detect the crypto extension in CPUs.
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*
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* \return 1 if CPU has support for the feature, 0 otherwise
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*/
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