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cae9044c17
hekate/bootloader
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Kostas Missos cae9044c17 Minerva our DRAM trainer 
Supports up to 1600MHz and periodic training.

For more check here: https://github.com/CTCaer/minerva_tc
2018-11-04 03:15:32 +02:00
..
config Add "Silent" auto full power off option 2018-09-30 13:24:30 -04:00
gfx Bugfixes / formating 2018-09-24 23:22:19 +03:00
hos Allow verification cancel. Backup still remains. 2018-09-24 23:51:04 +03:00
ianos General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
libs Add use of wildcard "*" for loading kips from a folder 2018-09-24 23:47:35 +03:00
mem General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
power General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
sec General bugfixes + hardcoded name replacement 2018-09-18 23:38:54 +03:00
soc Bugfixes / formating 2018-09-24 23:22:19 +03:00
storage Fix all the bugs 2018-08-23 04:37:02 +03:00
utils Add use of wildcard "*" for loading kips from a folder 2018-09-24 23:47:35 +03:00
link.ld Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00
main.c Minerva our DRAM trainer 2018-11-04 03:15:32 +02:00
reloc.S Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00
start.S Refactor ALL the things + enable LTO 2018-08-13 11:58:24 +03:00