CTCaer 913cdee8e8 bdk: sdram: rename 3rd gen t210b01 hynix ram ... Confirmed to be a Hynix H54G46CYRBX267 and not a H9HCNNNBKMMLXR-NEI		2023-12-25 03:02:11 +02:00
..
emc.h	bdk: emc: add temp and feature reporting defines	2023-06-09 10:38:24 +03:00
heap.c	bdk: whitespace refactor	2022-07-11 22:10:11 +03:00
heap.h	bdk: mem: improve emc MRR reading	2022-10-11 03:51:12 +03:00
mc_t210.h	bdk: mem: improve emc MRR reading	2022-10-11 03:51:12 +03:00
mc.c
mc.h
minerva.c	bdk: minerva: do not handle oc freq	2023-08-22 16:44:41 +03:00
minerva.h	bdk: minerva: do not handle oc freq	2023-08-22 16:44:41 +03:00
mtc_table.h
sdram_config_t210b01.inl	bdk: sdram: rename 3rd gen t210b01 hynix ram	2023-12-25 03:02:11 +02:00
sdram_config.inl	bdk: sdram: rename 3rd gen t210b01 hynix ram	2023-12-25 03:02:11 +02:00
sdram_lp0_param_t210.h
sdram_lp0_param_t210b01.h
sdram_lp0.c
sdram_param_t210.h
sdram_param_t210b01.h
sdram.c	bdk: sdram: rename 3rd gen t210b01 hynix ram	2023-12-25 03:02:11 +02:00
sdram.h	bdk: sdram: rename 3rd gen t210b01 hynix ram	2023-12-25 03:02:11 +02:00
smmu.c	bdk: whitespace refactor	2022-07-11 22:10:11 +03:00
smmu.h