mirror of
https://github.com/CTCaer/hekate.git
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395 lines
11 KiB
C
395 lines
11 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "../sec/se.h"
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#include "../mem/heap.h"
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#include "../soc/bpmp.h"
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#include "../soc/t210.h"
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#include "../sec/se_t210.h"
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#include "../utils/util.h"
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typedef struct _se_ll_t
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{
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vu32 num;
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vu32 addr;
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vu32 size;
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} se_ll_t;
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static void _gf256_mul_x(void *block)
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{
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u8 *pdata = (u8 *)block;
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u32 carry = 0;
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for (int i = 0xF; i >= 0; i--)
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{
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u8 b = pdata[i];
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pdata[i] = (b << 1) | carry;
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carry = b >> 7;
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}
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if (carry)
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pdata[0xF] ^= 0x87;
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}
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static void _se_ll_init(se_ll_t *ll, u32 addr, u32 size)
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{
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ll->num = 0;
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ll->addr = addr;
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ll->size = size;
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}
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static void _se_ll_set(se_ll_t *dst, se_ll_t *src)
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{
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SE(SE_IN_LL_ADDR_REG_OFFSET) = (u32)src;
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SE(SE_OUT_LL_ADDR_REG_OFFSET) = (u32)dst;
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}
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static int _se_wait()
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{
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while (!(SE(SE_INT_STATUS_REG_OFFSET) & SE_INT_OP_DONE(INT_SET)))
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;
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if (SE(SE_INT_STATUS_REG_OFFSET) & SE_INT_ERROR(INT_SET) ||
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SE(SE_STATUS_0) & SE_STATUS_0_STATE_WAIT_IN ||
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SE(SE_ERR_STATUS_0) != SE_ERR_STATUS_0_SE_NS_ACCESS_CLEAR)
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return 0;
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return 1;
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}
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static int _se_execute(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
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{
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se_ll_t *ll_dst = NULL, *ll_src = NULL;
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if (dst)
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{
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ll_dst = (se_ll_t *)malloc(sizeof(se_ll_t));
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_se_ll_init(ll_dst, (u32)dst, dst_size);
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}
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if (src)
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{
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ll_src = (se_ll_t *)malloc(sizeof(se_ll_t));
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_se_ll_init(ll_src, (u32)src, src_size);
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}
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_se_ll_set(ll_dst, ll_src);
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SE(SE_ERR_STATUS_0) = SE(SE_ERR_STATUS_0);
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SE(SE_INT_STATUS_REG_OFFSET) = SE(SE_INT_STATUS_REG_OFFSET);
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
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SE(SE_OPERATION_REG_OFFSET) = SE_OPERATION(op);
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int res = _se_wait();
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
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if (src)
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free(ll_src);
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if (dst)
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free(ll_dst);
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return res;
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}
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static int _se_execute_one_block(u32 op, void *dst, u32 dst_size, const void *src, u32 src_size)
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{
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if (!src || !dst)
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return 0;
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u8 *block = (u8 *)malloc(0x10);
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memset(block, 0, 0x10);
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SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
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memcpy(block, src, src_size);
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int res = _se_execute(op, block, 0x10, block, 0x10);
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memcpy(dst, block, dst_size);
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free(block);
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return res;
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}
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static void _se_aes_ctr_set(void *ctr)
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{
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u32 *data = (u32 *)ctr;
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for (u32 i = 0; i < 4; i++)
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SE(SE_CRYPTO_CTR_REG_OFFSET + 4 * i) = data[i];
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}
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void se_rsa_acc_ctrl(u32 rs, u32 flags)
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{
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if (flags & SE_RSA_KEY_TBL_DIS_KEY_ALL_FLAG)
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SE(SE_RSA_KEYTABLE_ACCESS_REG_OFFSET + 4 * rs) =
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((flags >> SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG_SHIFT) & SE_RSA_KEY_TBL_DIS_KEYUSE_FLAG) |
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((flags & SE_RSA_KEY_TBL_DIS_KEY_READ_UPDATE_FLAG) ^ SE_RSA_KEY_TBL_DIS_KEY_ALL_COMMON_FLAG);
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if (flags & SE_RSA_KEY_TBL_DIS_KEY_LOCK_FLAG)
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SE(SE_RSA_KEYTABLE_ACCESS_LOCK_OFFSET) &= ~(1 << rs);
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}
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void se_key_acc_ctrl(u32 ks, u32 flags)
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{
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if (flags & SE_KEY_TBL_DIS_KEY_ACCESS_FLAG)
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SE(SE_KEY_TABLE_ACCESS_REG_OFFSET + 4 * ks) = ~flags;
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if (flags & SE_KEY_TBL_DIS_KEY_LOCK_FLAG)
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SE(SE_KEY_TABLE_ACCESS_LOCK_OFFSET) &= ~(1 << ks);
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}
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void se_aes_key_set(u32 ks, void *key, u32 size)
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{
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u32 *data = (u32 *)key;
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for (u32 i = 0; i < size / 4; i++)
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{
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SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
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SE(SE_KEYTABLE_DATA0_REG_OFFSET) = data[i];
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}
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}
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void se_aes_key_clear(u32 ks)
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{
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for (u32 i = 0; i < TEGRA_SE_AES_MAX_KEY_SIZE / 4; i++)
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{
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SE(SE_KEYTABLE_REG_OFFSET) = SE_KEYTABLE_SLOT(ks) | i;
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SE(SE_KEYTABLE_DATA0_REG_OFFSET) = 0;
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}
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}
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int se_aes_unwrap_key(u32 ks_dst, u32 ks_src, const void *input)
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{
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_KEYTAB);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks_src) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
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SE(SE_BLOCK_COUNT_REG_OFFSET) = 0;
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SE(SE_CRYPTO_KEYTABLE_DST_REG_OFFSET) = SE_CRYPTO_KEYTABLE_DST_KEY_INDEX(ks_dst);
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return _se_execute(OP_START, NULL, 0, input, 0x10);
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}
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int se_aes_crypt_ecb(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size)
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{
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if (enc)
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{
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT);
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}
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else
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{
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_DECRYPT);
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}
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SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
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return _se_execute(OP_START, dst, dst_size, src, src_size);
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}
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int se_aes_crypt_cbc(u32 ks, u32 enc, void *dst, u32 dst_size, const void *src, u32 src_size)
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{
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if (enc)
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{
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_PREVAHB) |
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SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_XOR_POS(XOR_BOTTOM);
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}
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else
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{
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_DEC_ALG(ALG_AES_DEC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_VCTRAM_SEL(VCTRAM_PREVAHB) |
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SE_CRYPTO_CORE_SEL(CORE_DECRYPT) | SE_CRYPTO_XOR_POS(XOR_BOTTOM);
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}
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SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
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return _se_execute(OP_START, dst, dst_size, src, src_size);
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}
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int se_aes_crypt_block_ecb(u32 ks, u32 enc, void *dst, const void *src)
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{
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return se_aes_crypt_ecb(ks, enc, dst, 0x10, src, 0x10);
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}
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int se_aes_crypt_ctr(u32 ks, void *dst, u32 dst_size, const void *src, u32 src_size, void *ctr)
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{
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SE(SE_SPARE_0_REG_OFFSET) = 1;
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(ks) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) |
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SE_CRYPTO_XOR_POS(XOR_BOTTOM) | SE_CRYPTO_INPUT_SEL(INPUT_LNR_CTR) | SE_CRYPTO_CTR_VAL(1);
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_se_aes_ctr_set(ctr);
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u32 src_size_aligned = src_size & 0xFFFFFFF0;
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u32 src_size_delta = src_size & 0xF;
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if (src_size_aligned)
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{
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SE(SE_BLOCK_COUNT_REG_OFFSET) = (src_size >> 4) - 1;
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if (!_se_execute(OP_START, dst, dst_size, src, src_size_aligned))
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return 0;
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}
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if (src_size - src_size_aligned && src_size_aligned < dst_size)
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return _se_execute_one_block(OP_START, dst + src_size_aligned,
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MIN(src_size_delta, dst_size - src_size_aligned),
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src + src_size_aligned, src_size_delta);
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return 1;
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}
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int se_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u64 sec, void *dst, void *src, u32 secsize)
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{
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int res = 0;
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u8 *tweak = (u8 *)malloc(0x10);
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u8 *pdst = (u8 *)dst;
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u8 *psrc = (u8 *)src;
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//Generate tweak.
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for (int i = 0xF; i >= 0; i--)
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{
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tweak[i] = sec & 0xFF;
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sec >>= 8;
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}
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if (!se_aes_crypt_block_ecb(ks1, 1, tweak, tweak))
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goto out;
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//We are assuming a 0x10-aligned sector size in this implementation.
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for (u32 i = 0; i < secsize / 0x10; i++)
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{
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for (u32 j = 0; j < 0x10; j++)
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pdst[j] = psrc[j] ^ tweak[j];
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if (!se_aes_crypt_block_ecb(ks2, enc, pdst, pdst))
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goto out;
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for (u32 j = 0; j < 0x10; j++)
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pdst[j] = pdst[j] ^ tweak[j];
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_gf256_mul_x(tweak);
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psrc += 0x10;
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pdst += 0x10;
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}
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res = 1;
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out:;
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free(tweak);
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return res;
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}
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int se_aes_xts_crypt(u32 ks1, u32 ks2, u32 enc, u64 sec, void *dst, void *src, u32 secsize, u32 num_secs)
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{
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u8 *pdst = (u8 *)dst;
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u8 *psrc = (u8 *)src;
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for (u32 i = 0; i < num_secs; i++)
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if (!se_aes_xts_crypt_sec(ks1, ks2, enc, sec + i, pdst + secsize * i, psrc + secsize * i, secsize))
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return 0;
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return 1;
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}
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int se_calc_sha256(void *dst, const void *src, u32 src_size)
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{
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int res;
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// Setup config for SHA256, size = BITS(src_size).
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_SHA256) | SE_CONFIG_ENC_ALG(ALG_SHA) | SE_CONFIG_DST(DST_HASHREG);
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SE(SE_SHA_CONFIG_REG_OFFSET) = SHA_INIT_HASH;
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SE(SE_SHA_MSG_LENGTH_0_REG_OFFSET) = (u32)(src_size << 3);
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SE(SE_SHA_MSG_LENGTH_1_REG_OFFSET) = 0;
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SE(SE_SHA_MSG_LENGTH_2_REG_OFFSET) = 0;
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SE(SE_SHA_MSG_LENGTH_3_REG_OFFSET) = 0;
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SE(SE_SHA_MSG_LEFT_0_REG_OFFSET) = (u32)(src_size << 3);
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SE(SE_SHA_MSG_LEFT_1_REG_OFFSET) = 0;
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SE(SE_SHA_MSG_LEFT_2_REG_OFFSET) = 0;
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SE(SE_SHA_MSG_LEFT_3_REG_OFFSET) = 0;
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// Trigger the operation.
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res = _se_execute(OP_START, NULL, 0, src, src_size);
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// Copy output hash.
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u32 *dst32 = (u32 *)dst;
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for (u32 i = 0; i < 8; i++)
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dst32[i] = byte_swap_32(SE(SE_HASH_RESULT_REG_OFFSET + (i << 2)));
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return res;
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}
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int se_gen_prng128(void *dst)
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{
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// Setup config for X931 PRNG.
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_MEMORY);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_HASH(HASH_DISABLE) | SE_CRYPTO_XOR_POS(XOR_BYPASS) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
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SE(SE_RNG_CONFIG_REG_OFFSET) = SE_RNG_CONFIG_SRC(RNG_SRC_ENTROPY) | SE_RNG_CONFIG_MODE(RNG_MODE_NORMAL);
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//SE(SE_RNG_SRC_CONFIG_REG_OFFSET) =
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// SE_RNG_SRC_CONFIG_ENT_SRC(RNG_SRC_RO_ENT_ENABLE) | SE_RNG_SRC_CONFIG_ENT_SRC_LOCK(RNG_SRC_RO_ENT_LOCK_ENABLE);
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SE(SE_RNG_RESEED_INTERVAL_REG_OFFSET) = 1;
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SE(SE_BLOCK_COUNT_REG_OFFSET) = (16 >> 4) - 1;
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// Trigger the operation.
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return _se_execute(OP_START, dst, 16, NULL, 0);
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}
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void se_get_aes_keys(u8 *buf, u8 *keys, u32 keysize)
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{
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u8 *aligned_buf = (u8 *)ALIGN((u32)buf, 0x40);
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// Set Secure Random Key.
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_RNG) | SE_CONFIG_DST(DST_SRK);
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SE(SE_CRYPTO_REG_OFFSET) = SE_CRYPTO_KEY_INDEX(0) | SE_CRYPTO_CORE_SEL(CORE_ENCRYPT) | SE_CRYPTO_INPUT_SEL(INPUT_RANDOM);
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SE(SE_RNG_CONFIG_REG_OFFSET) = SE_RNG_CONFIG_SRC(RNG_SRC_ENTROPY) | SE_RNG_CONFIG_MODE(RNG_MODE_FORCE_RESEED);
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SE(SE_CRYPTO_LAST_BLOCK) = 0;
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_se_execute(OP_START, NULL, 0, NULL, 0);
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// Save AES keys.
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SE(SE_CONFIG_REG_OFFSET) = SE_CONFIG_ENC_MODE(MODE_KEY128) | SE_CONFIG_ENC_ALG(ALG_AES_ENC) | SE_CONFIG_DST(DST_MEMORY);
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for (u32 i = 0; i < TEGRA_SE_KEYSLOT_COUNT; i++)
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{
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SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(AES_KEYTABLE) |
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(i << SE_KEY_INDEX_SHIFT) | SE_CONTEXT_SAVE_WORD_QUAD(KEYS_0_3);
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SE(SE_CRYPTO_LAST_BLOCK) = 0;
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_se_execute(OP_CTX_SAVE, aligned_buf, 0x10, NULL, 0);
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memcpy(keys + i * keysize, aligned_buf, 0x10);
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if (keysize > 0x10)
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{
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SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(AES_KEYTABLE) |
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(i << SE_KEY_INDEX_SHIFT) | SE_CONTEXT_SAVE_WORD_QUAD(KEYS_4_7);
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SE(SE_CRYPTO_LAST_BLOCK) = 0;
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_se_execute(OP_CTX_SAVE, aligned_buf, 0x10, NULL, 0);
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memcpy(keys + i * keysize + 0x10, aligned_buf, 0x10);
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}
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}
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// Save SRK to PMC secure scratches.
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SE(SE_CONTEXT_SAVE_CONFIG_REG_OFFSET) = SE_CONTEXT_SAVE_SRC(SRK);
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SE(0x80) = 0; // SE_CRYPTO_LAST_BLOCK
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_se_execute(OP_CTX_SAVE, NULL, 0, NULL, 0);
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// End context save.
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SE(SE_CONFIG_REG_OFFSET) = 0;
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_se_execute(OP_CTX_SAVE, NULL, 0, NULL, 0);
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// Get SRK.
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u32 srk[4];
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srk[0] = PMC(0xC0);
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srk[1] = PMC(0xC4);
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srk[2] = PMC(0x224);
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srk[3] = PMC(0x228);
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// Decrypt context.
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se_aes_key_clear(3);
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se_aes_key_set(3, srk, 0x10);
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se_aes_crypt_cbc(3, 0, keys, TEGRA_SE_KEYSLOT_COUNT * keysize, keys, TEGRA_SE_KEYSLOT_COUNT * keysize);
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se_aes_key_clear(3);
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}
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