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mirror of https://github.com/CTCaer/hekate.git synced 2024-12-26 09:17:21 +00:00
hekate/modules/hekate_libsys_minerva
CTCaer bd1733c4fa minerva: use min 2 divm
Adhere to software based imposed limits for T210.
2023-12-25 04:11:55 +02:00
..
Makefile Update Warnings flags in makefiles 2022-10-11 07:25:21 +03:00
mtc_mc_emc_regs.h
mtc_switch_tables.h lib: minerva: add Samsung 8GB support 2023-06-08 04:50:59 +03:00
mtc_table.h lib: minerva: refactor table 2023-06-08 04:49:16 +03:00
mtc.h lib: minerva: add Samsung 8GB support 2023-06-08 04:50:59 +03:00
README.md
sys_sdrammtc.c minerva: use min 2 divm 2023-12-25 04:11:55 +02:00
types.h minerva: make is_pllmb and fsp automatic 2022-01-16 01:43:16 +02:00

Minerva Training Cell

Custom Nvidia Tegra X1 DRAM trainer.

For more, check Here.

Minerva Training Cell (c) 2018 CTCaer.

/* Pain... And suffering. */