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mirror of https://github.com/CTCaer/hekate.git synced 2024-11-20 05:11:42 +00:00
Commit Graph

52 Commits

Author SHA1 Message Date
CTCaer
9a98c1afb9 bdk: stylistic corrections
And update copyrights
2023-02-11 23:46:38 +02:00
CTCaer
42859a2373 bdk: usb: ums: print errors when sdmmc init fails 2023-02-11 23:16:37 +02:00
CTCaer
5bb9a244ea bdk: utilize new gpio functions 2023-02-11 23:08:32 +02:00
CTCaer
50dd458cfd bdk: ums: use emmc_end instead of sdmmc_storage_end 2022-12-20 16:55:16 +02:00
CTCaer
4d823d5909 bdk: slight refactor 2022-12-19 05:22:55 +02:00
CTCaer
d08fac5a08 bdk: xusb: improve clock deinit
Allows L4T to use XUSB on T210B01 after a UMS usage.
T210 somehow was fine.
2022-10-11 04:07:24 +03:00
CTCaer
801ebd3543 bdk: xusb: fully clear device mode ctrl register on deinit 2022-07-11 22:13:13 +03:00
CTCaer
70523e404f bdk: whitespace refactor 2022-07-11 22:10:11 +03:00
CTCaer
b0c0a86108 bdk: migrate timers/sleeps to timer driver 2022-06-27 10:22:19 +03:00
CTCaer
258a343e21 bdk: usb: support deconfiguration of endpoints
TODO: Signal that to userspace and manage it.
2022-06-14 18:48:21 +03:00
CTCaer
f6c9e636d1 bdk: usb: improve USB2/XUSB power down
TODO: add more power downs on XUSB stack
2022-06-14 18:46:46 +03:00
CTCaer
605f270f98 bdk: usb: fix a race condition in USB2 stack
When RAM is slow (no training), it's possible to have the stack failing to negotiate configuration successfully.

The race condition is caused by not flushing cache before sending a configuration packet reply.
Although, cache is write-through, this needs to happen.
2022-06-14 18:41:33 +03:00
CTCaer
54b054c940 bdk: usb: add Sio support to hid gadget 2022-05-09 06:10:49 +03:00
CTCaer
7c74391754 bdk: bpmp: do not use full maintenance
Instead use proper clean/invalidation of dcache.
2022-02-15 00:14:14 +02:00
CTCaer
ef5790cc2c bdk: mc: always on ahb arbitration
- Removed disables
- SDMMC code now just checks if it has access
2022-01-29 01:29:02 +02:00
CTCaer
960f3b23e7 bdk: ums: adhere to emmc ops changes also 2022-01-20 13:17:55 +02:00
CTCaer
a5cd962f99 bdk: add global header 2022-01-15 23:58:27 +02:00
CTCaer
49bcaf3914 bdk: correct some types and warnings 2021-10-15 16:18:06 +03:00
CTCaer
4b7e1f699d ums/xusb: do not allow multiple CBW requests
On XUSB do not allow multiple requests for CBW to be done.
This avoids an issue with some XHCI controllers and OS combos (e.g. ASMedia and Linux/Mac OS) which confuse that and concatenate an old CBW request with another write request (SCSI Write) and create a babble error (transmit overflow).
2021-08-28 17:09:38 +03:00
CTCaer
134f3dac52 ums: add warn reporting to log status
Some OSes do not adhere to limits reported by UMS gadget to them.
In such cases, make sure that user is notified about their host skipping the checks and sending "illegal" commands.
2021-08-28 17:08:15 +03:00
CTCaer
1afb1a50c3 xusb: update driver
- Better port init/status
- Correct port status report
- Add babble detection and rescue
- Some refactoring
2021-08-28 17:03:49 +03:00
CTCaer
4914ce1d49 usb: add more timeout control for ep1 read/write finish 2021-08-28 17:00:23 +03:00
CTCaer
7181683d8e ums: various fixes
- Immediately exit if offset exceeds num of sectors.
- Correct cmnd type and checks.
- Inform user if ejected unsafely (while medium removal prevention is enabled).
2021-05-11 10:45:17 +03:00
CTCaer
f21f13b15d ums/nyx: reinit sd to update cal trimmers for max perf 2021-03-17 09:12:30 +02:00
CTCaer
9daa14abec ums: Dim backlight and change the maintenance order 2021-01-04 20:12:26 +02:00
CTCaer
b7789f1edb xusb: Increase performance up to 96%
The default interrupt moderation on XUSB controller was causing 4.62ms latency, hurting performance tremendously, especially in smaller usb packets (which are the norm).
This change brings it to parity with USB2 controller.
2020-12-30 13:40:16 +02:00
CTCaer
4949331f4c usb: Rework timeouts
- Rework all timeouts to be more relaxed when doing big data transfers.
- Fix a bug where async transfer would timeout sooner instead of infinite tries.

Both showed up in Arch Linux, because of it's huge latency USB stack latency that can reach 1-2s.

The rework will let every OS work without adding additional wait time in the gadget loops.
2020-12-30 13:37:36 +02:00
CTCaer
2c695e9a96 ums: Refactor errors 2020-12-30 13:29:29 +02:00
CTCaer
0ccea3aa83 usb: Improve UMS ejection heuristic 2020-12-02 01:16:45 +02:00
CTCaer
a1188505e8 usb: Add XUSB support mainly for T210B01 2020-12-02 01:13:52 +02:00
CTCaer
377825d4fb usb gadgets: Replace error status labels with error label and color 2020-11-26 01:58:13 +02:00
CTCaer
b89bb35054 usb: Refactor some variables 2020-11-26 01:55:33 +02:00
CTCaer
caae685fab usb: Add buffer alignment checks
EDCI/EHCI controllers only allow 0x1000 aligned buffers.
So reply with a specific error type instead of a EP xfer error.
2020-11-26 01:54:10 +02:00
CTCaer
bd4517abab usb: Name all controller errors 2020-11-26 01:50:49 +02:00
CTCaer
cabaa6cfb8 Utilize BIT macro everywhere 2020-11-26 01:41:45 +02:00
CTCaer
ab7a81081c t210: Refactor AHB Gizmo registers 2020-11-15 14:46:42 +02:00
CTCaer
8a352bdfe2 usb: Split init into PHY init and device init 2020-11-15 14:45:48 +02:00
CTCaer
721e926a75 usb: Do proper UTMIPLL_HW_PWRDN_CFG0 config 2020-11-15 14:44:35 +02:00
CTCaer
0b314d7f21 clock: Move UTMIPLL init from USB to clock 2020-11-15 14:43:36 +02:00
CTCaer
8305058cf5 clock: Move PLLU init/deinit from USB to clock 2020-11-15 14:42:01 +02:00
CTCaer
6dddb968fa usb: Fix various descriptor transfers in order to not rely on quirks 2020-11-15 14:38:18 +02:00
CTCaer
d3c318d0c9 usb: Correct latencies for HID gadgets 2020-11-15 14:37:14 +02:00
CTCaer
604ec4416d usb: Refactor driver names and defines 2020-11-15 14:36:20 +02:00
CTCaer
c7fcea5f35 usb: Rfactor driver/gadgets in prep for XUSB
Allow gadgets using different USB controllers on demand.
This will allow plugging in XUSB for Mariko usage.
2020-11-15 14:30:25 +02:00
CTCaer
a84f1e5ee5 usb: Split descriptors to object and header 2020-11-15 14:10:00 +02:00
CTCaer
6a4161fdc4 usb: Move lang/serial descriptors to header 2020-11-15 14:04:10 +02:00
CTCaer
1f5b371608 Refactor some names
Additionally:
- Do not retry to init sd if all modes failed in Nyx.
- Do not try to read/write if sdmmc controller and card are not initialized.
2020-10-23 06:32:24 +03:00
CTCaer
1111125aab usb: Invalidate cache on ep1_out_reading_finish 2020-08-15 12:15:02 +03:00
CTCaer
638a3909c5 Refactor various variables and names 2020-07-17 18:00:32 +03:00
CTCaer
e158d9bc00 clk: Refactor CLK devices bits 2020-07-17 16:50:17 +03:00