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Code Issues Projects Releases Wiki Activity
953 Commits 2 Branches 75 Tags 12 MiB
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51 Commits

Author SHA1 Message Date
CTCaer
6e314933d9 Various small changes 2021-02-06 04:17:31 +02:00
CTCaer
53b44a525d Refactor emmcsn_path_impl and return serial number if needed 
The refactoring also makes consecutive requests instantaneous.
 2021-01-03 14:45:06 +02:00
CTCaer
60b629e57f Move display related objects to display parrent 2020-12-28 05:19:23 +02:00
CTCaer
cbbd427d3a Change coreboot error from T210B01 to Mariko 
Change T210B01 name in order for users to understand that it's about Mariko.
 2020-12-26 17:30:49 +02:00
CTCaer
f1386c60af hos: Fix sleep on modchiped Erista 2020-12-11 18:22:33 +02:00
CTCaer
b6ec217484 exo: Support uart logging 
This can be enabled via compile time flags or exosphere.ini.
Compile time flags override exosphere.ini
 2020-12-11 18:14:00 +02:00
CTCaer
ad560b650e nyx: di: Set display id we got from bootloader 2020-12-11 17:49:06 +02:00
CTCaer
14a048a496 nyx: Add SD init info from bootloader 
This shows info about the sd initialization process that happened on hekate main
 2020-12-11 17:46:44 +02:00
CTCaer
cf175fc00d nyx: Add alternate power saving modes 
T210:
By default max power savings is enabled.
By changing `newpowersave=` to 0, it reverts to the old behavior of smaller power savings.

This was added to mitigate some strange DRAM chips, hanging from constant frequency change of a 800 MHz - 1600 MHz back and forth.

T210B01:
Defaults to a simple loop with no power savings. That's because of untrained ram.
 2020-12-02 02:07:31 +02:00
CTCaer
2424ecc4f0 Disable coreboot.rom chainloading for T210B01 
Unlike all RCM payloads that are based on hekate's hwinit, coreboot does full power management before sdram init is run.

Because of that and because it doesn't support T210B01, it does not hang as expected and configures all regulators and pins which can be dangerous!
 2020-12-02 00:57:32 +02:00
CTCaer
e45ffab5d8 Remove stray hekate cfg set. It's handled by default. 2020-11-15 14:00:35 +02:00
CTCaer
1f5b371608 Refactor some names 
Additionally:
- Do not retry to init sd if all modes failed in Nyx.
- Do not try to read/write if sdmmc controller and card are not initialized.
 2020-10-23 06:32:24 +03:00
CTCaer
dae7be8ec4 nyx: Allow disabling of Joycon 
Setting `jcdisable=1` in nyx.ini disables the usage of Joycon completely.

This also disables the BT pairing data dumping tool.
 2020-10-20 10:21:48 +03:00
CTCaer
2f5b52223c config: Add bootloader protection 
`bootprotect=1` enables protection of the `bootloader` folder inside HOS.

This disallows any reading/writing of the folder and its contents inside HOS, preventing any corruption of it.

This of course has the side-effect of homebrew that depend on it (e.g. hekate Toolbox) to not work fully.
 2020-10-20 10:16:12 +03:00
CTCaer
4fc420616d nyx: Control UART debug completely via makefile 
Also enables LvGL log.
 2020-08-13 10:21:00 +03:00
CTCaer
b8ca88ee0a exo: Change fatal names and add stack overflow 2020-07-18 12:53:05 +03:00
CTCaer
11df6030f9 Various fixes 2020-07-18 00:54:35 +03:00
CTCaer
32e58d2bb3 hw init: Cosmetic refactoring 2020-07-17 18:08:27 +03:00
CTCaer
ab5b59e10d Refactor fatal/hard error names 2020-07-14 22:41:48 +03:00
CTCaer
029d66bd95 Fix build for lvgl UART log 2020-06-14 17:33:57 +03:00
CTCaer
6e256d29c7 Utilize hekate's BDK for hekate main and Nyx 2020-06-14 16:45:45 +03:00
CTCaer
21548545fc Equalize hekate main and Nyx sd based functions 2020-06-13 18:32:40 +03:00
CTCaer
a91378b9c1 nyx: Allow always writeable emmc via config 
The key is `umsemmcrw` and resides in nyx.ini
 2020-05-05 19:26:10 +03:00
CTCaer
f56d1bad04 nyx: Allow hue icons from section names 2020-05-05 19:01:08 +03:00
CTCaer
8edc9971f9 nyx: Refactor launch icon colorization 
The Switch and Payload icons will be colorized by default, because they are system icons.

Users can still replace them with icons named `icon_switch_custom.bmp` and `icon_payload_custom.bmp` that do not get colorized.
 2020-05-03 01:57:15 +03:00
CTCaer
4d1b59c05b Update Readme 2020-04-30 16:33:14 +03:00
CTCaer
c072041039 nyx: Add time offset 
The epoch is based on HOS format.

An automatic time set will be implemented in a later version.
 2020-04-30 14:51:48 +03:00
CTCaer
6d75f96ed5 nyx: Add Home Screen selection 
You can now choose between Main menu and Launch/More Cfg as home screens.
 2020-04-30 14:49:28 +03:00
CTCaer
ab304c9178 nyx: Small fixes in init 2020-04-30 14:45:59 +03:00
CTCaer
f5432c734c nyx: Utilize Log Window 
- or + on Joy-Con displays the log screen.
If there are errors somewhere, they are normally also logged in there.
 2020-04-30 14:07:26 +03:00
CTCaer
523c81f797 nyx: Add theme colors for highlight text 2020-04-30 04:04:24 +03:00
CTCaer
8c762c52e2 Various fixes and whitespace removal 2020-04-30 03:25:22 +03:00
CTCaer
08c81fe1f8 Move verification config to nyx config 2020-04-30 02:00:33 +03:00
CTCaer
034f680a8e sd fs: Move sd init/mount/helpers to their own object 2020-04-29 23:20:18 +03:00
CTCaer
5b0a0070c7 sdmmc v2: Refactor everything 2020-04-29 18:53:29 +03:00
CTCaer
0462f3b252 Add simple exception handling 
This adds support for exception handling.
It should provide simple and fast reporting of crucial info and full restoration without powering off.
 2020-04-27 09:56:19 +03:00
CTCaer
9c6931a17c Bugfixes 
The fan driver change ensures power off in any situation where a chainload software re-enables the 5V regulator.
 2020-03-21 22:28:50 +02:00
CTCaer
d50af46b03 chnldr: Support variable sizes of coreboot.rom 2020-03-21 22:18:40 +02:00
CTCaer
a664118fc7 r2p: Update r2p payload 
2 modes:
- With updater2p; Forces the reboot to payload binary to be hekate
- Without; Checks if hekate and then if old
 2019-12-12 00:13:32 +02:00
CTCaer
c6e92311f9 Add error printing for issues with libraries 
It will now show erros for the following:
- Missing or old libsys_minerva.bso (DRAM training).
- Missing libsys_lp0.bso (LP0 sleep mode).
- Missing or old Nyx version
 2019-12-11 11:22:11 +02:00
CTCaer
f256bd5909 Move all I/DRAM addresses into a memory map 
Many addresses were moved around to pack the memory usage!
 2019-12-08 02:23:03 +02:00
Kostas Missos
48c15a8fde nyx: Release the shackles 2019-12-07 20:16:38 +02:00
Kostas Missos
0b45a5a11a bpmp: Reduce freq to 589MHz 
3 users had issues with 602MHz.
This will probably bring the SoC binning compatibility to 100%.

Additionally, make it easy to change default boost frequency.

The tiny loss in perf, will be mitigated in Nyx. (It's actually even faster)
 2019-12-07 02:01:29 +02:00
CTCaer
641a57a4f6 hos/mtc: Add FSP WAR and boost HOS booting times 
By implementing FSP WAR we can allow HOS to boot in 1600MHz and be able to switch frequency without hanging.
 2019-12-04 21:59:58 +02:00
CTCaer
0b1eebefe1 Small refactor and bugfixes 2019-12-04 21:31:39 +02:00
Kostas Missos
7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
CTCaer
a8d529cf6a Refactoring and comment adding 2019-09-12 23:08:38 +03:00
CTCaer
02826dd9a6 sdmmc: Streamline power cycle wait for Sandisks U1 2019-08-28 02:39:43 +03:00
CTCaer
f622d57f6b utils: Fix ms timer accuracy 
Additionally add BPMP delay timers for future use.
 2019-08-28 01:33:38 +03:00
ctcaer@gmail.com
08b84384a6 Bugfixes and cleanup 2019-07-06 22:08:37 +03:00