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1,396 Commits 2 Branches 75 Tags 12 MiB
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4 Commits

Author SHA1 Message Date
CTCaer
7a66e0298a mtc: Refactor various types 2021-01-03 14:33:56 +02:00
Kostas Missos
7c42f72b8a refactor: Remove all unwanted whitespace 2019-10-18 18:02:06 +03:00
Kostas Missos
cfef8b4f72 Update libminerva to v1.1 2018-11-10 13:30:17 +02:00
Kostas Missos
cae9044c17 Minerva our DRAM trainer 
Supports up to 1600MHz and periodic training.

For more check here: https://github.com/CTCaer/minerva_tc
 2018-11-04 03:15:32 +02:00