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bdk: hwinit: display changes
Do not display ldo0 if enabled here as it's not needed. Make sure PLLP_OUTB is properly reset in case of coming out of warmboot.
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@ -47,6 +47,7 @@
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#define CLK_RST_CONTROLLER_PLLM_MISC1 0x98
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#define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C
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#define CLK_RST_CONTROLLER_PLLP_BASE 0xA0
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#define CLK_RST_CONTROLLER_PLLP_OUTB 0xA8
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#define CLK_RST_CONTROLLER_PLLA_BASE 0xB0
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#define CLK_RST_CONTROLLER_PLLA_OUT 0xB4
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#define CLK_RST_CONTROLLER_PLLA_MISC1 0xB8
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@ -305,9 +305,6 @@ static void _config_regulators(bool tegra_t210, bool nx_hoag)
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(void)PMC(APBDEV_PMC_NO_IOPOWER);
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sd_power_cycle_time_start = get_tmr_ms();
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// Disable DSI AVDD to make sure it's in a reset state.
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max7762x_regulator_enable(REGULATOR_LDO0, false);
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// Disable backup battery charger.
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
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@ -380,6 +377,9 @@ void hw_init()
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if (tegra_t210)
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_mbist_workaround();
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// Make sure PLLP_OUT3/4 is set to 408 MHz and enabled.
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CLOCK(CLK_RST_CONTROLLER_PLLP_OUTB) = 0x30003;
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// Enable Security Engine clock.
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clock_enable_se();
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@ -101,7 +101,9 @@
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#define PMC_RST_STATUS_LP0 4
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#define PMC_RST_STATUS_AOTAG 5
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#define APBDEV_PMC_IO_DPD_REQ 0x1B8
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#define PMC_IO_DPD_REQ_DPD_OFF BIT(30)
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#define PMC_IO_DPD_REQ_DPD_IDLE (0 << 30u)
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#define PMC_IO_DPD_REQ_DPD_OFF (1 << 30u)
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#define PMC_IO_DPD_REQ_DPD_ON (2 << 30u)
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#define APBDEV_PMC_IO_DPD2_REQ 0x1C0
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#define APBDEV_PMC_VDDP_SEL 0x1CC
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#define APBDEV_PMC_DDR_CFG 0x1D0
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