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sdmmc: Properly disable parent clock

This commit is contained in:
CTCaer 2020-05-01 03:41:00 +03:00
parent 9850dc305c
commit dde3ca2d73

View File

@ -352,12 +352,9 @@ static void _clock_disable_pllc4(u32 mask)
if (pllc4_enabled & PLLC4_IN_USE)
return;
//FIXME: This causes issues with L4T/TWRP.
return;
// Disable PLLC4.
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLCX_BASE_REF_DIS | PLLC4_BASE_IDDQ;
CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLC4_BASE_IDDQ;
pllc4_enabled = 0;
}