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minerva: Scale down RAM OC if stock boot
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@ -104,21 +104,21 @@ u32 minerva_init()
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}
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mtc_cfg->rate_from = mtc_cfg->mtc_table[curr_ram_idx].rate_khz;
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mtc_cfg->rate_to = 204000;
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mtc_cfg->rate_to = FREQ_204;
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mtc_cfg->train_mode = OP_TRAIN;
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minerva_cfg(mtc_cfg, NULL);
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mtc_cfg->rate_to = 800000;
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mtc_cfg->rate_to = FREQ_800;
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minerva_cfg(mtc_cfg, NULL);
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mtc_cfg->rate_to = 1600000;
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mtc_cfg->rate_to = FREQ_1600;
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minerva_cfg(mtc_cfg, NULL);
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// FSP WAR.
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mtc_cfg->train_mode = OP_SWITCH;
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mtc_cfg->rate_to = 800000;
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mtc_cfg->rate_to = FREQ_800;
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minerva_cfg(mtc_cfg, NULL);
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// Switch to max.
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mtc_cfg->rate_to = 1600000;
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mtc_cfg->rate_to = FREQ_1600;
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minerva_cfg(mtc_cfg, NULL);
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return 0;
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@ -139,6 +139,23 @@ void minerva_change_freq(minerva_freq_t freq)
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}
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}
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void minerva_prep_boot_freq()
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{
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if (!minerva_cfg)
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return;
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mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
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// Check if there's RAM OC. If not exit.
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if (mtc_cfg->mtc_table[mtc_cfg->table_entries - 1].rate_khz == FREQ_1600)
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return;
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// FSP WAR.
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minerva_change_freq(FREQ_204);
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// Scale down to 800 MHz boot freq.
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minerva_change_freq(FREQ_800);
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}
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void minerva_periodic_training()
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{
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if (!minerva_cfg)
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@ -60,6 +60,7 @@ typedef enum
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extern void (*minerva_cfg)(mtc_config_t *mtc_cfg, void *);
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u32 minerva_init();
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void minerva_change_freq(minerva_freq_t freq);
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void minerva_prep_boot_freq();
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void minerva_periodic_training();
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#endif
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@ -1140,6 +1140,10 @@ int hos_launch(ini_sec_t *cfg)
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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// Scale down RAM OC if enabled.
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if (ctxt.stock)
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minerva_prep_boot_freq();
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// emuMMC: Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms.
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sdmmc_storage_init_wait_sd();
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