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hos: change order of deinits and update for newer exo
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6ac9d79282
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@ -183,7 +183,7 @@ static void _se_lock(bool lock_se)
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void _sysctr0_reset()
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void _sysctr0_reset()
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{
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{
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SYSCTR0(SYSCTR0_CNTCR) = 0;
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//SYSCTR0(SYSCTR0_CNTCR) = 0; // Needs secure access.
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SYSCTR0(SYSCTR0_COUNTERID0) = 0;
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SYSCTR0(SYSCTR0_COUNTERID0) = 0;
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SYSCTR0(SYSCTR0_COUNTERID1) = 0;
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SYSCTR0(SYSCTR0_COUNTERID1) = 0;
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SYSCTR0(SYSCTR0_COUNTERID2) = 0;
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SYSCTR0(SYSCTR0_COUNTERID2) = 0;
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@ -1152,8 +1152,8 @@ int hos_launch(ini_sec_t *cfg)
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secmon_mailbox = (secmon_mailbox_t *)(SECMON_MAILBOX_ADDR + SECMON_STATE_OFFSET);
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secmon_mailbox = (secmon_mailbox_t *)(SECMON_MAILBOX_ADDR + SECMON_STATE_OFFSET);
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}
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}
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// Start from DRAM ready signal and reset outgoing value.
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// Start directly from PKG2 ready signal and reset outgoing value.
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secmon_mailbox->in = PKG1_STATE_DRAM_READY;
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secmon_mailbox->in = pkg1_state_pkg2_ready;
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secmon_mailbox->out = SECMON_STATE_NOT_READY;
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secmon_mailbox->out = SECMON_STATE_NOT_READY;
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// Disable display. This must be executed before secmon to provide support for all fw versions.
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// Disable display. This must be executed before secmon to provide support for all fw versions.
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@ -1166,16 +1166,13 @@ int hos_launch(ini_sec_t *cfg)
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = BIT(CLK_L_USBD);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = BIT(CLK_H_AHBDMA) | BIT(CLK_H_APBDMA) | BIT(CLK_H_USB2);
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_H_SET) = BIT(CLK_H_AHBDMA) | BIT(CLK_H_APBDMA) | BIT(CLK_H_USB2);
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// Flush cache and disable MMU.
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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// Scale down RAM OC if enabled.
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// Scale down RAM OC if enabled.
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if (ctxt.stock)
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if (ctxt.stock)
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minerva_prep_boot_freq();
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minerva_prep_boot_freq();
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// emuMMC: Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms.
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// Flush cache and disable MMU.
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sdmmc_storage_init_wait_sd();
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bpmp_mmu_disable();
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bpmp_clk_rate_set(BPMP_CLK_NORMAL);
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// Launch secmon.
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// Launch secmon.
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if (smmu_is_used())
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if (smmu_is_used())
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@ -1183,13 +1180,6 @@ int hos_launch(ini_sec_t *cfg)
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else
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else
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ccplex_boot_cpu0(secmon_base);
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ccplex_boot_cpu0(secmon_base);
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// Wait for secmon to get ready.
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while (!secmon_mailbox->out)
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;
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// Signal pkg2 ready and continue boot.
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secmon_mailbox->in = pkg1_state_pkg2_ready;
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// Halt ourselves in waitevent state and resume if there's JTAG activity.
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// Halt ourselves in waitevent state and resume if there's JTAG activity.
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while (true)
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while (true)
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bpmp_halt();
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bpmp_halt();
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