mirror of
https://github.com/CTCaer/hekate.git
synced 2024-12-24 03:16:10 +00:00
Various bugfixes
This commit is contained in:
parent
e07dde1c58
commit
3472e7e7fb
@ -56,7 +56,7 @@ int create_config_entry()
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if (!sd_mount())
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return 1;
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char lbuf[16];
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char lbuf[32];
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FIL fp;
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bool mainIniFound = false;
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@ -35,7 +35,7 @@ static char *_strdup(char *str)
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strcpy(res, str);
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// Remove trailing space.
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if (res[strlen(res) - 1] == ' ' && strlen(res))
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if (strlen(res) && res[strlen(res) - 1] == ' ')
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res[strlen(res) - 1] = 0;
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return res;
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@ -180,22 +180,14 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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char *ini_check_payload_section(ini_sec_t *cfg)
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{
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char *path = NULL;
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if (cfg == NULL)
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return NULL;
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LIST_FOREACH_ENTRY(ini_kv_t, kv, &cfg->kvs, link)
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{
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if (!strcmp("payload", kv->key))
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{
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if (!path)
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path = _strdup(kv->val);
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}
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return kv->val;
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}
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if (path)
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return path;
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else
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return NULL;
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return NULL;
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}
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@ -235,7 +235,7 @@
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#define UV_LINE_STRIDE(x) (((x) & 0xffff) << 16)
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#define DC_WIN_DV_CONTROL 0x70E
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// The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER).
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/*! The following registers are A/B/C shadows of the 0xBC0/0xDC0/0xFC0 registers (see DISPLAY_WINDOW_HEADER). */
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#define DC_WINBUF_START_ADDR 0x800
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#define DC_WINBUF_ADDR_H_OFFSET 0x806
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#define DC_WINBUF_ADDR_V_OFFSET 0x808
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@ -26,8 +26,6 @@
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#define WPRINTF(text) gfx_printf("%k"text"%k\n", 0xFFFFDD00, 0xFFCCCCCC)
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#define WPRINTFARGS(text, args...) gfx_printf("%k"text"%k\n", 0xFFFFDD00, args, 0xFFCCCCCC)
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#define FB_ADDRESS 0xC0000000
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void gfx_init_ctxt(u32 *fb, u32 width, u32 height, u32 stride);
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void gfx_clear_grey(u8 color);
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void gfx_clear_partial_grey(u8 color, u32 pos_x, u32 height);
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@ -625,6 +625,9 @@ int hos_launch(ini_sec_t *cfg)
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gfx_printf("Rebuilt & loaded pkg2\n");
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// Unmount SD card.
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sd_unmount();
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gfx_printf("\n%kBooting...%k\n", 0xFF96FF00, 0xFFCCCCCC);
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// Clear pkg1/pkg2 keys.
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@ -679,9 +682,6 @@ int hos_launch(ini_sec_t *cfg)
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if (ctxt.atmosphere && ctxt.secmon)
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config_exosphere(ctxt.pkg1_id->id, ctxt.pkg1_id->kb, (void *)ctxt.pkg1_id->warmboot_base, ctxt.stock);
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// Unmount SD card.
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sd_unmount();
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// Finalize MC carveout.
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if (ctxt.pkg1_id->kb <= KB_FIRMWARE_VERSION_301)
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mc_config_carveout();
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@ -811,7 +811,7 @@ static int _kipm_inject(const char *kipm_path, char *target_name, pkg2_kip1_info
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{
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if(!currSectIdx) // .text.
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{
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memcpy(ki->kip1->data + inject_size, fs_kip->data + new_offset, fs_kip->sections[0].size_comp);
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memcpy(ki->kip1->data + inject_size, fs_kip->data, fs_kip->sections[0].size_comp);
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ki->kip1->sections[0].size_decomp += inject_size;
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ki->kip1->sections[0].size_comp += inject_size;
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}
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@ -219,7 +219,6 @@ int reboot_to_sept(const u8 *tsec_fw, u32 kb)
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error:
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EPRINTF("Failed to run sept\n");
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display_backlight_brightness(h_cfg.backlight, 1000);
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btn_wait();
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@ -300,7 +300,6 @@ int launch_payload(char *path, bool update)
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}
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f_close(&fp);
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free(path);
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if (update && is_ipl_updated(buf))
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return 1;
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@ -685,7 +684,7 @@ void nyx_load_run()
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{
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sd_mount();
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u8 *nyx = sd_file_read("bootloader/sys/nyx.bin", false);
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u8 *nyx = sd_file_read("bootloader/sys/nyx.bin", NULL);
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if (!nyx)
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return;
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@ -44,10 +44,10 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
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memcpy(&tmp, buf, size);
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vu32 *base = (vu32 *)i2c_addrs[idx];
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base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
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base[I2C_CMD_DATA1] = tmp; //Set value.
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base[I2C_CNFG] = (2 * size - 2) | 0x2800; //Set size and send mode.
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_i2c_wait(base); //Kick transaction.
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base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
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base[I2C_CMD_DATA1] = tmp; //Set value.
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base[I2C_CNFG] = ((size - 1) << 1) | 0x2800; //Set size and send mode.
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_i2c_wait(base); //Kick transaction.
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base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
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while (base[I2C_STATUS] & 0x100)
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@ -65,9 +65,9 @@ static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
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return 0;
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vu32 *base = (vu32 *)i2c_addrs[idx];
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base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
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base[I2C_CNFG] = (size - 1) << 1 | 0x2840; // Set size and recv mode.
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_i2c_wait(base); // Kick transaction.
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base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
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base[I2C_CNFG] = ((size - 1) << 1) | 0x2840; // Set size and recv mode.
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_i2c_wait(base); // Kick transaction.
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base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
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while (base[I2C_STATUS] & 0x100)
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@ -73,8 +73,10 @@ void panic(u32 val)
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TMR(TIMER_TMR9_TMR_PTV) = TIMER_EN | TIMER_PER_EN;
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TMR(TIMER_WDT4_CONFIG) = TIMER_SRC(9) | TIMER_PER(1) | TIMER_PMCRESET_EN;
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TMR(TIMER_WDT4_COMMAND) = TIMER_START_CNT;
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while (1)
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;
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while (true)
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usleep(1);
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}
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void reboot_normal()
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@ -104,9 +106,13 @@ void reboot_rcm()
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void power_off()
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{
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sd_unmount();
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display_end();
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// Stop the alarm, in case we injected and powered off too fast.
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max77620_rtc_stop_alarm();
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
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while (true)
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usleep(1);
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}
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@ -56,7 +56,7 @@ int create_config_entry()
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if (!sd_mount())
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return 1;
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char lbuf[16];
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char lbuf[32];
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FIL fp;
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bool mainIniFound = false;
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@ -35,7 +35,7 @@ static char *_strdup(char *str)
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strcpy(res, str);
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// Remove trailing space.
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if (res[strlen(res) - 1] == ' ' && strlen(res))
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if (strlen(res) && res[strlen(res) - 1] == ' ')
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res[strlen(res) - 1] = 0;
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return res;
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@ -180,22 +180,14 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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char *ini_check_payload_section(ini_sec_t *cfg)
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{
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char *path = NULL;
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if (cfg == NULL)
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return NULL;
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LIST_FOREACH_ENTRY(ini_kv_t, kv, &cfg->kvs, link)
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{
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if (!strcmp("payload", kv->key))
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{
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if (!path)
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path = _strdup(kv->val);
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}
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return kv->val;
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}
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if (path)
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return path;
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else
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return NULL;
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return NULL;
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}
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@ -57,8 +57,11 @@ static const pkg1_id_t _pkg1_ids[] = {
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const pkg1_id_t *pkg1_identify(u8 *pkg1, char *build_date)
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{
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memcpy(build_date, (char *)(pkg1 + 0x10), 14);
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build_date[14] = 0;
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if (build_date)
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{
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memcpy(build_date, (char *)(pkg1 + 0x10), 14);
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build_date[14] = 0;
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}
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for (u32 i = 0; _pkg1_ids[i].id; i++)
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if (!memcmp(pkg1 + 0x10, _pkg1_ids[i].id, 12))
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@ -73,10 +73,14 @@ extern void reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size);
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void check_sept()
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{
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// Check if non-hekate payload is used for sept and restore it.
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if (h_cfg.sept_run && !f_stat("sept/payload.bak", NULL))
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if (h_cfg.sept_run)
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{
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f_unlink("sept/payload.bin");
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f_rename("sept/payload.bak", "sept/payload.bin");
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if (!f_stat("sept/payload.bak", NULL))
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{
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f_unlink("sept/payload.bin");
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f_rename("sept/payload.bak", "sept/payload.bin");
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}
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return;
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}
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@ -31,9 +31,7 @@
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#include "../gfx/gfx.h"
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extern gfx_ctxt_t gfx_ctxt;
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extern gfx_con_t gfx_con;
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#define DPRINTF(...) gfx_printf(&gfx_con, __VA_ARGS__)
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#define DPRINTF(...) gfx_printf(__VA_ARGS__)
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static int touch_command(u8 cmd)
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{
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@ -46,13 +46,13 @@
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#define PINMUX_AUX_UART2_TX 0xF4
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#define PINMUX_AUX_UART3_TX 0x104
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#define PINMUX_AUX_DAP4_DIN 0x148
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#define PINMUX_AUX_USB_VBUS_EN0 0x1A8
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#define PINMUX_AUX_WIFI_EN 0x1B4
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#define PINMUX_AUX_WIFI_RST 0x1B8
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#define PINMUX_AUX_DAP4_SCLK 0x150
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#define PINMUX_AUX_GPIO_X1_AUD 0x18C
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#define PINMUX_AUX_GPIO_X3_AUD 0x190
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#define PINMUX_AUX_SPDIF_IN 0x1A4
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#define PINMUX_AUX_USB_VBUS_EN0 0x1A8
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#define PINMUX_AUX_WIFI_EN 0x1B4
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#define PINMUX_AUX_WIFI_RST 0x1B8
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#define PINMUX_AUX_AP_WAKE_NFC 0x1CC
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#define PINMUX_AUX_NFC_EN 0x1D0
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#define PINMUX_AUX_NFC_INT 0x1D4
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@ -838,7 +838,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
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u32 hs_type = 0;
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switch (type)
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{
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case 11:
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case 11: // SDR104.
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// Fall through if not supported.
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if (buf[13] & SD_MODE_UHS_SDR104)
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{
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@ -848,7 +848,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
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storage->csd.busspeed = 104;
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break;
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}
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case 10:
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case 10: // SDR50.
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if (buf[13] & SD_MODE_UHS_SDR50)
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{
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type = 10;
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@ -857,7 +857,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
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storage->csd.busspeed = 50;
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break;
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}
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case 8:
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case 8: // SDR12.
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if (!(buf[13] & SD_MODE_UHS_SDR12))
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return 0;
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type = 8;
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@ -60,15 +60,16 @@ void set_fan_duty(u32 duty)
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// Inverted polarity.
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u32 inv_duty = 236 - duty;
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// If disabled send a 0 duty.
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if (inv_duty == 236)
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inv_duty = 255;
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// Set PWM duty.
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if (inv_duty)
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PWM(PWM_CONTROLLER_PWM_CSR_1) = (1 << 31) | (inv_duty << 16);
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else
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if (inv_duty == 255)
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PWM(PWM_CONTROLLER_PWM_CSR_1) = 0;
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}
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else
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PWM(PWM_CONTROLLER_PWM_CSR_1) = (1 << 31) | (inv_duty << 16);
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void get_fan_speed(u32 *duty, u32 *rpm)
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{
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@ -72,8 +72,10 @@ void panic(u32 val)
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TMR(TIMER_TMR9_TMR_PTV) = TIMER_EN | TIMER_PER_EN;
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TMR(TIMER_WDT4_CONFIG) = TIMER_SRC(9) | TIMER_PER(1) | TIMER_PMCRESET_EN;
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TMR(TIMER_WDT4_COMMAND) = TIMER_START_CNT;
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while (1)
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;
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while (true)
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usleep(1);
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}
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void reboot_normal()
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@ -106,4 +108,7 @@ void power_off()
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display_end();
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
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while (true)
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usleep(1);
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}
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