mirror of
https://github.com/CTCaer/hekate.git
synced 2024-09-03 05:19:18 +00:00
Bugfixes
This commit is contained in:
parent
949a034500
commit
30d3c76655
6
Makefile
6
Makefile
@ -61,9 +61,11 @@ OBJS += $(addprefix $(BUILD)/$(TARGET)/, \
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elfload.o elfreloc_arm.o \
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)
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CUSTOMDEFINES := -DBLVERSIONMJ=$(BLVERSION_MAJOR) -DBLVERSIONMN=$(BLVERSION_MINOR) -DMENU_LOGO_ENABLE
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#CUSTOMDEFINES += -DDEBUG
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#CUSTOMDEFINES += -DDEBUG_UART_PORT=0
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ARCH := -march=armv4t -mtune=arm7tdmi -mthumb -mthumb-interwork
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CUSTOMDEFINES := -DBLVERSIONMJ=$(BLVERSION_MAJOR) -DBLVERSIONMN=$(BLVERSION_MINOR)
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CUSTOMDEFINES += -DMENU_LOGO_ENABLE #-DDEBUG
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CFLAGS = $(ARCH) -O2 -nostdlib -ffunction-sections -fdata-sections -fomit-frame-pointer -fno-inline -std=gnu11 -Wall $(CUSTOMDEFINES)
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LDFLAGS = $(ARCH) -nostartfiles -lgcc -Wl,--nmagic,--gc-sections
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@ -84,7 +84,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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lblen = strlen(lbuf);
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// Remove trailing newline.
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if (lbuf[lblen - 1] == '\n')
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if (lbuf[lblen - 1] == '\n' || lbuf[lblen - 1] == '\r')
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lbuf[lblen - 1] = 0;
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if (lblen > 2 && lbuf[0] == '[') // Create new section.
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@ -96,7 +96,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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}
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u32 i;
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for (i = 0; i < lblen && lbuf[i] != '\n' && lbuf[i] != ']'; i++)
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for (i = 0; i < lblen && lbuf[i] != ']' && lbuf[i] != '\n' && lbuf[i] != '\r'; i++)
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;
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lbuf[i] = 0;
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@ -114,7 +114,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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}
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u32 i;
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for (i = 0; i < lblen && lbuf[i] != '\n' && lbuf[i] != '}'; i++)
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for (i = 0; i < lblen && lbuf[i] != '}' && lbuf[i] != '\n' && lbuf[i] != '\r'; i++)
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;
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lbuf[i] = 0;
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@ -132,7 +132,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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}
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u32 i;
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for (i = 0; i < lblen && lbuf[i] != '\n'; i++)
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for (i = 0; i < lblen && lbuf[i] != '\n' && lbuf[i] != '\r'; i++)
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;
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lbuf[i] = 0;
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@ -155,7 +155,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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else if (csec && csec->type == INI_CHOICE) //Extract key/value.
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{
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u32 i;
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for (i = 0; i < lblen && lbuf[i] != '\n' && lbuf[i] != '='; i++)
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for (i = 0; i < lblen && lbuf[i] != '=' && lbuf[i] != '\n' && lbuf[i] != '\r'; i++)
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;
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lbuf[i] = 0;
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@ -652,7 +652,10 @@ int _restore_emmc_part(char *sd_path, sdmmc_storage_t *storage, emmc_part_t *par
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res = f_open(&fp, outFilename, FA_READ);
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if (res)
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{
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WPRINTFARGS("Error (%d) while opening backup. Continuing...\n", res);
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if (res != FR_NO_FILE)
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EPRINTFARGS("Error (%d) while opening backup. Continuing...\n", res);
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else
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WPRINTFARGS("Error (%d) file not found. Continuing...\n", res);
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gfx_con.fntsz = 16;
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return 0;
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@ -637,11 +637,11 @@ void _ipatch_process(u32 offset, u32 value)
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u8 lo = value & 0xff;
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switch (value >> 8)
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{
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case 0xdf:
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gfx_printf(&gfx_con, " svc #0x%02x", lo);
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break;
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case 0x20:
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gfx_printf(&gfx_con, " movs r0, #0x%02x", lo);
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gfx_printf(&gfx_con, " MOVS R0, #0x%02X", lo);
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break;
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case 0xDF:
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gfx_printf(&gfx_con, " SVC #0x%02X", lo);
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break;
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}
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gfx_puts(&gfx_con, "\n");
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@ -657,7 +657,7 @@ void bootrom_ipatches_info()
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u32 res = fuse_read_ipatch(_ipatch_process);
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if (res != 0)
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EPRINTFARGS("Failed to read ipatches. Error: %d", res);
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gfx_puts(&gfx_con, "\nPress POWER to dump them to SD Card.\nPress VOL to go to the menu.\n");
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u32 btn = btn_wait();
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@ -688,8 +688,8 @@ void bootrom_ipatches_info()
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if (!sd_save_to_file((u8 *)BOOTROM_BASE, BOOTROM_SIZE, path))
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gfx_puts(&gfx_con, "\nbootrom_patched.bin saved!\n");
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u32 ipatch_backup[13];
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memcpy(ipatch_backup, (void *) IPATCH_BASE, sizeof(ipatch_backup));
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u32 ipatch_backup[14];
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memcpy(ipatch_backup, (void *)IPATCH_BASE, sizeof(ipatch_backup));
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memset((void*)IPATCH_BASE, 0, sizeof(ipatch_backup));
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emmcsn_path_impl(path, "/dumps", "bootrom_unpatched.bin", NULL);
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@ -96,7 +96,7 @@ static void _se_lock(bool lock_se)
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SE(SE_SECURITY_0) &= 0xFFFFFFFB; // Make access lock regs secure only.
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}
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memset((void *)IPATCH_BASE, 0, 13 * sizeof(u32));
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memset((void *)IPATCH_BASE, 0, 14 * sizeof(u32));
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SB(SB_CSR) = 0x10; // Protected IROM enable.
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// This is useful for documenting the bits in the SE config registers, so we can keep it around.
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@ -281,10 +281,10 @@ static int _read_emmc_pkg1(launch_ctxt_t *ctxt)
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ctxt->pkg1_id = pkg1_identify(ctxt->pkg1);
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if (!ctxt->pkg1_id)
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{
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gfx_printf(&gfx_con, "%kUnknown package1,\nVersion (= '%s').%k\n", 0xFFFF0000, (char *)ctxt->pkg1 + 0x10, 0xFFCCCCCC);
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gfx_printf(&gfx_con, "%kUnknown pkg1,\nVersion (= '%s').%k\n", 0xFFFF0000, (char *)ctxt->pkg1 + 0x10, 0xFFCCCCCC);
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goto out;
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}
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gfx_printf(&gfx_con, "Identified package1 ('%s'),\nKeyblob version %d\n\n", (char *)(ctxt->pkg1 + 0x10), ctxt->pkg1_id->kb);
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gfx_printf(&gfx_con, "Identified pkg1 ('%s'),\nKeyblob version %d\n\n", (char *)(ctxt->pkg1 + 0x10), ctxt->pkg1_id->kb);
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// Read the correct keyblob.
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ctxt->keyblob = (u8 *)calloc(NX_EMMC_BLOCKSIZE, 1);
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@ -376,7 +376,7 @@ int hos_launch(ini_sec_t *cfg)
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if (!_read_emmc_pkg1(&ctxt))
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return 0;
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gfx_printf(&gfx_con, "Loaded package1 and keyblob\n");
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gfx_printf(&gfx_con, "Loaded pkg1 and keyblob\n");
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// Generate keys.
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if (!h_cfg.se_keygen_done || ctxt.pkg1_id->kb >= KB_FIRMWARE_VERSION_620)
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@ -402,7 +402,7 @@ int hos_launch(ini_sec_t *cfg)
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pkg1_unpack((void *)ctxt.pkg1_id->warmboot_base, (void *)ctxt.pkg1_id->secmon_base, NULL, ctxt.pkg1_id, ctxt.pkg1);
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gfx_printf(&gfx_con, "Decrypted and unpacked package1\n");
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gfx_printf(&gfx_con, "Decrypted and unpacked pkg1\n");
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}
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// Replace 'warmboot.bin' if requested.
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@ -439,10 +439,15 @@ int hos_launch(ini_sec_t *cfg)
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if (!bootConfigBuf)
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return 0;
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gfx_printf(&gfx_con, "Read package2\n");
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gfx_printf(&gfx_con, "Read pkg2\n");
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// Decrypt package2 and parse KIP1 blobs in INI1 section.
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pkg2_hdr_t *pkg2_hdr = pkg2_decrypt(ctxt.pkg2);
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if (!pkg2_hdr)
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{
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gfx_printf(&gfx_con, "Pkg2 decryption failed!\n");
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return 0;
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}
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LIST_INIT(kip1_info);
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pkg2_parse_kips(&kip1_info, pkg2_hdr);
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@ -500,7 +505,7 @@ int hos_launch(ini_sec_t *cfg)
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// Rebuild and encrypt package2.
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pkg2_build_encrypt((void *)0xA9800000, ctxt.kernel, ctxt.kernel_size, &kip1_info);
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gfx_printf(&gfx_con, "Rebuilt and loaded package2\n");
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gfx_printf(&gfx_con, "Rebuilt and loaded pkg2\n");
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// Unmount SD card.
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sd_unmount();
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@ -91,28 +91,28 @@ PATCHSET_DEF(_warmboot_2_patchset,
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);
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PATCHSET_DEF(_warmboot_3_patchset,
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{ 0x4DC, _NOPv7() } // Fuse check.
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{ 0x4F0, _NOPv7() } // Segment id check.
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{ 0x4DC, _NOPv7() }, // Fuse check.
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{ 0x4F0, _NOPv7() } // Segment id check.
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);
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PATCHSET_DEF(_warmboot_4_patchset,
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{ 0x544, _NOPv7() } // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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{ 0x544, _NOPv7() }, // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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);
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PATCHSET_DEF(_warmboot_5_patchset,
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{ 0x544, _NOPv7() } // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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{ 0x544, _NOPv7() }, // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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);
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PATCHSET_DEF(_warmboot_6_patchset,
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{ 0x544, _NOPv7() } // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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{ 0x544, _NOPv7() }, // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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);
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PATCHSET_DEF(_warmboot_620_patchset,
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{ 0x544, _NOPv7() } // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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{ 0x544, _NOPv7() }, // Fuse check.
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{ 0x558, _NOPv7() } // Segment id check.
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);
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/*
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@ -57,7 +57,7 @@ void config_exosphere(const char *id, u32 kb, bool debug)
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exoFlags |= EXO_FLAG_620_KGN;
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if (debug)
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exoFlags |= EXO_FLAG_DBG_PRIV | EXO_FLAG_DBG_USER;
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exoFlags |= EXO_FLAG_DBG_PRIV;
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// Set mailbox values.
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*mb_exo_magic = EXO_MAGIC_VAL;
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@ -1156,16 +1156,17 @@ void ipl_main()
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heap_init(0x90020000);
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#ifdef DEBUG_UART_PORT
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//uart_send(DEBUG_UART_PORT, (u8 *)0x40000000, 0x10000);
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//uart_wait_idle(DEBUG_UART_PORT, UART_TX_IDLE);
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uart_send(DEBUG_UART_PORT, (u8 *)"Hekate: Hello!\r\n", 18);
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uart_wait_idle(DEBUG_UART_PORT, UART_TX_IDLE);
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#endif
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// Set bootloader's default configuration.
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set_default_configuration();
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// Save sdram lp0 config.
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if (ianos_loader(true, "bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params()))
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h_cfg.errors |= ERR_LIBSYS_LP0;
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if (*(vu32 *)BOOTLOADER_UPDATED_MAGIC_ADDR != BOOTLOADER_UPDATED_MAGIC)
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if (ianos_loader(true, "bootloader/sys/libsys_lp0.bso", DRAM_LIB, (void *)sdram_get_params()))
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h_cfg.errors |= ERR_LIBSYS_LP0;
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display_init();
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@ -31,6 +31,9 @@
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#define UART_TX_IDLE 0x1
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#define UART_RX_IDLE 0x2
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#define UART_TX_FIFO_FULL 0x100
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#define UART_RX_FIFO_EMPTY 0x200
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#define UART_LCR_DLAB 0x80
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#define UART_LCR_WORD_LENGTH_8 0x3
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#define UART_LSR_RDR 0x1
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