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Normalize brom patches & add sd autocalib fallback

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This commit is contained in:
Kostas Missos 2019-02-12 00:40:40 +02:00
parent 5cd596e53c
commit 2f37811aba
4 changed files with 21 additions and 7 deletions
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6
bootloader/mem/sdram.c
View File

@ -520,12 +520,12 @@ sdram_params_t *sdram_get_params()
sdram_params_t *sdram_get_params_patched()
{
#define IPATCH_CONFIG(addr, data) (((addr - 0x100000) / 2) << 16 | (data & 0xffff))
sdram_params_t *sdram_params = sdram_get_params();
// Disable Warmboot signature check.
sdram_params->boot_rom_patch_control = (1 << 31) | (((IPATCH_BASE + 4) - APB_MISC_BASE) / 4);
u32 addr = 0x10459E; // Bootrom address for warmboot sig check.
u32 data = 0x2000; // MOV R0, #0.
sdram_params->boot_rom_patch_data = (addr / 2) << 16 | (data & 0xffff);
sdram_params->boot_rom_patch_data = IPATCH_CONFIG(0x10459E, 0x2000);
return sdram_params;
}

4
bootloader/mem/sdram_lp0.c
View File

@ -1,8 +1,8 @@
/*
* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
* Copyright 2014 Google Inc.
* Copyright (C) 2018 naehrwert
* Copyright (C) 2018 CTCaer
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 CTCaer
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,

2
bootloader/soc/t210.h
View File

@ -107,6 +107,8 @@
#define APB_MISC_PP_STRAPPING_OPT_A 0x08
#define APB_MISC_PP_PINMUX_GLOBAL 0x40
#define APB_MISC_GP_LCD_BL_PWM_CFGPADCTRL 0xA34
#define APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL 0xA98
#define APB_MISC_GP_EMMC4_PAD_CFGPADCTRL 0xAB4
#define APB_MISC_GP_WIFI_EN_CFGPADCTRL 0xB64
#define APB_MISC_GP_WIFI_RST_CFGPADCTRL 0xB68

16
bootloader/storage/sdmmc_driver.c
View File

@ -143,8 +143,20 @@ static int _sdmmc_get_clkcon(sdmmc_t *sdmmc)
static void _sdmmc_pad_config_fallback(sdmmc_t *sdmmc, u32 power)
{
_sdmmc_get_clkcon(sdmmc);
if (sdmmc->id == SDMMC_4)
*(vu32 *)0x70000AB4 = ((*(vu32 *)0x70000AB4) & 0x3FFC) | 0x1040;
switch (sdmmc->id)
{
case SDMMC_1:
if (power == SDMMC_POWER_OFF)
break;
if (power == SDMMC_POWER_1_8)
APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = 0x304; // Up: 3, Dn: 4.
else if (power == SDMMC_POWER_3_3)
APB_MISC(APB_MISC_GP_SDMMC1_PAD_CFGPADCTRL) = 0x808; // Up: 8, Dn: 8.
break;
case SDMMC_4:
APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) = (APB_MISC(APB_MISC_GP_EMMC4_PAD_CFGPADCTRL) & 0x3FFC) | 0x1040;
break;
}
//TODO: load standard values for other controllers, can depend on power.
}