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fuse: Add NX hw type getter
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@ -20,6 +20,7 @@
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#include <string.h>
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#include <soc/fuse.h>
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#include <soc/hw_init.h>
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#include <soc/t210.h>
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#include <utils/types.h>
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@ -67,6 +68,22 @@ u32 fuse_read_odm_keygen_rev()
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return 0;
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}
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u32 fuse_read_hw_type()
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{
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if (hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01)
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{
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switch ((fuse_read_odm(4) & 0xF0000) >> 16)
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{
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case 1:
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return FUSE_NX_HW_TYPE_IOWA;
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case 2:
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return FUSE_NX_HW_TYPE_HOAG;
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}
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}
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return FUSE_NX_HW_TYPE_ICOSA;
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}
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u8 fuse_count_burnt(u32 val)
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{
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u8 burnt_fuses = 0;
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@ -339,8 +356,8 @@ int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len)
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bool fuse_check_patched_rcm()
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{
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// Check if XUSB in use.
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if (FUSE(FUSE_RESERVED_SW) & (1<<7))
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// Check if XUSB in use or Tegra X1+.
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if (FUSE(FUSE_RESERVED_SW) & (1<<7) || hw_get_chip_id() == GP_HIDREV_MAJOR_T210B01)
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return true;
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// Check if RCM is ipatched.
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@ -75,9 +75,17 @@
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/*! Fuse cache registers. */
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#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
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enum
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{
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FUSE_NX_HW_TYPE_ICOSA,
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FUSE_NX_HW_TYPE_IOWA,
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FUSE_NX_HW_TYPE_HOAG
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};
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void fuse_disable_program();
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u32 fuse_read_odm(u32 idx);
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u32 fuse_read_odm_keygen_rev();
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u32 fuse_read_hw_type();
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u8 fuse_count_burnt(u32 val);
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void fuse_wait_idle();
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int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value));
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