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storage: Better BIS support
It now supports more than one crypto block and keys are expected to slot 0 and up to slot 5.
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@ -84,7 +84,7 @@
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// NX BIS driver sector cache.
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#define NX_BIS_CACHE_ADDR 0xFEE00000
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#define NX_BIS_CACHE_SZ 0x8800
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#define NX_BIS_CACHE_SZ 0x100000
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// USB buffers.
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#define USBD_ADDR 0xFEF00000
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@ -2,7 +2,7 @@
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* eMMC BIS driver for Nintendo Switch
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*
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* Copyright (c) 2019 shchmue
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* Copyright (c) 2019 CTCaer
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* Copyright (c) 2019-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -26,7 +26,7 @@
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#include "../storage/sdmmc.h"
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#include "../utils/types.h"
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#define MAX_SEC_CACHE_ENTRIES 64
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#define MAX_SEC_CACHE_ENTRIES 1500
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typedef struct _sector_cache_t
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{
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@ -37,9 +37,11 @@ typedef struct _sector_cache_t
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u8 align[8];
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} sector_cache_t;
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static u32 sector_idx = 0;
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static sector_cache_t *sector_cache = NULL;
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static u8 ks_crypt = 0;
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static u8 ks_tweak = 0;
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static u32 sector_cache_cnt = 0;
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static emmc_part_t *system_part = NULL;
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static sector_cache_t *sector_cache = (sector_cache_t *)NX_BIS_CACHE_ADDR;
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static void _gf256_mul_x_le(u8 *block)
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{
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@ -90,7 +92,7 @@ static int _nx_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u8 *tweak, bool rege
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pdst += 0x10;
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}
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se_aes_crypt_ecb(ks2, 0, dst, sec_size, src, sec_size);
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se_aes_crypt_ecb(ks2, enc, dst, sec_size, src, sec_size);
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memcpy(tweak, tmp_tweak, 0x10);
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@ -107,25 +109,23 @@ static int _nx_aes_xts_crypt_sec(u32 ks1, u32 ks2, u32 enc, u8 *tweak, bool rege
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return 1;
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}
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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static int nx_emmc_bis_read_block(u32 sector, u32 count, void *buff)
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{
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if (!system_part)
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return 3; // Not ready.
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static u32 prev_cluster = -1;
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static u32 prev_sector = 0;
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__attribute__ ((aligned (16))) static u8 tweak[0x10];
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u32 tweak_exp = 0;
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bool regen_tweak = true, cache_sector = false;
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if (!sector_cache)
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sector_cache = (sector_cache_t *)NX_BIS_CACHE_ADDR;
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static u8 tweak[0x10];
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u32 cache_idx = 0;
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u32 tweak_exp = 0;
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bool regen_tweak = true;
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bool cache_sector = false;
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if (count == 1)
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{
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for ( ; cache_idx < sector_idx; cache_idx++)
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for ( ; cache_idx < sector_cache_cnt; cache_idx++)
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{
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if (sector_cache[cache_idx].sector == sector)
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{
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@ -139,12 +139,12 @@ int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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}
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}
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// add to cache
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if (cache_idx == sector_idx && cache_idx < MAX_SEC_CACHE_ENTRIES)
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if (cache_idx == sector_cache_cnt && cache_idx < MAX_SEC_CACHE_ENTRIES)
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{
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sector_cache[cache_idx].sector = sector;
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sector_cache[cache_idx].visit_cnt++;
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cache_sector = true;
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sector_idx++;
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sector_cache_cnt++;
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}
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}
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@ -163,8 +163,8 @@ int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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else // Sector in same cluster and before or same as last sector.
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tweak_exp = sector % 0x20;
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// FatFS will never pull more than a cluster.
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_nx_aes_xts_crypt_sec(9, 8, 0, tweak, regen_tweak, tweak_exp, prev_cluster, buff, buff, count << 9);
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// Maximum one cluster (1 XTS crypto block 16KB).
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_nx_aes_xts_crypt_sec(ks_tweak, ks_crypt, 0, tweak, regen_tweak, tweak_exp, prev_cluster, buff, buff, count << 9);
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if (cache_sector)
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{
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memcpy(sector_cache[cache_idx].data, buff, 0x200);
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@ -179,7 +179,47 @@ int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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return 1;
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}
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int nx_emmc_bis_read(u32 sector, u32 count, void *buff)
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{
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int res = 1;
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u8 *buf = (u8 *)buff;
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u32 curr_sct = sector;
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while (count)
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{
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u32 sct_cnt = MIN(count, 0x20);
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res = nx_emmc_bis_read_block(curr_sct, sct_cnt, buf);
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if (res)
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return 1;
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count -= sct_cnt;
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curr_sct += sct_cnt;
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buf += 512 * sct_cnt;
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}
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return res;
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}
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void nx_emmc_bis_init(emmc_part_t *part)
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{
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system_part = part;
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sector_cache_cnt = 0;
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switch (part->index)
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{
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case 0: // PRODINFO.
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case 1: // PRODINFOF.
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ks_crypt = 0;
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ks_tweak = 1;
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break;
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case 8: // SAFE.
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ks_crypt = 2;
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ks_tweak = 3;
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break;
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case 9: // SYSTEM.
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case 10: // USER.
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ks_crypt = 4;
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ks_tweak = 5;
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break;
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}
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}
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