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Name hardcoded TSEC regs
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1ac7f61f49
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@ -36,7 +36,7 @@ static int _tsec_dma_wait_idle()
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{
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u32 timeout = get_tmr_ms() + 10000;
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while (!(TSEC(0x1118) & 2))
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while (!(TSEC(TSEC_DMATRFCMD) & TSEC_DMATRFCMD_IDLE))
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if (get_tmr_ms() > timeout)
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return 0;
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@ -48,13 +48,13 @@ static int _tsec_dma_pa_to_internal_100(int not_imem, int i_offset, int pa_offse
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u32 cmd;
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if (not_imem)
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cmd = 0x600; // DMA 0x100 bytes
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cmd = TSEC_DMATRFCMD_SIZE_256B; // DMA 256 bytes
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else
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cmd = 0x10; // dma imem
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cmd = TSEC_DMATRFCMD_IMEM; // DMA IMEM (Instruction memmory)
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TSEC(0x1114) = i_offset; // tsec_dmatrfmoffs_r
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TSEC(0x111C) = pa_offset; // tsec_dmatrffboffs_r
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TSEC(0x1118) = cmd; // tsec_dmatrfcmd_r
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TSEC(TSEC_DMATRFMOFFS) = i_offset;
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TSEC(TSEC_DMATRFFBOFFS) = pa_offset;
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TSEC(TSEC_DMATRFCMD) = cmd;
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return _tsec_dma_wait_idle();
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}
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@ -74,10 +74,21 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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clock_enable_kfuse();
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//Configure Falcon.
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TSEC(0x110C) = 0; // tsec_dmactl_r
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TSEC(0x1010) = 0xFFF2; // tsec_irqmset_r
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TSEC(0x101C) = 0xFFF0; // tsec_irqdest_r
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TSEC(0x1048) = 3; // tsec_itfen_r
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TSEC(TSEC_DMACTL) = 0;
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TSEC(TSEC_IRQMSET) =
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TSEC_IRQMSET_EXT(0xFF) |
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TSEC_IRQMSET_WDTMR |
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TSEC_IRQMSET_HALT |
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TSEC_IRQMSET_EXTERR |
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TSEC_IRQMSET_SWGEN0 |
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TSEC_IRQMSET_SWGEN1;
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TSEC(TSEC_IRQDEST) =
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TSEC_IRQDEST_EXT(0xFF) |
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TSEC_IRQDEST_HALT |
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TSEC_IRQDEST_EXTERR |
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TSEC_IRQDEST_SWGEN0 |
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TSEC_IRQDEST_SWGEN1;
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TSEC(TSEC_ITFEN) = TSEC_ITFEN_CTXEN | TSEC_ITFEN_MTHDEN;
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if (!_tsec_dma_wait_idle())
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{
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res = -1;
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@ -122,6 +133,9 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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// Fuse driver.
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fuse = page_alloc(1);
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memcpy((void *)&fuse[0x800/4], (void *)FUSE_BASE, 0x400);
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fuse[0x82C / 4] = 0;
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fuse[0x9E0 / 4] = (1 << (kb + 2)) - 1;
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fuse[0x9E4 / 4] = (1 << (kb + 2)) - 1;
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smmu_map(pdir, (FUSE_BASE - 0x800), (u32)fuse, 1, _READABLE | _NONSECURE);
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// Power management controller.
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@ -156,10 +170,10 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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//Execute firmware.
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HOST1X(0x3300) = 0x34C2E1DA;
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TSEC(0x1044) = 0;
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TSEC(0x1040) = rev;
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TSEC(0x1104) = 0; // tsec_bootvec_r
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TSEC(0x1100) = 2; // tsec_cpuctl_r
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TSEC(TSEC_STATUS) = 0;
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TSEC(TSEC_BOOTKEYVER) = tsec_ctxt->key_ver;
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TSEC(TSEC_BOOTVEC) = 0;
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TSEC(TSEC_CPUCTL) = TSEC_CPUCTL_STARTCPU;
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if (kb <= KB_FIRMWARE_VERSION_600)
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{
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@ -169,13 +183,13 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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goto out_free;
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}
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u32 timeout = get_tmr_ms() + 2000;
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while (!TSEC(0x1044))
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while (!TSEC(TSEC_STATUS))
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if (get_tmr_ms() > timeout)
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{
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res = -4;
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goto out_free;
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}
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if (TSEC(0x1044) != 0xB0B0B0B0)
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if (TSEC(TSEC_STATUS) != 0xB0B0B0B0)
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{
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res = -5;
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goto out_free;
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@ -210,6 +224,9 @@ int tsec_query(u8 *tsec_keys, u8 kb, tsec_ctxt_t *tsec_ctxt)
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k = se[SE_KEYTABLE_DATA0_REG_OFFSET / 4];
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key[kidx++] = k;
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// Failsafe.
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if ((u32)get_tmr_us() - start > 500000)
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break;
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}
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if (kidx != 8)
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