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mirror of https://github.com/CTCaer/hekate.git synced 2024-12-27 12:16:43 +00:00
hekate/tools/mc.def

449 lines
26 KiB
Modula-2
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2018-05-01 05:15:48 +00:00
MC_INTSTATUS 0
MC_INTMASK 4
MC_ERR_STATUS 8
MC_ERR_ADR c
MC_PCFIFO_CLIENT_CONFIG0 dd0
MC_PCFIFO_CLIENT_CONFIG1 dd4
MC_PCFIFO_CLIENT_CONFIG2 dd8
MC_PCFIFO_CLIENT_CONFIG3 ddc
MC_PCFIFO_CLIENT_CONFIG4 de0
MC_EMEM_CFG 50
MC_EMEM_ADR_CFG 54
MC_EMEM_ADR_CFG_DEV0 58
MC_EMEM_ADR_CFG_DEV1 5c
MC_EMEM_ADR_CFG_CHANNEL_MASK 60
MC_EMEM_ADR_CFG_BANK_MASK_0 64
MC_EMEM_ADR_CFG_BANK_MASK_1 68
MC_EMEM_ADR_CFG_BANK_MASK_2 6c
MC_SECURITY_CFG0 70
MC_SECURITY_CFG1 74
MC_SECURITY_CFG3 9bc
MC_SECURITY_RSV 7c
MC_EMEM_ARB_CFG 90
MC_EMEM_ARB_OUTSTANDING_REQ 94
MC_EMEM_ARB_TIMING_RCD 98
MC_EMEM_ARB_TIMING_RP 9c
MC_EMEM_ARB_TIMING_RC a0
MC_EMEM_ARB_TIMING_RAS a4
MC_EMEM_ARB_TIMING_FAW a8
MC_EMEM_ARB_TIMING_RRD ac
MC_EMEM_ARB_TIMING_RAP2PRE b0
MC_EMEM_ARB_TIMING_WAP2PRE b4
MC_EMEM_ARB_TIMING_R2R b8
MC_EMEM_ARB_TIMING_W2W bc
MC_EMEM_ARB_TIMING_R2W c0
MC_EMEM_ARB_TIMING_W2R c4
MC_EMEM_ARB_TIMING_RFCPB 6c0
MC_EMEM_ARB_TIMING_CCDMW 6c4
MC_EMEM_ARB_REFPB_HP_CTRL 6f0
MC_EMEM_ARB_REFPB_BANK_CTRL 6f4
MC_EMEM_ARB_DA_TURNS d0
MC_EMEM_ARB_DA_COVERS d4
MC_EMEM_ARB_MISC0 d8
MC_EMEM_ARB_MISC1 dc
MC_EMEM_ARB_MISC2 c8
MC_EMEM_ARB_RING1_THROTTLE e0
MC_EMEM_ARB_RING3_THROTTLE e4
MC_EMEM_ARB_NISO_THROTTLE 6b0
MC_EMEM_ARB_OVERRIDE e8
MC_EMEM_ARB_RSV ec
MC_CLKEN_OVERRIDE f4
MC_TIMING_CONTROL_DBG f8
MC_TIMING_CONTROL fc
MC_STAT_CONTROL 100
MC_STAT_STATUS 104
MC_STAT_EMC_CLOCK_LIMIT 108
MC_STAT_EMC_CLOCK_LIMIT_MSBS 10c
MC_STAT_EMC_CLOCKS 110
MC_STAT_EMC_CLOCKS_MSBS 114
MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_LO 118
MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_LO 158
MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_HI 11c
MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_HI 15c
MC_STAT_EMC_FILTER_SET0_ADR_LIMIT_UPPER a20
MC_STAT_EMC_FILTER_SET1_ADR_LIMIT_UPPER a24
MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_LO 198
MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_LO 1a8
MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_HI 19c
MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_HI 1ac
MC_STAT_EMC_FILTER_SET0_VIRTUAL_ADR_LIMIT_UPPER a28
MC_STAT_EMC_FILTER_SET1_VIRTUAL_ADR_LIMIT_UPPER a2c
MC_STAT_EMC_FILTER_SET0_ASID 1a0
MC_STAT_EMC_FILTER_SET1_ASID 1b0
MC_STAT_EMC_FILTER_SET0_SLACK_LIMIT 120
MC_STAT_EMC_FILTER_SET1_SLACK_LIMIT 160
MC_STAT_EMC_FILTER_SET0_CLIENT_0 128
MC_STAT_EMC_FILTER_SET1_CLIENT_0 168
MC_STAT_EMC_FILTER_SET0_CLIENT_1 12c
MC_STAT_EMC_FILTER_SET1_CLIENT_1 16c
MC_STAT_EMC_FILTER_SET0_CLIENT_2 130
MC_STAT_EMC_FILTER_SET1_CLIENT_2 170
MC_STAT_EMC_FILTER_SET0_CLIENT_3 134
MC_STAT_EMC_FILTER_SET0_CLIENT_4 b88
MC_STAT_EMC_FILTER_SET1_CLIENT_3 174
MC_STAT_EMC_FILTER_SET1_CLIENT_4 b8c
MC_STAT_EMC_SET0_COUNT 138
MC_STAT_EMC_SET0_COUNT_MSBS 13c
MC_STAT_EMC_SET1_COUNT 178
MC_STAT_EMC_SET1_COUNT_MSBS 17c
MC_STAT_EMC_SET0_SLACK_ACCUM 140
MC_STAT_EMC_SET0_SLACK_ACCUM_MSBS 144
MC_STAT_EMC_SET1_SLACK_ACCUM 180
MC_STAT_EMC_SET1_SLACK_ACCUM_MSBS 184
MC_STAT_EMC_SET0_HISTO_COUNT 148
MC_STAT_EMC_SET0_HISTO_COUNT_MSBS 14c
MC_STAT_EMC_SET1_HISTO_COUNT 188
MC_STAT_EMC_SET1_HISTO_COUNT_MSBS 18c
MC_STAT_EMC_SET0_MINIMUM_SLACK_OBSERVED 150
MC_STAT_EMC_SET1_MINIMUM_SLACK_OBSERVED 190
MC_STAT_EMC_SET0_IDLE_CYCLE_COUNT 1b8
MC_STAT_EMC_SET0_IDLE_CYCL_COUNT_MSBS 1bc
MC_STAT_EMC_SET1_IDLE_CYCLE_COUNT 1c8
MC_STAT_EMC_SET1_IDLE_CYCL_COUNT_MSBS 1cc
MC_STAT_EMC_SET0_IDLE_CYCLE_PARTITION_SELECT 1c0
MC_STAT_EMC_SET1_IDLE_CYCLE_PARTITION_SELECT 1d0
MC_CLIENT_HOTRESET_CTRL 200
MC_CLIENT_HOTRESET_CTRL_1 970
MC_CLIENT_HOTRESET_STATUS 204
MC_CLIENT_HOTRESET_STATUS_1 974
MC_EMEM_ARB_ISOCHRONOUS_0 208
MC_EMEM_ARB_ISOCHRONOUS_1 20c
MC_EMEM_ARB_ISOCHRONOUS_2 210
MC_EMEM_ARB_ISOCHRONOUS_3 214
MC_EMEM_ARB_ISOCHRONOUS_4 b94
MC_EMEM_ARB_HYSTERESIS_0 218
MC_EMEM_ARB_HYSTERESIS_1 21c
MC_EMEM_ARB_HYSTERESIS_2 220
MC_EMEM_ARB_HYSTERESIS_3 224
MC_EMEM_ARB_HYSTERESIS_4 b84
MC_EMEM_ARB_DHYSTERESIS_0 bb0
MC_EMEM_ARB_DHYSTERESIS_1 bb4
MC_EMEM_ARB_DHYSTERESIS_2 bb8
MC_EMEM_ARB_DHYSTERESIS_3 bbc
MC_EMEM_ARB_DHYSTERESIS_4 bc0
MC_EMEM_ARB_DHYST_CTRL bcc
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 bd0
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 bd4
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 bd8
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 bdc
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 be0
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 be4
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 be8
MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 bec
MC_RESERVED_RSV 3fc
MC_DISB_EXTRA_SNAP_LEVELS 408
MC_APB_EXTRA_SNAP_LEVELS 2a4
MC_AHB_EXTRA_SNAP_LEVELS 2a0
MC_USBD_EXTRA_SNAP_LEVELS a18
MC_ISP_EXTRA_SNAP_LEVELS a08
MC_AUD_EXTRA_SNAP_LEVELS a10
MC_MSE_EXTRA_SNAP_LEVELS 40c
MC_GK2_EXTRA_SNAP_LEVELS a40
MC_A9AVPPC_EXTRA_SNAP_LEVELS 414
MC_FTOP_EXTRA_SNAP_LEVELS 2bc
MC_JPG_EXTRA_SNAP_LEVELS a3c
MC_HOST_EXTRA_SNAP_LEVELS a14
MC_SAX_EXTRA_SNAP_LEVELS 2c0
MC_DIS_EXTRA_SNAP_LEVELS 2ac
MC_VICPC_EXTRA_SNAP_LEVELS a1c
MC_HDAPC_EXTRA_SNAP_LEVELS a48
MC_AVP_EXTRA_SNAP_LEVELS 2a8
MC_USBX_EXTRA_SNAP_LEVELS 404
MC_PCX_EXTRA_SNAP_LEVELS 2b8
MC_SD_EXTRA_SNAP_LEVELS a04
MC_DFD_EXTRA_SNAP_LEVELS a4c
MC_VE_EXTRA_SNAP_LEVELS 2d8
MC_GK_EXTRA_SNAP_LEVELS a00
MC_VE2_EXTRA_SNAP_LEVELS 410
MC_SDM_EXTRA_SNAP_LEVELS a44
MC_VIDEO_PROTECT_BOM 648
MC_VIDEO_PROTECT_SIZE_MB 64c
MC_VIDEO_PROTECT_BOM_ADR_HI 978
MC_VIDEO_PROTECT_REG_CTRL 650
MC_ERR_VPR_STATUS 654
MC_ERR_VPR_ADR 658
MC_VIDEO_PROTECT_VPR_OVERRIDE 418
MC_VIDEO_PROTECT_VPR_OVERRIDE1 590
MC_IRAM_BOM 65c
MC_IRAM_TOM 660
MC_IRAM_ADR_HI 980
MC_IRAM_REG_CTRL 964
MC_EMEM_CFG_ACCESS_CTRL 664
MC_TZ_SECURITY_CTRL 668
MC_EMEM_ARB_OUTSTANDING_REQ_RING3 66c
MC_EMEM_ARB_OUTSTANDING_REQ_NISO 6b4
MC_EMEM_ARB_RING0_THROTTLE_MASK 6bc
MC_EMEM_ARB_NISO_THROTTLE_MASK 6b8
MC_EMEM_ARB_NISO_THROTTLE_MASK_1 b80
MC_SEC_CARVEOUT_BOM 670
MC_SEC_CARVEOUT_SIZE_MB 674
MC_SEC_CARVEOUT_ADR_HI 9d4
MC_SEC_CARVEOUT_REG_CTRL 678
MC_ERR_SEC_STATUS 67c
MC_ERR_SEC_ADR 680
MC_PC_IDLE_CLOCK_GATE_CONFIG 684
MC_STUTTER_CONTROL 688
MC_RESERVED_RSV_1 958
MC_DVFS_PIPE_SELECT 95c
MC_AHB_PTSA_MIN 4e0
MC_AUD_PTSA_MIN 54c
MC_MLL_MPCORER_PTSA_RATE 44c
MC_RING2_PTSA_RATE 440
MC_USBD_PTSA_RATE 530
MC_USBX_PTSA_MIN 528
MC_USBD_PTSA_MIN 534
MC_APB_PTSA_MAX 4f0
MC_JPG_PTSA_RATE 584
MC_DIS_PTSA_MIN 420
MC_AVP_PTSA_MAX 4fc
MC_AVP_PTSA_RATE 4f4
MC_RING1_PTSA_MIN 480
MC_DIS_PTSA_MAX 424
MC_SD_PTSA_MAX 4d8
MC_MSE_PTSA_RATE 4c4
MC_VICPC_PTSA_MIN 558
MC_PCX_PTSA_MAX 4b4
MC_ISP_PTSA_RATE 4a0
MC_A9AVPPC_PTSA_MIN 48c
MC_RING2_PTSA_MAX 448
MC_AUD_PTSA_RATE 548
MC_HOST_PTSA_MIN 51c
MC_MLL_MPCORER_PTSA_MAX 454
MC_SD_PTSA_MIN 4d4
MC_RING1_PTSA_RATE 47c
MC_JPG_PTSA_MIN 588
MC_HDAPC_PTSA_MIN 62c
MC_AVP_PTSA_MIN 4f8
MC_JPG_PTSA_MAX 58c
MC_VE_PTSA_MAX 43c
MC_DFD_PTSA_MAX 63c
MC_VICPC_PTSA_RATE 554
MC_GK_PTSA_MAX 544
MC_VICPC_PTSA_MAX 55c
MC_SDM_PTSA_MAX 624
MC_SAX_PTSA_RATE 4b8
MC_PCX_PTSA_MIN 4b0
MC_APB_PTSA_MIN 4ec
MC_GK2_PTSA_MIN 614
MC_PCX_PTSA_RATE 4ac
MC_RING1_PTSA_MAX 484
MC_HDAPC_PTSA_RATE 628
MC_MLL_MPCORER_PTSA_MIN 450
MC_GK2_PTSA_MAX 618
MC_AUD_PTSA_MAX 550
MC_GK2_PTSA_RATE 610
MC_ISP_PTSA_MAX 4a8
MC_DISB_PTSA_RATE 428
MC_VE2_PTSA_MAX 49c
MC_DFD_PTSA_MIN 638
MC_FTOP_PTSA_RATE 50c
MC_A9AVPPC_PTSA_RATE 488
MC_VE2_PTSA_MIN 498
MC_USBX_PTSA_MAX 52c
MC_DIS_PTSA_RATE 41c
MC_USBD_PTSA_MAX 538
MC_A9AVPPC_PTSA_MAX 490
MC_USBX_PTSA_RATE 524
MC_FTOP_PTSA_MAX 514
MC_HDAPC_PTSA_MAX 630
MC_SD_PTSA_RATE 4d0
MC_DFD_PTSA_RATE 634
MC_FTOP_PTSA_MIN 510
MC_SDM_PTSA_RATE 61c
MC_AHB_PTSA_RATE 4dc
MC_SMMU_SMMU_PTSA_MAX 460
MC_RING2_PTSA_MIN 444
MC_SDM_PTSA_MIN 620
MC_APB_PTSA_RATE 4e8
MC_MSE_PTSA_MIN 4c8
MC_HOST_PTSA_RATE 518
MC_VE_PTSA_RATE 434
MC_AHB_PTSA_MAX 4e4
MC_SAX_PTSA_MIN 4bc
MC_SMMU_SMMU_PTSA_MIN 45c
MC_ISP_PTSA_MIN 4a4
MC_HOST_PTSA_MAX 520
MC_SAX_PTSA_MAX 4c0
MC_VE_PTSA_MIN 438
MC_GK_PTSA_MIN 540
MC_MSE_PTSA_MAX 4cc
MC_DISB_PTSA_MAX 430
MC_DISB_PTSA_MIN 42c
MC_SMMU_SMMU_PTSA_RATE 458
MC_VE2_PTSA_RATE 494
MC_GK_PTSA_RATE 53c
MC_PTSA_GRANT_DECREMENT 960
MC_LATENCY_ALLOWANCE_AVPC_0 2e4
MC_LATENCY_ALLOWANCE_AXIAP_0 3a0
MC_LATENCY_ALLOWANCE_XUSB_1 380
MC_LATENCY_ALLOWANCE_ISP2B_0 384
MC_LATENCY_ALLOWANCE_SDMMCAA_0 3bc
MC_LATENCY_ALLOWANCE_SDMMCA_0 3b8
MC_LATENCY_ALLOWANCE_ISP2_0 370
MC_LATENCY_ALLOWANCE_SE_0 3e0
MC_LATENCY_ALLOWANCE_ISP2_1 374
MC_LATENCY_ALLOWANCE_DC_0 2e8
MC_LATENCY_ALLOWANCE_VIC_0 394
MC_LATENCY_ALLOWANCE_DCB_1 2f8
MC_LATENCY_ALLOWANCE_NVDEC_0 3d8
MC_LATENCY_ALLOWANCE_DCB_2 2fc
MC_LATENCY_ALLOWANCE_TSEC_0 390
MC_LATENCY_ALLOWANCE_DC_2 2f0
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB 694
MC_LATENCY_ALLOWANCE_PPCS_1 348
MC_LATENCY_ALLOWANCE_XUSB_0 37c
MC_LATENCY_ALLOWANCE_PPCS_0 344
MC_LATENCY_ALLOWANCE_TSECB_0 3f0
MC_LATENCY_ALLOWANCE_AFI_0 2e0
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B 698
MC_LATENCY_ALLOWANCE_DC_1 2ec
MC_LATENCY_ALLOWANCE_APE_0 3dc
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C 6a0
MC_LATENCY_ALLOWANCE_A9AVP_0 3a4
MC_LATENCY_ALLOWANCE_GPU2_0 3e8
MC_LATENCY_ALLOWANCE_DCB_0 2f4
MC_LATENCY_ALLOWANCE_HC_1 314
MC_LATENCY_ALLOWANCE_SDMMC_0 3c0
MC_LATENCY_ALLOWANCE_NVJPG_0 3e4
MC_LATENCY_ALLOWANCE_PTC_0 34c
MC_LATENCY_ALLOWANCE_ETR_0 3ec
MC_LATENCY_ALLOWANCE_MPCORE_0 320
MC_LATENCY_ALLOWANCE_VI2_0 398
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB 69c
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB 6a4
MC_LATENCY_ALLOWANCE_SATA_0 350
MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A 690
MC_LATENCY_ALLOWANCE_HC_0 310
MC_LATENCY_ALLOWANCE_DC_3 3c8
MC_LATENCY_ALLOWANCE_GPU_0 3ac
MC_LATENCY_ALLOWANCE_SDMMCAB_0 3c4
MC_LATENCY_ALLOWANCE_ISP2B_1 388
MC_LATENCY_ALLOWANCE_NVENC_0 328
MC_LATENCY_ALLOWANCE_HDA_0 318
MC_MIN_LENGTH_APE_0 b34
MC_MIN_LENGTH_DCB_2 8a8
MC_MIN_LENGTH_A9AVP_0 950
MC_MIN_LENGTH_TSEC_0 93c
MC_MIN_LENGTH_DC_1 898
MC_MIN_LENGTH_AXIAP_0 94c
MC_MIN_LENGTH_ISP2B_0 930
MC_MIN_LENGTH_VI2_0 944
MC_MIN_LENGTH_DCB_0 8a0
MC_MIN_LENGTH_DCB_1 8a4
MC_MIN_LENGTH_PPCS_1 8f4
MC_MIN_LENGTH_NVJPG_0 b3c
MC_MIN_LENGTH_HDA_0 8c4
MC_MIN_LENGTH_NVENC_0 8d4
MC_MIN_LENGTH_SDMMC_0 b18
MC_MIN_LENGTH_ISP2B_1 934
MC_MIN_LENGTH_HC_1 8c0
MC_MIN_LENGTH_DC_3 b20
MC_MIN_LENGTH_AVPC_0 890
MC_MIN_LENGTH_VIC_0 940
MC_MIN_LENGTH_ISP2_0 91c
MC_MIN_LENGTH_HC_0 8bc
MC_MIN_LENGTH_SE_0 b38
MC_MIN_LENGTH_NVDEC_0 b30
MC_MIN_LENGTH_SATA_0 8fc
MC_MIN_LENGTH_DC_0 894
MC_MIN_LENGTH_XUSB_1 92c
MC_MIN_LENGTH_DC_2 89c
MC_MIN_LENGTH_SDMMCAA_0 b14
MC_MIN_LENGTH_GPU_0 b04
MC_MIN_LENGTH_ETR_0 b44
MC_MIN_LENGTH_AFI_0 88c
MC_MIN_LENGTH_PPCS_0 8f0
MC_MIN_LENGTH_ISP2_1 920
MC_MIN_LENGTH_XUSB_0 928
MC_MIN_LENGTH_MPCORE_0 8cc
MC_MIN_LENGTH_TSECB_0 b48
MC_MIN_LENGTH_SDMMCA_0 b10
MC_MIN_LENGTH_GPU2_0 b40
MC_MIN_LENGTH_SDMMCAB_0 b1c
MC_MIN_LENGTH_PTC_0 8f8
MC_EMEM_ARB_OVERRIDE_1 968
MC_VIDEO_PROTECT_GPU_OVERRIDE_0 984
MC_VIDEO_PROTECT_GPU_OVERRIDE_1 988
MC_EMEM_ARB_STATS_0 990
MC_EMEM_ARB_STATS_1 994
MC_MTS_CARVEOUT_BOM 9a0
MC_MTS_CARVEOUT_SIZE_MB 9a4
MC_MTS_CARVEOUT_ADR_HI 9a8
MC_MTS_CARVEOUT_REG_CTRL 9ac
MC_ERR_MTS_STATUS 9b0
MC_ERR_MTS_ADR 9b4
MC_ERR_GENERALIZED_CARVEOUT_STATUS c00
MC_ERR_GENERALIZED_CARVEOUT_ADR c04
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS2 d74
MC_SECURITY_CARVEOUT4_CFG0 cf8
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS2 d10
MC_SECURITY_CARVEOUT4_SIZE_128KB d04
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS4 c28
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS1 c30
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS4 c8c
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS0 d1c
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS1 d70
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS0 c2c
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS4 d7c
MC_SECURITY_CARVEOUT3_SIZE_128KB cb4
MC_SECURITY_CARVEOUT2_CFG0 c58
MC_SECURITY_CARVEOUT1_CFG0 c08
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS2 c84
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS0 c68
MC_SECURITY_CARVEOUT3_BOM cac
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS2 c70
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS3 d78
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS0 c7c
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS4 d18
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS1 cbc
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS3 c38
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS2 c34
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS2 cc0
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS2 d60
MC_SECURITY_CARVEOUT3_CFG0 ca8
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS0 cb8
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS3 c88
MC_SECURITY_CARVEOUT2_SIZE_128KB c64
MC_SECURITY_CARVEOUT5_BOM_HI d50
MC_SECURITY_CARVEOUT1_SIZE_128KB c14
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS3 d14
MC_SECURITY_CARVEOUT1_BOM c0c
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS4 d2c
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS4 d68
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS4 cc8
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS0 d58
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS2 d24
MC_SECURITY_CARVEOUT3_CLIENT_ACCESS3 cc4
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS4 c78
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS1 c1c
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS0 c18
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS3 d28
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS1 d5c
MC_SECURITY_CARVEOUT3_BOM_HI cb0
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS3 cd8
MC_SECURITY_CARVEOUT2_BOM_HI c60
MC_SECURITY_CARVEOUT4_BOM_HI d00
MC_SECURITY_CARVEOUT5_CLIENT_ACCESS3 d64
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS4 cdc
MC_SECURITY_CARVEOUT2_CLIENT_FORCE_INTERNAL_ACCESS1 c80
MC_SECURITY_CARVEOUT5_SIZE_128KB d54
MC_SECURITY_CARVEOUT4_CLIENT_FORCE_INTERNAL_ACCESS1 d20
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS2 cd4
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS1 d0c
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS3 c74
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS0 ccc
MC_SECURITY_CARVEOUT4_BOM cfc
MC_SECURITY_CARVEOUT5_CFG0 d48
MC_SECURITY_CARVEOUT2_BOM c5c
MC_SECURITY_CARVEOUT5_BOM d4c
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS3 c24
MC_SECURITY_CARVEOUT5_CLIENT_FORCE_INTERNAL_ACCESS0 d6c
MC_SECURITY_CARVEOUT3_CLIENT_FORCE_INTERNAL_ACCESS1 cd0
MC_SECURITY_CARVEOUT1_BOM_HI c10
MC_SECURITY_CARVEOUT1_CLIENT_ACCESS2 c20
MC_SECURITY_CARVEOUT1_CLIENT_FORCE_INTERNAL_ACCESS4 c3c
MC_SECURITY_CARVEOUT2_CLIENT_ACCESS1 c6c
MC_SECURITY_CARVEOUT4_CLIENT_ACCESS0 d08
MC_ERR_APB_ASID_UPDATE_STATUS 9d0
MC_DA_CONFIG0 9dc