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72 lines
2.3 KiB
C
72 lines
2.3 KiB
C
// Copyright 2015 Dolphin Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#if defined(_M_X86_64)
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/**
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* It is assumed that all compilers used to build Dolphin support intrinsics up to and including
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* SSE 4.2 on x86/x64.
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*/
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#if defined(__GNUC__) || defined(__clang__)
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/**
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* Due to limitations in GCC, SSE intrinsics are only available when compiling with the
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* corresponding instruction set enabled. However, using the target attribute, we can compile
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* single functions with a different target instruction set, while still creating a generic build.
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*
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* Since this instruction set is enabled per-function, any callers should verify that the
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* instruction set is supported at runtime before calling it, and provide a fallback implementation
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* when not supported.
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*
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* When building with -march=native, or enabling the instruction sets in the compile flags, permit
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* usage of the instrinsics without any function attributes. If the command-line architecture does
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* not support this instruction set, enable it via function targeting.
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*/
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#include <x86intrin.h>
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#ifndef __SSE4_2__
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#define FUNCTION_TARGET_SSE42 [[gnu::target("sse4.2")]]
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#endif
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#ifndef __SSE4_1__
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#define FUNCTION_TARGET_SSR41 [[gnu::target("sse4.1")]]
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#endif
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#ifndef __SSSE3__
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#define FUNCTION_TARGET_SSSE3 [[gnu::target("ssse3")]]
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#endif
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#ifndef __SSE3__
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#define FUNCTION_TARGET_SSE3 [[gnu::target("sse3")]]
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#endif
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#elif defined(_MSC_VER) || defined(__INTEL_COMPILER)
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/**
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* MSVC and ICC support intrinsics for any instruction set without any function attributes.
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*/
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#include <intrin.h>
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#endif // defined(_MSC_VER) || defined(__INTEL_COMPILER)
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#endif // _M_X86_64
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/**
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* Define the FUNCTION_TARGET macros to nothing if they are not needed, or not on an X86 platform.
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* This way when a function is defined with FUNCTION_TARGET you don't need to define a second
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* version without the macro around a #ifdef guard. Be careful when using intrinsics, as all use
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* should still be placed around a #ifdef _M_X86_64 if the file is compiled on all architectures.
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*/
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#ifndef FUNCTION_TARGET_SSE42
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#define FUNCTION_TARGET_SSE42
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#endif
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#ifndef FUNCTION_TARGET_SSR41
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#define FUNCTION_TARGET_SSR41
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#endif
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#ifndef FUNCTION_TARGET_SSSE3
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#define FUNCTION_TARGET_SSSE3
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#endif
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#ifndef FUNCTION_TARGET_SSE3
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#define FUNCTION_TARGET_SSE3
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#endif
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