From fa5499e0467b8e0730003328eab971c21f62b817 Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@gmail.com>
Date: Thu, 12 Sep 2013 02:40:53 -0500
Subject: [PATCH] [ARM] Disable lmw when fastmem is disabled.
---
.../Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp | 9 +++++++++
.../Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp | 2 +-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
index 8a12976680..8fcbcef894 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
@@ -134,6 +134,9 @@ void JitArm::SafeStoreFromReg(bool fastmem, s32 dest, u32 value, s32 regOffset,
void JitArm::stX(UGeckoInstruction inst)
{
+ INSTRUCTION_START
+ JITDISABLE(bJITLoadStoreOff)
+
u32 a = inst.RA, b = inst.RB, s = inst.RS;
s32 offset = inst.SIMM_16;
u32 accessSize = 0;
@@ -455,6 +458,12 @@ void JitArm::lXX(UGeckoInstruction inst)
// We make the assumption that this pulls from main RAM at /all/ times
void JitArm::lmw(UGeckoInstruction inst)
{
+ INSTRUCTION_START
+ JITDISABLE(bJITLoadStoreOff)
+ if (!Core::g_CoreStartupParameter.bFastmem){
+ Default(inst); return;
+ }
+
u32 a = inst.RA;
ARMReg rA = gpr.GetReg();
ARMReg rB = gpr.GetReg();
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
index f3ab4f695b..5509687184 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_SystemRegisters.cpp
@@ -71,7 +71,6 @@ void JitArm::mfspr(UGeckoInstruction inst)
JITDISABLE(bJITSystemRegistersOff)
u32 iIndex = (inst.SPRU << 5) | (inst.SPRL & 0x1F);
- ARMReg RD = gpr.R(inst.RD);
switch (iIndex)
{
case SPR_WPAR:
@@ -81,6 +80,7 @@ void JitArm::mfspr(UGeckoInstruction inst)
Default(inst);
return;
default:
+ ARMReg RD = gpr.R(inst.RD);
LDR(RD, R9, PPCSTATE_OFF(spr) + iIndex * 4);
break;
}