diff --git a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp index 04f212b568..c546f84002 100644 --- a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp +++ b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp @@ -289,7 +289,7 @@ void RegCache::BindToRegister(size_t i, bool doLoad, bool makeDirty) LoadRegister(i, xr); for (size_t j = 0; j < regs.size(); j++) { - if (i != j && regs[j].location.IsSimpleReg() && regs[j].location.GetSimpleReg() == xr) + if (i != j && regs[j].location.IsSimpleReg(xr)) { Crash(); } diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp index 2731a28600..a4a8a6212c 100644 --- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp +++ b/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp @@ -476,7 +476,7 @@ bool EmuCodeBlock::WriteToConstAddress(int accessSize, OpArg arg, u32 address, B // fun tricks... if (jit->jo.optimizeGatherPipe && PowerPC::IsOptimizableGatherPipeWrite(address)) { - if (!arg.IsSimpleReg() || arg.GetSimpleReg() != RSCRATCH) + if (!arg.IsSimpleReg(RSCRATCH)) MOV(accessSize, R(RSCRATCH), arg); UnsafeWriteGatherPipe(accessSize); @@ -654,7 +654,7 @@ void EmuCodeBlock::ForceSinglePrecision(X64Reg output, const OpArg& input, bool MOVDDUP(output, R(output)); } } - else if (!input.IsSimpleReg() || input.GetSimpleReg() != output) + else if (!input.IsSimpleReg(output)) { if (duplicate) MOVDDUP(output, input); @@ -667,7 +667,7 @@ void EmuCodeBlock::ForceSinglePrecision(X64Reg output, const OpArg& input, bool void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), void (XEmitter::*sseOp)(X64Reg, const OpArg&), X64Reg regOp, const OpArg& arg1, const OpArg& arg2, bool packed, bool reversible) { - if (arg1.IsSimpleReg() && regOp == arg1.GetSimpleReg()) + if (arg1.IsSimpleReg(regOp)) { (this->*sseOp)(regOp, arg2); } @@ -675,7 +675,7 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), { (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2); } - else if (arg2.IsSimpleReg() && arg2.GetSimpleReg() == regOp) + else if (arg2.IsSimpleReg(regOp)) { if (reversible) { @@ -684,7 +684,7 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), else { // The ugly case: regOp == arg2 without AVX, or with arg1 == memory - if (!arg1.IsSimpleReg() || arg1.GetSimpleReg() != XMM0) + if (!arg1.IsSimpleReg(XMM0)) MOVAPD(XMM0, arg1); if (cpu_info.bAVX) { @@ -714,7 +714,7 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&), void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&, u8), void (XEmitter::*sseOp)(X64Reg, const OpArg&, u8), X64Reg regOp, const OpArg& arg1, const OpArg& arg2, u8 imm) { - if (arg1.IsSimpleReg() && regOp == arg1.GetSimpleReg()) + if (arg1.IsSimpleReg(regOp)) { (this->*sseOp)(regOp, arg2, imm); } @@ -722,10 +722,10 @@ void EmuCodeBlock::avx_op(void (XEmitter::*avxOp)(X64Reg, X64Reg, const OpArg&, { (this->*avxOp)(regOp, arg1.GetSimpleReg(), arg2, imm); } - else if (arg2.IsSimpleReg() && arg2.GetSimpleReg() == regOp) + else if (arg2.IsSimpleReg(regOp)) { // The ugly case: regOp == arg2 without AVX, or with arg1 == memory - if (!arg1.IsSimpleReg() || arg1.GetSimpleReg() != XMM0) + if (!arg1.IsSimpleReg(XMM0)) MOVAPD(XMM0, arg1); if (cpu_info.bAVX) { @@ -764,14 +764,14 @@ void EmuCodeBlock::Force25BitPrecision(X64Reg output, const OpArg& input, X64Reg } else { - if (!input.IsSimpleReg() || input.GetSimpleReg() != output) + if (!input.IsSimpleReg(output)) MOVAPD(output, input); avx_op(&XEmitter::VPAND, &XEmitter::PAND, tmp, R(output), M(psRoundBit), true, true); PAND(output, M(psMantissaTruncate)); PADDQ(output, R(tmp)); } } - else if (!input.IsSimpleReg() || input.GetSimpleReg() != output) + else if (!input.IsSimpleReg(output)) { MOVAPD(output, input); }