diff --git a/Source/Core/Common/Arm64Emitter.cpp b/Source/Core/Common/Arm64Emitter.cpp
index 997433b0ab..68652ba5b4 100644
--- a/Source/Core/Common/Arm64Emitter.cpp
+++ b/Source/Core/Common/Arm64Emitter.cpp
@@ -964,7 +964,7 @@ FixupBranch ARM64XEmitter::CBZ(ARM64Reg Rt)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::CBZ;
   branch.reg = Rt;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::CBNZ(ARM64Reg Rt)
@@ -973,7 +973,7 @@ FixupBranch ARM64XEmitter::CBNZ(ARM64Reg Rt)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::CBNZ;
   branch.reg = Rt;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::B(CCFlags cond)
@@ -982,7 +982,7 @@ FixupBranch ARM64XEmitter::B(CCFlags cond)
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::BConditional;
   branch.cond = cond;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::TBZ(ARM64Reg Rt, u8 bit)
@@ -992,7 +992,7 @@ FixupBranch ARM64XEmitter::TBZ(ARM64Reg Rt, u8 bit)
   branch.type = FixupBranch::Type::TBZ;
   branch.reg = Rt;
   branch.bit = bit;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::TBNZ(ARM64Reg Rt, u8 bit)
@@ -1002,7 +1002,7 @@ FixupBranch ARM64XEmitter::TBNZ(ARM64Reg Rt, u8 bit)
   branch.type = FixupBranch::Type::TBNZ;
   branch.reg = Rt;
   branch.bit = bit;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::B()
@@ -1010,7 +1010,7 @@ FixupBranch ARM64XEmitter::B()
   FixupBranch branch{};
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::B;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 FixupBranch ARM64XEmitter::BL()
@@ -1018,7 +1018,7 @@ FixupBranch ARM64XEmitter::BL()
   FixupBranch branch{};
   branch.ptr = m_code;
   branch.type = FixupBranch::Type::BL;
-  HINT(HINT_NOP);
+  HINT(SystemHint::NOP);
   return branch;
 }
 
@@ -1239,7 +1239,7 @@ void ARM64XEmitter::CNTVCT(Arm64Gen::ARM64Reg Rt)
 
 void ARM64XEmitter::HINT(SystemHint op)
 {
-  EncodeSystemInst(0, 3, 2, 0, op, WSP);
+  EncodeSystemInst(0, 3, 2, 0, static_cast<u32>(op), WSP);
 }
 void ARM64XEmitter::CLREX()
 {
diff --git a/Source/Core/Common/Arm64Emitter.h b/Source/Core/Common/Arm64Emitter.h
index 4479e51fea..c654c4e8b6 100644
--- a/Source/Core/Common/Arm64Emitter.h
+++ b/Source/Core/Common/Arm64Emitter.h
@@ -354,14 +354,14 @@ enum PStateField
   FIELD_FPSR = 0x341,
 };
 
-enum SystemHint
+enum class SystemHint
 {
-  HINT_NOP = 0,
-  HINT_YIELD,
-  HINT_WFE,
-  HINT_WFI,
-  HINT_SEV,
-  HINT_SEVL,
+  NOP,
+  YIELD,
+  WFE,
+  WFI,
+  SEV,
+  SEVL,
 };
 
 enum BarrierType
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
index 34140a0337..3668eefa86 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp
@@ -322,7 +322,7 @@ bool JitArm64::HandleFastmemFault(uintptr_t access_address, SContext* ctx)
 
   const u32 num_insts_max = fastmem_area_length / 4 - 1;
   for (u32 i = 0; i < num_insts_max; ++i)
-    emitter.HINT(HINT_NOP);
+    emitter.HINT(SystemHint::NOP);
 
   m_fault_to_handler.erase(slow_handler_iter);